STMicroelectronics-STFI5N95K3

Part #	STMicroelectronics-STFI5N95K3
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STFI5N95K3

N-channel 950

, 3

typ., 4 A Zener-protected SuperMESH3™

Power MOSFET in I

PAKFP package

Datasheet

−

production data

Features

Order code

DS(on)

max

TOT

STFI5N95K3 950

3.5

4 A

25 W

•

Fully insulated and low profile package with

increased creepage path from pin to heatsink

plate

PAKFP

(TO-281)

•

100% avalanche tested

•

Extremely large avalanche performance

•

Gate charge minimized

•

Very low intrinsic capacitances

•

Zener-protected

Figure 1. Internal schematic diagram

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Applications

•

Switching applications

Description

*ꢀꢃꢂ

This SuperMESH3™ Power MOSFET is the

result of improvements applied to

STMicroelectronics’ SuperMESH™ technology,

combined with a new optimized vertical structure.

This device boasts an extremely low on-

resistance, superior dynamic performance and

high avalanche capability, rendering it suitable for

the most demanding applications.

6ꢀꢄꢂ

AM01476v1

Table 1. Device summary

Order code

Marking

5N95K3

Package

Packaging

STFI5N95K3

PAKFP (TO-281)

Tube

May 2013

DocID023624 Rev 1

1/13

This is information on a product in full production.

www.st.com

STFI5N95K3

Electrical ratings

Table 2. Absolute maximum ratings

Symbol

Parameter

Gate- source voltage

Value

Unit

±30

(1)

Drain current (continuous) at T

= 25 °C

Drain current (continuous) at T

= 100 °C

Drain current (pulsed)

(2)

TOT

tal dissipation at T

= 25 °C

Avalanche current, repetitive or not-

repetitive (pulse width limited by T

max)

Single pulse avalanche energy

100

(starting T

= 25 °C, I

= I

, V

= 50 V)

dv/dt

(3)

Peak diode recovery voltage slope

V/ns

Insulation withstand voltage (RMS) from all

ISO

three leads to external heat sink

(t = 1 s,T

= 25 °C)

2500

Operating junction temperature

Storage temperature

-55 to 150

°C

stg

1. Limited

by maximum junction temperature

2. Pulse

width limited by safe operating area

≤

4 A, di/dt

≤

100 A/µs, peak V

≤

SD DS

(BR)DSS

Table 3. Thermal data

Parameter

Symbol

Value

Unit

thj-case

Thermal resistance junction-case max

thj-amb

Thermal resistance junction-ambient max

°C/W

62.5

DocID023624 Rev 1

3/13

Electrical characteristics

STFI5N95K3

Electrical characteristics

(

ase =25 °C unless otherwise specified)

Table 4. On /off states

Test conditions

Symbol

Parameter

Drain-source

Min.

Typ.

Max. Unit

(BR)DSS

= 1 mA, V

= 0

= 950 V

950

breakdown voltage

Zero gate voltage

µA

DSS

drain current (V

= 0)

= 950 V, T

=125 °C

Gate-body leakage

= ± 20 V

GSS

±10

µA

current (V

= 0)

GS(th)

DS(on)

Gate threshold voltage

= V

, I

= 100 µA

Static drain-source on-

resistance

_{GS
= 10
V
,
I
D
= 2 A}

3.5

Table 5. Dynamic

Test conditions

Symbol

Parameter

Min.

Typ.

Max. Unit

iss

Input capacitance

Output capacitance

–

460

–

oss

= 25

, f = 1 MHz,

= 0

Reverse transfer

capacitance

rss

–

Equivalent

capacitance time

(1)

o(tr)

= 0 to 760

, V

= 0

= 0 to 760

, V

= 0

970

Equivalent

capacitance energy

(2)

o(er)

–

Gate input resistance

f=1 MHz open drain

–

5.5

–

tal gate charge

= 760 V, I

= 4 A,

Gate-source charge

Gate-drain charge

= 10 V

4.7

(see Figure 16)

1. Time

related is defined as a constant equivalent capacitance giving the same charging time as C

when

oss

increases from 0 to 80% V

DSS

2. Energy

related is defined as a constant equivalent capacitance giving the same stored energy as C

oss

when V

increases from 0 to 80% V

DSS

4/13

DocID023624 Rev 1

STFI5N95K3

Electrical characteristics

Min. Typ. Max.

Unit

Table 6. Switching times

Test conditions

Symbol

Parameter

d(on)

d(off)

Turn-on delay time

Rise time

–

= 475

, I

= 2 A,

= 4.7

Ω,

= 10 V

Turn-off delay time

Fall time

(see Figure 15)

Table 7. Source drain diode

Test conditions

Symbol

Parameter

Min. Typ. Max. Unit

Source-drain current

–

(1)

SDM

Source-drain current (pulsed)

Forward on voltage

1.6

(2)

= 4 A, V

= 0

Reverse recovery time

Reverse recovery charge

Reverse recovery current

Reverse recovery time

Reverse recovery charge

Reverse recovery current

410

3.5

µC

= 4 A, di/dt = 100 A/µs

_{DD
= 60 V}

(see Figure 17)

RRM

516

4.1

µC

= 4 A, di/dt = 100 A/µs

_{DD
= 60 V T
J
= 150 °C}

(see Figure 17)

RRM

1. Pulse

width limited by safe operating area

2. Pulsed:

pulse duration = 300 µs, duty cycle 1.5%

Table 8. Gate-source Zener diode

Symbol

Parameter

Test conditions

Min. Typ. Max.

Unit

Gate-source breakdown

voltage

(BR)GSO

= ± 1 mA, I

–

The built-in back-to-back Zener diodes have specifically been designed to enhance not only

the device’s ESD capability, but also to make them safely absorb possible voltage transients

that may occasionally be applied from gate to source. In this respect the Zener voltage is

appropriate to achieve an efficient and cost-effective intervention to protect the device’s

integrity. These integrated Zener diodes thus avoid the usage of external components.

DocID023624 Rev 1

5/13

Electrical characteristics

STFI5N95K3

2.1

Electrical characteristics (curves)

Figure 2. Safe operating area

Figure 3. Thermal impedance

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Figure 4. Output characteristics

Figure 5. Transfer characteristics

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Figure 6. Gate charge vs gate-source voltage

Figure 7. Static drain-source on-resistance

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DocID023624 Rev 1

STFI5N95K3

Electrical characteristics

Figure 8. Capacitance variations

Figure 9. Output capacitance stored energy

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Figure 10. Normalized gate threshold voltage vs

temperature

Figure 11. Normalized on-resistance vs

temperature

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Figure 12. Source-drain diode forward

characteristics

Figure 13. Normalized B

VDSS

vs temperature

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DocID023624 Rev 1

7/13

Electrical characteristics

STFI5N95K3

Figure 14. Maximum avalanche energy vs

starting Tj

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8/13

DocID023624 Rev 1

STFI5N95K3

Test circuits

Figure 15. Switching times test circuit for

resistive load

Figure 16. Gate charge test circuit

12V

47k

100nF

2200

3.3

=CONST

100

=20V=V

GMAX

D.U.

2200

D.U.

2.7k

47k

AM01468v1

AM01469v1

Figure 17. Test circuit for inductive load

switching and diode recovery times

Figure 18. Unclamped inductive load test circuit

FAST

DIODE

L=100

2200

D.U.

3.3

1000

D.U.

AM01470v1

AM01471v1

Figure 19. Unclamped inductive waveform

Figure 20. Switching time waveform

off

(BR)DSS

90%

10%

90%

10%

90%

10%

AM01472v1

AM01473v1

DocID023624 Rev 1

9/13

Package mechanical data

STFI5N95K3

Package mechanical data

In order to meet environmental requirements, ST offers these devices in different grades of

ECOPACK

packages, depending on their level of environmental compliance. ECOPACK

specifications, grade definitions and product status are available at:

www.st.com

ECOPACK

is an ST trademark.

10/13

DocID023624 Rev 1

STFI5N95K3

Package mechanical data

Table 9. I

PAKFP (TO-281) mechanical data

Dim.

Min.

Typ.

Max.

4.40

2.50

0.65

0.45

0.75

4.60

2.70

2.75

0.85

0.70

1.00

1.20

5.20

10.40

23.00

14.10

10.85

3.20

1.25

7.50

4.95

10.00

21.00

13.20

10.55

2.70

–

0.85

7.30

Figure 21. I

PAKFP (TO-281) drawing

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DocID023624 Rev 1

11/13

Revision history

STFI5N95K3

Revision history

Table 10. Document revision history

Changes

Date

Revision

09-May-2013

First release

12/13

DocID023624 Rev 1

STFI5N95K3

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DocID023624 Rev 1

13/13

STMicroelectronics-STFI5N95K3

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