STMicroelectronics-STFU10NK60Z

Part #STMicroelectronics-STFU10NK60Z
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STMicroelectronics-STFU10NK60Z
STFU10NK60Z  
N-
channel 600 V, 0.68 Ω typ., 10 A, SuperMESH™  
Power MOSFET in a TO-220FP ultra narrow leads package  
Datasheet – production data  
Features  
P

tot  

Order code  
V

DS  

R

DS(on)

max.  
I

D  

35 W  
STFU10NK60Z 600
 
V  
0.75 Ω  
10 A  
Extremely high dv/dt capability  
100% avalanche tested  
Gate charge minimized  
Zener-protected  
3
2
1
TO-220FP  
ultra narrow leads  
Applications  
Switching applications  
Figure 1: Internal schematic diagram  
Description  
This high voltage device is a Zener-protected  
N-channel Power MOSFET developed using the  
SuperMESH™ technology by  
STMicroelectronics, an optimization of the  
well-
established PowerMESH™. In addition to a  
significant reduction in on-resistance, this device  
is designed to ensure a high level of dv/dt  
capability for the most demanding applications.  
Table 1: Device summary  
Package  
TO-220FP ultra narrow leads  
Order code  
Marking  
Packaging  
STFU10NK60Z  
10NK60Z  
Tube  
December 2016  
DocID028779 Rev 3  
1/13  
This is information on a product in full production.  

STFU10NK60Z  
Electrical ratings  
1
Electrical ratings  
Table 2: Absolute maximum ratings  
Symbol  
V

DS  

Parameter  
Value  
600  
±30  
10  
Unit  
V
Drain-source voltage  
Gate-source voltage  
V

GS  

V
Drain current (continuous) at T

C

= 25 °C  
Drain current (continuous) at T

C

= 100 °C  
Drain current (pulsed)  
A
5.7  
36  
A
A
P

TOT  

ESD  
Total dissipation at T

C

= 25 °C  
35  
W
Gate-
source, human body model (R = 1.5 kΩ, C = 100 pF)  
Peak diode recovery voltage slope  
4
kV  
V/ns  
4.5  
Insulation withstand voltage (RMS) from all three leads to external  
heat sink (t = 1s; T

C

= 25 °C)  
V

ISO  

2500  
V
T

j  

Operation junction temperature range  
Storage temperature range  
-55 to 150  
°C  
T

stg  

Notes:  

(1)

Limited by package  

(2)

Pulse width limited by safe operating area  
(3)  
I
< 10 A , di/dt < 200 A/μs , V

DD

= 80 % V

(BR)DSS  

SD  
Table 3: Thermal data  
Parameter  
Symbol  
Value  
3.6  
Unit  
°C/W  
°C/W  
R

thj-case

Thermal resistance junction-case max  
R

thj-amb  

Thermal resistance junction-ambient max  
62.5  
Table 4: Avalanche characteristics  
Symbol  
Parameter  
Value  
Unit  
Avalanche current, repetitive or non-repetitive  
(pulse width limited by T

J

max)  
I

AR  

10  
A
Single pulse avalanche energy  
(starting T

J

= 25 °C, I

D

= I

AR

, V

DD

= 50 V)  
E

AS  

300  
mJ  
DocID028779 Rev 3  
3/13  
 
 
 
 
 

Electrical characteristics  
STFU10NK60Z  
2
Electrical characteristics  
(T

C

= 25 °C unless otherwise specified)  
Table 5: On /off states  
Symbol  
Parameter  
Test conditions  
V

GS

= 0 V, I

D

=
250 μA  
V

GS

= 0 V, V

DS

= 600 V  
Min. Typ. Max. Unit  
Drain-source breakdown  
voltage  
V

(BR)DSS  

600  
V
1
µA  
µA  
Zero gate voltage drain  
current  
I

DSS  

V

GS

= 0 V, V

DS

= 600
 
V,  
T

C

= 125
 

50  
I

GSS  

Gate-body leakage current  
Gate threshold voltage  
V

DS

= 0 V, V

GS

= +20 V  
V

DS

= V

GS

, I

D

= 250 µA  
±10  
4.5  
µA  
V
V

GS(th)  

3
3.75  
0.68  
Static drain-source  
on- resistance  
0.75  
R

DS(on)  

V

GS

= 10 V, I

D

= 4.5 A  
Ω
Notes:  

(1)

Defined by design, not subject to production test.  
Table 6: Dynamic  
Test conditions  
Symbol  
C

iss  

Parameter  
Input capacitance  
Min. Typ. Max. Unit  
–
–
–
–
–
–
1370  
156  
37  
–
–
–
–
–
–
pF  
pF  
pF  
pF  
nC  
nC  
V

GS

= 0 V, V

DS

= 25 V,  
f = 1 MHz  
Output capacitance  
C

oss  

Reverse transfer capacitance  
C

rss  

C

oss e

Equivalent output capacitance
 
V

GS

= 0 V, V

DS

= 0 to 480 V  
93  
Q

g  

Total gate charge  
V

DD

= 480 V, I

D

= 8 A,  
V

GS

= 10 V  
48  
Q

gs  

Gate-source charge  
8
Q

gd  

Gate-drain charge  
–
25  
–
nC  
Notes:  
(1)  
C
oss eq  
is defined as a constant equivalent capacitance giving the same charging time as C

oss

when V

DS  

increases from 0 to 80%  
Table 7: Switching times  
Test conditions  
Symbol  
t

d(on)  

t

r  

Parameter  
Min. Typ. Max. Unit  
Turn-on delay time  
Rise time  
V

DD

= 300 V, I

D

= 4 A,  
–
–
–
20  
20  
55  
–
–
–
ns  
ns  
ns  
R

G

= 4.7
Ω, V

GS

= 10 V  
t

d(off)  

Turn-off delay time  
t

f  

Fall time  
–
30  
–
ns  
4/13  
DocID028779 Rev 3  
 
 
 
 
 

STFU10NK60Z  
Symbol  
Electrical characteristics  
Min. Typ. Max. Unit  
Table 8: Source drain diode  
Test conditions  
Parameter  
Source-drain current  
–
–
10  
36  
V
A
Source-drain current  
(pulsed)  
t

rr  

Forward on voltage  
I

SD

= 10 A, V

GS

= 0 V  
–
–
–
1.6  
V
Reverse recovery time  
Reverse recovery charge  
I

SD

= 8 A, di/dt = 100 A/µs,  
570  
4.1  
ns  
µC  
V

DD

= 40 V , T

J

= 150 °C  
Q

rr  

I

RRM  

Reverse recovery current  
–
15  
A
Notes:  

(1)

Limited by package  

(2)

Pulse width limited by safe operating area  

(3)

Pulsed: pulse duration = 300 µs, duty cycle 1.5%  
Table 9: Gate-source Zener diode  
Symbol  
Parameter  
Test conditions  
Min. Typ. Max. Unit  
±30  
Gate-source breakdown  
voltage  
I

GS

= ±1 mA, I

D

= 0 A  
V

(BR)GSO  

–
–
V
The built-in back-to-back Zener diodes are specifically designed to enhance the ESD  
performance of the device. The Zener voltage facilitates efficient and cost-effective device  
integrity protection, thus eliminating the need for additional external componentry.  
DocID028779 Rev 3  
5/13  
 
 
 
 

Electrical characteristics  
STFU10NK60Z  
2.1  
Electrical characteristics (curves)  
Figure 2: Safe operating area  
Figure 3: Thermal impedance  
Figure 5: Gate charge vs gate-source voltage  
Figure 4: Output characteristics  
6/13  
DocID028779 Rev 3  

STFU10NK60Z  
Figure 6: Capacitance variations  
Electrical characteristics  
Figure 7: Static drain-source on-resistance  
Figure 8: Normalized gate threshold voltage vs  
temperature  
Figure 9: Normalized on-resistance vs temperature  
DocID028779 Rev 3  
7/13  

Electrical characteristics  
Figure 10: Source-drain diode forward  
characteristics  
STFU10NK60Z  
Figure 11: Maximum avalanche energy  
8/13  
DocID028779 Rev 3  

STFU10NK60Z  
Test circuits  
3
Test circuits  
Figure 12: Test circuit for resistive load  
switching times  
Figure 13: Test circuit for gate charge  
behavior  
Figure 14: Test circuit for inductive load  
switching and diode recovery times  
Figure 15: Unclamped inductive load test  
circuit  
Figure 17: Switching time waveform  
Figure 16: Unclamped inductive waveform  
DocID028779 Rev 3  
9/13  

Package information  
STFU10NK60Z  
4
Package information  
In order to meet environmental requirements, ST offers these devices in different grades of  
ECOPACK

®

packages, depending on their level of environmental compliance. ECOPACK

®  

specifications, grade definitions and product status are available at:

.  
ECOPACK

®

is an ST trademark.  
4.1  
TO-220FP ultra narrow leads package information  
Figure 18: TO-220FP ultra narrow leads package outline  
8576148_1  
10/13  
DocID028779 Rev 3  

STFU10NK60Z  
Package information  
Table 10: TO-220FP ultra narrow leads mechanical data  
mm  
Dim.  
Min.  
4.40  
2.50  
2.50  
0.45  
0.65  
–
Typ.  
Max.  
4.60  
2.70  
2.75  
0.60  
0.75  
0.90  
5.20  
2.70  
10.40  
15.90  
30.50  
11.00  
3.10  
16.40  
9.30  
3.60  
1.30  
3.20  
A
B
D
E
F
F1  
G
4.95  
2.40  
10.00  
15.10  
28.50  
10.20  
2.50  
15.60  
9.00  
3.20  
–
G1  
H
2.54  
L2  
L3  
L4  
L5  
L6  
L7  
L8  
L9  
Dia.  
3.00  
DocID028779 Rev 3  
11/13  

Revision history  
STFU10NK60Z  
5
Revision history  
Table 11: Document revision history  
Changes  
Date  
Revision  
07-Jan-2016  
1
Initial release.  
Document status changed from preliminary to production data.  
Minor text changes.  
12-Sep-2016  
05-Dec-2016  
2
3
Updated Features on cover page.  
Minor text changes  
12/13  
DocID028779 Rev 3  

STFU10NK60Z  
IMPORTANT NOTICE
–
PLEASE READ CAREFULLY  
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, and  
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der  
acknowledgement.  
Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the  
design of Purchasers’ products.  
No license, express or implied, to any intellectual property right is granted by ST herein.  
Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product.  
ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners.  
Information in this document supersedes and replaces information previously supplied in any prior versions of this document.  
© 2016 STMicroelectronics
–
All rights reserved  
DocID028779 Rev 3  
13/13