STMicroelectronics-STGIB10CH60TS-LZ
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STGIB10CH60TS-LZ
Datasheet
SLLIMM – 2
nd
series IPM, 3-phase inverter, 15 A, 600 V, short
‑
circuit rugged IGBT
Features
•
IPM 15 A, 600
V
, 3-phase IGBT inverter bridge including 2 control ICs for gate
driving and freewheeling diodes
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
3.3
V
, 5 V
T
TL/CMOS inputs with hysteresis
Internal bootstrap diode
Undervoltage lockout of gate drivers
Smart shutdown function
Short-circuit protection
Shutdown input/fault output
Marking area
Separate open emitter outputs
Built-in temperature sensor
Comparator for fault protection
Short-circuit rugged TFS IGBT
Very fast, soft recovery diodes
85 kΩ NTC, UL 1434, CA 4 recognized
Fully isolated package
Isolation rating of 1600 Vrms/min
UL recognition: UL 1557, file E81734
Embedded TVS to enhance ESD protection
SDIP2B-26L type L1
Applications
•
•
•
•
•
•
Product status link
Description
Product summary
This second series of SLLIMM (small low-loss intelligent molded module) provides a
compact, high-performance AC motor drive in a simple, rugged design. It combines
new ST proprietary control ICs (one LS and one HS driver) with an improved short-
circuit rugged trench gate field-stop (TFS) IGB
T
,
m
aking it ideal for motor drives
operating up to 20 kHz in hard-switching circuitries.
Order code
STGIB10CH60TS-LZ
GIB10CH60TS-LZ
SDIP2B-26L type L1
Tube
Marking
Package
Packing
DS13302
–
Rev 2
–
October 2021
For further information contact your local STMicroelectronics sales office.
STGIB10CH60TS-LZ
Internal schematic and pin description
1
Internal schematic and pin description
Figure 1.
Internal schematic diagram and pin configuration
NC(1)
(26)T1
(25)T2
VbootU(2)
VbootV(3)
VbootW(4)
(24)P
(23)U
HinU(5)
HinV(6)
HinW(7)
(22)V
(21)W
VccH(8)
GND(9)
H-side
LinU(10)
LinV(11)
LinW(12)
(20)NU
(19)NV
VccL(13)
SD/OD(14)
Cin(15)
GND(16)
(18)NW
TSO(17)
L-side
GADG310320201209GT
DS13302
–
Rev 2
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STGIB10CH60TS-LZ
Internal schematic and pin description
Table 1.
Pin description
Pin
1
Symbol
NC
Description
–
2
VBOOTu
VBOOTv
VBOOTw
HINu
HINv
HINw
VCCH
GND
LINu
LINv
LINw
VCCL
SD /OD
CIN
Bootstrap voltage for U phase
Bootstrap voltage for V phase
Bootstrap voltage for W phase
High-side logic input for U phase
High-side logic input for V phase
High-side logic input for W phase
High-side low voltage power supply
Ground
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
Low-side logic input for U phase
Low-side logic input for V phase
Low-side logic input for W phase
Low-side low voltage power supply
Shutdown logic input (active low) / open-drain (comparator output)
Comparator input
GND
TSO
NW
Ground
T
e
mperature sensor output
Negative DC input for W phase
Negative DC input for V phase
Negative DC input for U phase
W phase output
NV
NU
W
V
V phase output
U
U phase output
P
Positive DC input
T2
NTC thermistor terminal 2
NTC thermistor terminal 1
T1
DS13302
–
Rev 2
page 3/24
STGIB10CH60TS-LZ
Absolute maximum ratings
2
Absolute maximum ratings
T
J
= 25 °C unless otherwise noted.
Table 2.
Inverter part
Symbol
Parameter
Supply voltage applied between P -N
, -N
, -N
W
Value
450
500
600
15
Unit
V
V
PN
U
V
V
Supply voltage (surge) applied between P -N
, -N
, -N
U V W
V
PN(surge)
V
CES
Collector-emitter voltage each IGBT
V
Continuous collector current each IGBT (T
= 25 °C)
C
±I
A
C
Continuous collector current each IGBT (T
= 80 °C)
10
C
±I
Peak collector current each IGBT (less than 1 ms)
30
A
CP
P
T
o
tal power dissipation at T
= 25°C each IGBT
66
W
TOT
C
Short circuit withstand time, V
= 300
V
, T
=
1
25 °C,
CE
J
t
5
μs
scw
V
= V
= 15 V, V
= 0 to 5 V
boot IN
CC
Table 3.
Control part
Symbol
Parameter
-GND, V
Min.
– 0.3
– 0.3
Max.
20
Unit
V
V
Supply voltage applied between V
Bootstrap voltage
-GND
CCL
CC
CCH
V
619
V
BOOT
V
V
– 21
V
+ 0.3
BOOT
Output voltage applied between U,
V
, W
a
nd GND
Comparator input voltage
V
OUT
BOOT
V
– 0.3
– 0.3
-0.3
20
15
7
V
CIN
V
Logic input voltage applied between HINx, LINx and GND
Open-drain voltage
V
IN
V
V
SD/OD
I
Open-drain sink current
10
5.5
7
mA
V
SD/OD
V
T
e
mperature sensor output voltage
T
e
mperature sensor output current
-0.3
TSO
I
mA
TSO
Table 4.
Total system
Parameter
Symbol
Value
Unit
Isolation withstand voltage applied between each pin and heat sink plate
(AC voltage, t = 60 s)
V
ISO
1600
Vrms
T
Power chips operating junction temperature range
Module operation case temperature range
-40 to 175
-40 to 125
°C
°C
J
T
C
DS13302
–
Rev 2
page 4/24
STGIB10CH60TS-LZ
Thermal data
2.1
Thermal data
Table 5.
Thermal data
Symbol
Parameter
Value
2.26
2.8
Unit
Thermal resistance, junction-to-case single IGBT
Thermal resistance, junction-to-case single diode
R
thJC
°C/W
DS13302
–
Rev 2
page 5/24
STGIB10CH60TS-LZ
Electrical characteristics
3
Electrical characteristics
T
J
= 25 °C unless otherwise specified.
Inverter part
3.1
Table 6.
Static
Symbol
Parameter
Test conditions
= 600
V
, V
= V
=
1
5 V
Min.
Typ. Max. Unit
I
V
V
Collector-cut off current
–
100
µA
CES
CE
CC
boot
= V
CC
boot
IN
–
–
1.5
1.95
I
C
= 10 A
= V
Collector-emitter saturation
voltage
V
V
CE(sat)
V
CC
boot
IN
1.65
I
= 15 A
C
V
= 0
V
, I
=
1
0 A
–
–
1.42
1.54
2.0
V
V
IN
IN
C
V
Diode forward voltage
F
V
= 0
V
, I
=
1
5 A
C
1. Applied
between HINx, LINx and GND for x = U, V, W.
Table 7.
Inductive load switching time and energy
Symbol
Parameter
Turn-on time
Test conditions
Min.
Typ. Max. Unit
t
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
287
146
370
105
270
281
121
23
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
on
t
Cross-over time on
Turn-off time
c(on)
t
ns
µJ
ns
µJ
off
V
V
= 300
V
, V
= V
= 15
V
,
boot
t
Cross-over time off
Reverse recovery time
Turn-on switching energy
Turn-off switching energy
Reverse recovery energy
Turn-on time
DD
CC
c(off)
IN
C
t
rr
E
on
E
off
E
rr
t
315
175
346
89
on
t
Cross-over time on
Turn-off time
c(on)
t
off
V
V
= 300
V
, V
= V
= 15
V
,
boot
t
Cross-over time off
Reverse recovery time
Turn-on switching energy
Turn-off switching energy
Reverse recovery energy
DD
CC
c(off)
IN
C
t
280
459
175
34
rr
E
on
E
off
E
rr
1.
t
and t
include the propagation delay time of the internal drive. t
and t
are the switching times of the IGBT itself
c(off)
on
off
c(on)
under the internally given gate driving condition.
2. Applied
between HINx, LINx and GND for x = U, V, W.
DS13302
–
Rev 2
page 6/24
STGIB10CH60TS-LZ
Inverter part
Figure 2.
Switching time test circuit
I c
Vcc
VCC
HIN
BOOT
HVG
OUT
L
GND
5V
0V
+
C
Vdd
–
VCC
LIN
Input
+
Rsd
Vce
–
+5V
SD
L
V
G
CIN
GND
Figure 3.
Switching time definition
100% I
C
100% I
C
t
rr
V
CE
I
C
I
C
V
CE
V
IN
V
IN
t
ON
t
OFF
t
C(OFF)
t
C(ON)
10% I
C
90% I
C
10% V
CE
10% V
CE
10% I
C
V
IN(ON)
V
IN(OFF)
(a) turn-on
(b) turn-off
AM09223V1
DS13302
–
Rev 2
page 7/24
STGIB10CH60TS-LZ
Control/protection parts
3.2
Control/protection parts
Table 8.
High- and low-side drivers
Test condition
Symbol
Parameter
Min.
Typ. Max. Unit
V
Low logic level voltage
0.8
V
V
il
V
High logic level voltage
IN logic “1” input bias current
IN logic “0” input bias current
2
ih
I
IN =
15 V
80
150
200
1
µA
µA
INh
x
I
IN =
0 V
x
INl
High-side
V
V
V
V
V
V
V
UV hysteresis
1.2
11
1.4
11.5
10.1
1
1.7
12
V
V
V
V
V
V
CC_hys
CC
V
V
UV turn-on threshold
CCH_th(on)
CCH_th(off)
CCH
CCH
UV turn-off threshold
9.6
0.5
10.1
9.1
10.6
1.6
V
UV hysteresis
BS_hys
BS
BS
BS
V
UV turn-on threshold
UV turn-off threshold
11
11.9
10.9
BS_th(on)
BS_th(off)
V
10
Under voltage V
quiescent
current
BS
I
V
BS
V
CC
V
CC
V
CC
55
75
µA
µA
µA
QBSU
I
V
quiescent current
BS
125
190
170
250
730
QBS
Under voltage quiescent supply
current
I
qccu
I
Quiescent current
560
150
µA
Ω
qcc
R
V
BS driver ON resistance
DS(on)
Low-side
V
V
V
UV hysteresis
1.1
10.4
9.0
1.4
11.6
10.3
1.6
12.4
11
V
V
V
CC_hys
CC
V
UV turn-on threshold
CCL_th(on)
CCL_th(off)
CCL
CCL
V
UV turn-off threshold
V
= 10
V
,
CC
Under voltage quiescent supply
current
I
SD pulled to 5 V through R
= 10 kΩ,
600
700
800
900
µA
µA
qccu
SD
V
= 15
V
,
S
D= 5
V
,
CC
I
Quiescent current
qcc
V
Smart SD unlatch threshold
SD logic “1” input bias current
SD logic “0” input bias current
0.5
25
0.6
50
0.75
70
1
V
SSD
I
SD = 5 V
SD = 0 V
µA
µA
SDh
I
SDl
1. Applied
between HINx, LINx and GND for x = U, V, W.
DS13302
–
Rev 2
page 8/24
STGIB10CH60TS-LZ
Control/protection parts
Table 9.
Temperature sensor output
Test condition
Symbol
Parameter
Min.
Typ. Max. Unit
T
e
mperature sensor output
voltage
V
T =
25 °C
J
0.974 1.16 1.345
V
TSO
T
e
mperature sensor sink current
capability
I
0.1
mA
mA
TSO_SNK
T
e
mperature sensor source
current capability
I
4
TSO_SRC
Table 10.
Sense comparator (V
CC
= 15
V
,
u
nless otherwise is specified)
Symbol
Parameter
CIN input bias current
Internal reference voltage
Test condition
Min.
-0.2
460
Typ. Max. Unit
I
V
I
= 1 V
CIN
0.2
µA
CIN
V
510
560
mV
ref
Open-drain low level output
voltage
V
= 5 mA
500
410
mV
ns
OD
od
SD pulled to 5 V through R
= 10 kΩ;
SD
measured applying a voltage step 0-1 V
to pin CIN;
t
C
IN
comparator delay to SD
240
320
25
CIN_SD
50% CIN to 90% SD
SD pulled to 5 V through R
= 10 kΩ;
SD
SR
SD fall slew rate
C = 1 nF through SD and ground;
V/µs
SD
L
90% SD to 10% SD
The comparator stays enabled even if V
CC
is in the UVLO condition but higher than 4
V
.
DS13302
–
Rev 2
page 9/24
STGIB10CH60TS-LZ
Fault management
4
Fault management
The device integrates an open-drain output connected to the SD pin. As soon as a fault occurs, the open-drain is
activated and the LVGx outputs are forced low. Two types of fault can be identified:
•
function
);
•
Undervoltage on supply voltage (V
CC
)
Each fault enables the SD open drain for a different time, as described in the following table.
Table 11.
Fault timing
≤ 24 μs
Symbol
Parameter
24 μs
OC time
70 µs
OC
Over-current event
> 24 µs
≤ 70 μs
> 70 µs
UVLO
Under-voltage lockout event
UVLO time
until the VCC_LS exceeds the
VCC_LS UV turn ON threshold
1. Typical
value (-40 °C ≤ T
≤ +125 °C).
J
2. Without
contribution of the RC network on SD.
Actually, the device remains in a fault condition (SD at low logic level and LVGx outputs disabled) for a time also
depending on the RC network connected to the SD pin. The network generates a time contribution that is added
to the internal value.
Figure 4.
Overcurrent timing (without contribution of the RC network on SD)
GIPG120520141638FSR
DS13302
–
Rev 2
page 10/24
STGIB10CH60TS-LZ
Fault management
Figure 5.
UVLO timing (without contribution of the RC network on SD)
GIPG120520141644FSR
DS13302
–
Rev 2
page 11/24
STGIB10CH60TS-LZ
Smart shutdown function
4.1
Smart shutdown function
The device integrates a comparator committed to the fault sensing function. The comparator input can be
connected to an external shunt resistor in order to implement a simple overcurrent detection function.
The output signal of the comparator is fed to an integrated MOSFET with the open drain output available on the
SD input. When the comparator triggers, the device is set in shutdown state and its outputs are all set to low level.
Figure 6.
Smart shutdown timing waveforms in case of overcurrent event
comp
Vref
PROTECTION
CIN
t
CIN_SD
LIN
LVG
SD
l
open-drain gate
(internal)
t
2
t
1
t
OC
real disable time
Fast shutdown:
the driver outputs are set in SD state
t
1
t
2
immediately after comparator triggering
even if the SD signal has not yet reached
the lower input threshold
SHUTDOWN CIRCUIT
where:
V
BIAS
R
SD
SD
FROM / TO
CONTROLLER
SMART
SD
LOGIC
R
PD_SD
R
ON_OD
C
SD
R
PD_SD
(typ.) = 5 V/I
SDh
DS13302
–
Rev 2
page 12/24
STGIB10CH60TS-LZ
Smart shutdown function
In common overcurrent protection designs, the comparator output is usually connected to the SD input and an RC
network is connected to this SD line in order to provide a mono-stable circuit which implements a protection time
that follows the fault condition.
As opposed to common fault detection systems, the device smart shutdown architecture allows the immediate
turn-off of output gates driver in case of fault, by minimizing the propagation delay between the fault detection
event and the actual switching off of the outputs. In fact, the time delay between the fault and the turning off of the
outputs is no longer dependent on the RC value of the external network connected to the pin.
In the smart shutdown circuitry, the fault signal has a preferential path which directly switches off the outputs after
the comparator triggering.
At the same time, the internal logic turns on the open-drain output and holds it on until the SD voltage goes below
the V
SSD
threshold and the t
oc
time is elapsed.
The driver outputs restart following the input pins as soon as the voltage at the SD pin reaches the higher
threshold of the SD logic input.
The smart shutdown system provides the possibility to increase the time constant of the external RC network (i.e.,
the disable time after the fault event) up to very high values without increasing the delay time of the protection.
DS13302
–
Rev 2
page 13/24
STGIB10CH60TS-LZ
Temperature monitoring solutions
5
Temperature monitoring solutions
5.1
TSO output
The device integrates a temperature sensor. A voltage proportional to the die temperature is available on the TSO
pin. When this function is not used, the pin can be left floating.
Figure 7.
V
TSO
output characteristics vs LVIC temperature
IGBT110820161234TSO
V
TSO
(V)
2.8
Min
2.2
1.6
Typ
Max
1.0
0.4
0
25
50
75
100
T (°C)
5.2
NTC thermistor
Table 12.
NTC thermistor
Symbol
Parameter
Test condition
T = 25 °C
Min.
Typ.
85
Max.
Unit
R
25
Resistance
Resistance
B-constant
kΩ
R
125
T = 125 °C
2.6
kΩ
K
B
T = 25 to 100 °C
4092
T
Operating temperature range
-40
125
°C
DS13302
–
Rev 2
page 14/24
STGIB10CH60TS-LZ
NTC thermistor
Figure 8.
NTC resistance vs temperature
GIPG120520142249FSR
R(kΩ)
3000
2500
2000
1500
1000
Typ
500
0
Max
0
Min
-50
-25
25
50
75
100
125
T(°C)
Figure 9.
NTC resistance vs temperature – zoom
GIPG120520141304FSR
R(kΩ)
30
25
20
Max
15
Typ
10
Min
5
0
50
60
70
80
90
100
110
120
T(°C)
DS13302
–
Rev 2
page 15/24
STGIB10CH60TS-LZ
Application circuit example
6
Application circuit example
Figure 10.
Application circuit example
MICROCONTROLLER
GADG310320201430GT
Application designers are free to use a different scheme according to the device specifications.
DS13302
–
Rev 2
page 16/24
STGIB10CH60TS-LZ
Guidelines
6.1
Guidelines
1.
Input signals HIN, LIN are active-high logic. A 100 kΩ (typ.) pull-down resistor is built-in for each input pin.
To
p
revent input signal oscillations, the wiring of each input should be as short as possible and the use of
RC filters (R
1
, C
1
) on each input signal is suggested. The filters should be with a time constant of about 100
ns and placed as close as possible to the IPM input pins.
2.
The use of a bypass capacitor C
VCC
(aluminum or tantalum) can reduce the transient circuit demand on
the power supply. Besides, to reduce any high-frequency switching noise distributed on the power lines, a
decoupling capacitor C
2
(100 to 220 n
F
,
w
ith low ESR and low ESL) should be placed as close as possible
to each V
cc
pin and in parallel with the bypass capacitor.
3.
4.
The use of an RC filter (R
SF
, C
SF
) prevents protection circuit malfunctions. The time constant (R
SF
x C
SF
should be set to 1 µs and the filter must be placed as close as possible to the CIN pin.
)
The SD is an input/output pin (open-drain type if it is used as output). It should be pulled up to a power
supply (i.e., MCU bias at 3.3/5 V) by a resistor value, which can keep the I
od
no higher than 5 mA (V
OD
≤
500 mV when open-drain MOSFET is ON). The filter on SD should be sized to get a desired re-starting time
after a fault event and placed as close as possible to the SD pin.
5.
6.
A decoupling capacitor C
TSO
between 1 nF and 10 nF can be used to increase the noise immunity of the
TSO thermal sensor; a similar decoupling capacitor C
OT
(between 10 nF and 100 nF) can be implemented
if the NTC thermistor is available and used. In both cases, their effectiveness is improved if these capacitors
are placed close to the MCU.
The decoupling capacitor C
3
(100 to 220 nF with low ESR and low ESL) in parallel with each C
boot
filters
high-frequency disturbances. Both C
boot
and C
3
(if present) should be placed as close as possible to the
U,
V
,
W and V
boot
pins. Bootstrap negative electrodes should be connected to the U,
V
,
W terminals directly
and separated from the main output wires.
7.
8.
To
p
revent overvoltage on the V
CC
pin, a Zener diode (Dz) can be used.
The use of the decoupling capacitor C
4
(100 to 220 n
F
,
w
ith low ESR and low ESL) in parallel with the
electrolytic capacitor C
Vdc
prevents surge destruction. Both capacitors C
4
and C
Vdc
should be placed as
close as possible to the IPM (C
4
has priority over C
vdc
).
9.
By integrating an application-specific type HVIC inside the module, direct coupling to the MCU terminals
without an optocoupler is possible.
10. Low
inductance shunt resistors should be used for phase leg current sensing.
11. In
order to avoid malfunctions, the wiring on N pins, the shunt resistor and PWR_GND should be as short as
possible.
12. The
connection of the SGN_GND to the PWR_GND at one point only (close to the shunt resistor terminal)
can reduce the impact of power ground fluctuation.
These guidelines ensure the device specifications for application designs. For further details, please refer to the
relevant application note.
Table 13.
Recommended operating conditions
Symbol
Parameter
Supply voltage
Test conditions
Min.
Typ.
300
15
Max.
400
18
Unit
V
V
Applied between P-Nu, N
, N
PN
V
w
V
Applied between V
-GND
Control supply voltage
High-side bias voltage
13.5
13
V
CC
CC
Applied between V
for i = U,
V
, W
-OUT
BOOTi i
V
18
V
µs
BS
t
Blanking time to prevent arm-short
For each input signal
-40 °C < T
< 100 °C
1.0
dead
C
f
PWM input signal
20
kHz
°C
PWM
-40 °C < T
< 125 °C
J
T
C
Case operation temperature
100
DS13302
–
Rev 2
page 17/24
STGIB10CH60TS-LZ
Electrical characteristics (curves)
7
Electrical characteristics (curves)
Figure 11.
Output characteristics
Figure 12.
V
CE(sat)
vs collector current
IGBT270720151434OC25
IGBT251020161103VCEC
C
V
CE(sat)
(V)
I
(A)
= 18 V
V
CC
V
CC
= 15 V
2.8
2.4
2.0
1.6
24
15 V
T
j
= 175 °C
18
12
13 V
T
j
= 25 °C
6
0
1.2
0.8
0
0.5
1.0
1.5
2.0
(V)
V
CE
0
6
12
18
24
I
C
(A)
Figure 13.
I
C
vs case temperature
Figure 14.
Diode V
F
vs forward current
GADG240420190839CCT
IGBT251020161105DVF
I
C
V
F
(A)
(V)
V
CC
= 15 V
V
CC
≥
15
V
,
T
J
≤
175 °C
16
12
8
1.6
T
j
= 25 °C
1.2
0.8
T
j
= 175 °C
4
0
0.4
0.0
0
25
50
75 100
125 150
0
6
12
18
24
I
F
(A)
T
C
(°C)
Figure 15.
E
ON
switching energy vs collector current
Figure 16.
E
OFF
switching energy vs collector current
IGBT270720151521SLC
IGBT270720151654SLC2
E
ON
E
OFF
(mJ)
(mJ)
V
DD
= 300 V, V
CC
= V
boot
= 15 V
1.8
0.6
V
DD
= 300
V
,
V
CC
= V
boot
15 V
1.5
0.5
0.4
1.2
Tj = 175 °C
Tj = 175 °C
0.3
0.9
0.6
0.2
Tj = 25 °C
Tj = 25 °C
0.1
0.3
0.0
0.0
0
6
12
18
24
I
C
(A)
0
6
12
18
24
I
C
(A)
DS13302
–
Rev 2
page 18/24
STGIB10CH60TS-LZ
Electrical characteristics (curves)
Figure 17.
Thermal impedance
GIPD290720151032FSR
K
10
-1
10
-2
10
-5
10
-4
10
-3
10
-2
10
-1
10
0
t
p
(s)
DS13302
–
Rev 2
page 19/24
STGIB10CH60TS-LZ
Package information
8
Package information
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK
packages,
depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product
8.1
SDIP2B-26L type L1 package information
Figure 18.
SDIP2B-26L type L1 package outline
8450802_7_type_L1_IGBT
DS13302
–
Rev 2
page 20/24
STGIB10CH60TS-LZ
SDIP2B-26L type L1 package information
Table 14.
SDIP2B-26L type L1 package mechanical data
Dimensions (mm)
Typ.
Ref.
Min.
37.50
0.97
Max.
38.50
1.47
A
A1
A2
A3
c
38.00
1.22
0.97
1.22
1.47
34.70
1.45
35.00
1.50
35.30
1.55
B
23.50
24.00
12.00
14.40
29.40
3.50
24.50
B1
B2
B3
C
13.90
28.90
3.30
14.90
29.90
3.70
C1
C2
D
5.00
5.50
6.00
13.50
28.45
2.725
3.356
1.578
7.42
14.00
28.95
3.025
3.556
1.778
7.62
14.50
29.45
3.325
3.756
1.978
7.82
D1
e
e1
e2
e3
e4
E
4.88
5.08
5.28
2.34
2.54
2.74
11.90
3.45
12.40
3.75
12.90
4.05
E1
E2
f
1.80
0.45
0.35
1.95
0.95
1.55
0.375
0°
0.60
0.75
0.65
2.25
1.25
1.60
0.425
5°
f1
0.50
F
2.10
F1
R
1.10
1.575
0.40
T
V
DS13302
–
Rev 2
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STGIB10CH60TS-LZ
Contents
Contents
Internal schematic and pin descriptio
n
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
.
2
Absolute maximum ratings
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
.
4
Thermal data
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5
Electrical characteristics
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
.
6
Inverter part
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
6
Control/protection parts
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
8
Fault managemen
t
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
10
Smart shutdown function
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
.
12
Temperature monitoring solutions
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
14
TSO output
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
.
14
NTC thermistor
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
.
14
Application circuit example
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
16
Guidelines
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
.
17
Electrical characteristics (curves
)
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
18
Package information
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
20
SDIP2B-26L type L1 package informatio
n
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
.
20
Revision history
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
22
DS13302
–
Rev 2
page 23/24
STGIB10CH60TS-LZ
IMPORTANT NOTICE – PLEASE READ CAREFULLY
STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST
products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST
products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement.
Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of
Purchasers’ products.
No license, express or implied, to any intellectual property right is granted by ST herein.
Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product.
ST and the ST logo are trademarks of S
T
.
F
or additional information about ST trademarks, please refer to
www.st.com/trademarks
. All other product or service
names are the property of their respective owners.
Information in this document supersedes and replaces information previously supplied in any prior versions of this document.
© 2021 STMicroelectronics – All rights reserved
DS13302
–
Rev 2
page 24/24
