STMicroelectronics-STGIPL35K120L1
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STGIPL35K120L1
SLLIMM™ (small low-loss intelligent molded module)
IPM, single phase – 35 A, 1200 V short-circuit rugged IGBT
Datasheet
−
preliminary data
Features
■
IPM 35 A, 1200 V single phase IGBT including
control ICs for gate driving and free-wheeling
diodes
■
Short-circuit rugged IGBTs
■
V
CE(sat)
negative temperature coefficient
■
Active Miller clamp feature
■
Undervoltage lockout
■
Desaturation detection
■
Fault status output
SDIP-18L
■
Input compatible with pulse transformer or
optocoupler
■
DBC substrate leading to low thermal
resistance
■
Isolation rating of 2500 V
rms
/min
■
4.7 k
Ω
NTC for temperature control
Applications
■
Power inverters
Description
This intelligent power module provides a compact,
high pe
ormance AC motor drive for a simple and
rugged design. It targets power inverters for air
conditioners. It combines ST proprietary control
ICs with the most advanced short-circuit rugged
IGBT system technolog
y
.
S
LLIMM™ is a
trademark of STMicroelectronics.
Table 1.
Order code
STGIPL35K120L1
Device summary
Marking
Package
Packaging
GIPL35K120L1
SDIP-18L
T
u
be
February 2013
Doc ID 022751 Rev 4
1/19
This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to
change without notice.
19
Contents
STGIPL35K120L1
Contents
Electrical ratings
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5
Thermal data
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
6
Electrical characteristics
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Control part
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
9
3.1.1 NTC
thermistor .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Functional description
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Input .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
12
V
o
ltage reference
. . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . .
12
Active Miller clamp
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
13
Fault status output
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
13
Undervoltage protection
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
13
Revision history
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
2/19
Doc ID 022751 Rev 4
STGIPL35K120L1
Internal block diagram and pin configuration
1
Internal block diagram and pin configuration
Figure 1.
Internal block diagram
Doc ID 022751 Rev 4
3/19
Internal block diagram and pin configuration
STGIPL35K120L1
Table 2.
Pin
Pin description
Symbol
Description
1
2
VH-H
HIN
High side gate driver power supply
High side logic input (active low)
3
VREF-H
FAULT-H
GND-H
T1
High side gate driver +5 V reference voltage
High side gate driver fault output status
High side gate driver ground
NTC thermistor terminal 1
NTC thermistor terminal 2
Low side gate driver power supply
Low side logic input (active low)
Low side gate driver +5 V reference
oltage
Low side gate driver fault output status
Low side gate driver ground
Negative DC input
4
5
6
7
T2
8
VH-L
LIN
9
10
11
12
13
14
15
16
17
18
VREF-L
FAULT-L
GND-L
N
N
Negative D
input
PHASE
PHASE
P
Pha
output
ase output
Positive DC input
P
Positive DC input
Figure 2.
Pin
ayout (bottom view)
12 11 10
9
8
7
6
5
4
3
2
1
Marking area
13
14
15
16
17
18
AM09388v1
4/19
Doc ID 022751 Rev 4
STGIPL35K120L1
Electrical ratings
2
Electrical ratings
2.1
Absolute maximum ratings
T
a
ble 3.
Symbol
Inverter part
Parameter
Value
Unit
V
CE
Each IGBT collector emitter voltage
1200
V
Each IGBT continuous collector current
at T
C
= 25°C
(1)
I
C
35
A
(2)
I
CP
Each IGBT pulsed collector current
70
A
P
TOT
t
scw
Each IGBT total dissipation at T
C
= 25°C
100
W
Short circuit withstand time, V
CE
= 0.5 V
(BR)CES
T
J
= 125 °C, V
H-H
= 15
V
,
V
I
= 1 “logic state”
5
µs
1. Calculated
according to the iterative formula:
T
j
(
max
)
–
T
C
I
C
(
T
C
)
=
–
——————————————————————————————————
R
thj
–
c
×
V
CE
(
sat
)
(
max
)
(
T
j
(
m
x
)
,
I
C
(
T
C
))
2. Pulse
width limited by max junction temperature
T
a
ble 4.
Symbol
Control part
Parame
r
Value
28
Unit
VH
Maximum VH-H, VH-L voltages vs. GND
Voltage on FAU
L
T
p
in
V
V
V
V
fault
V
other
-0.3 to VH+0.3
-0.3 to 7
Voltage on other pins (IN, VREF)
Table
Symbol
Total system
Parameter
Value
Unit
Isolation withstand voltage applied between each
pin and heatsink plate (AC voltage, t = 60 sec.)
V
ISO
2500
V
(1)
T
J
Operating junction temperature for IGBT and diode
Module case operation temperature
-40 to 150
-40 to 125
°C
°C
T
C
1. The
maximum junction temperature rating of the power chips integrated within the SDIP module is 150 °C
(@T
≤
100 °C). To ensure safe operation of the NDIP module, the average junction temperature should
C
be limited to T
≤
125 °C (@T
≤
100 °C).
C
J(avg)
Doc ID 022751 Rev 4
5/19
Electrical ratings
STGIPL35K120L1
2.2
Thermal data
T
a
ble 6.
Symbol
Thermal data
Parameter
Value
Unit
Thermal resistance junction-case single IGBT
Thermal resistance junction-case single diode
0.9
1.4
°C/W
°C/W
R
thJC
Figure 3.
Transient thermal impedance IGBT/diode – inverter
AM09
3
92v1
10
DIODE
1
IGBT
0.1
0.01
0.001
1.E-05
1.E-04
1.E-0
3
1.E-02
1.E-01
1.E+00
1.E+01
time [
s
]
6/19
Doc ID 022751 Rev 4
STGIPL35K120L1
Electrical characteristics
3
Electrical characteristics
T
J
= 25 °C unless otherwise specified.
Table 7.
Symbol
Inverter part
Value
Unit
Parameter
Test conditions
H-H
(V
H-L
) = 15
V
,
V
IN
(1)
= 1 “logic
Min.
Typ.
Max.
V
–
2.8
3.6
state”, I
C
= 30 A
Collector-emitter
saturation voltage
V
CE(sat)
V
V
H-H
(V
H-L
) = 15
V
,
V
IN
(1)
= 1 “logic
state”, I
C
= 30 A, T
J
= 125°C
–
2.4
Collector-cut off current
(V
IN
(1)
= 0 “logic state”)
I
CES
V
F
V
CE
= 1200
V
,
V
H-H
(V
H-L
) = 15 V
V
IN
(1)
= 0 “logic state”, I
F
= 30 A
–
–
10
mA
V
Diode forward voltage
2.3
Switching on/off (inductive load)
(2)
t
on
t
c(on)
t
off
T
u
rn-on time
–
–
–
–
–
–
–
–
–
–
–
–
–
–
720
300
880
275
520
3.7
–
–
–
–
–
–
–
–
–
–
–
–
–
–
Crossover time (on)
T
u
rn-off time
V
V
V
DD
= 600
V
,
ns
mJ
ns
H-H
(V
H-L
) = 15
V
,
t
c(off)
t
rr
Crossover time (off)
Reverse recovery time
T
u
rn-on switching losses
T
u
rn-off switching losses
T
u
rn-on time
E
on
E
off
t
on
1.9
820
350
1400
700
620
5.6
t
c(on)
t
off
t
c(off)
t
rr
Crossover time (
T
u
rn-off time
V
DD
= 600
V
,
V
H-H
(V
H-L
) = 15
V
,
Crossover time (off)
Reverse recovery time
T
u
rn-on switching losses
T
u
rn-off switching losses
I
C
= 30 A, T
J
= 125 °C
E
on
E
off
mJ
5.8
2. and
t include
the propagation delay time of the internal drive. t
t
and t
are the switching time of IGBT itself
C(OFF)
ON
OFF
C(ON)
under the internally given gate driving condition. Parameter values take into account a 20 nH stray inductance.
Doc ID 022751 Rev 4
7/19
Electrical characteristics
Figure 4.
STGIPL35K120L1
Switching time test circuit
Figure 5.
Switching time definiti
100% I
C
100%
I
C
t
rr
V
CE
I
C
I
C
V
CE
V
IN
V
IN
t
ON
t
OFF
t
C(OFF)
t
C(ON)
10%
V
CE
10%
I
C
V
IN(ON)
V
IN(OFF)
10% I
C
90%
I
C
10%
V
CE
(
a
) t
u
rn-on
(
b
) t
u
rn-off
AM09
3
90v1
8/19
Doc ID 022751 Rev 4
STGIPL35K120L1
Electrical characteristics
3.1
Control part
T
A
= – 20 to 125 °C, V
H
= 16 V (unless otherwise specified).
Table 8.
Symbol
Electrical characteristics
Parameter
Test condition
Min
Typ
Max
Unit
Input
V
ton
V
toff
t
onmin
I
inp
IN turn-on threshold voltage
IN turn-off threshold voltage
Minimum pulse width
IN input current
0.8
1.0
4.0
V
V
4.2
220
1
100
135
ns
µA
V
o
ltage reference
(1)
V
ref
I
ref
Voltage reference
Maximum output current
T
min
< T < T
max
4.77
10
5.22
V
mA
Fault output
t
fault
V
FL
Delay for fault detection
FAULT low voltage
500
1
ns
V
I
FLsink
= 10 mA
Under voltage lockout (UVLO)
UVLOH UVLO
top threshold
10
9
11
10
1
12
11
V
V
V
UVLOL UVLO
bottom threshold
V
hyst
Supply current
I
in
Quiescent curren
UVLO hysteresis
UVLOH-UVLOL
0.5
Output = 0
V
,
n
o load
5
mA
1. Recommended
capa
tor range on VREF pin is 10 nF to 100 nF.
Table 9.
Truth table
Logic input (V
I
)
Output
Condition
Low side gate
driver output
High side gate
driver output
LIN
H
HIN
H
0 ‘’logic state”
L
H
L
L
L
half-bridge tri-state
1 “logic state”
L
H
low side direct driving
1 “logic state”
H
L
H
high side direct driving
Note:
X: don’t care
Doc ID 022751 Rev 4
9/19
Electrical characteristics
STGIPL35K120L1
3.1.1
NTC thermistor
T
a
ble 10.
NTC thermistor
Symbol
Parameter
Test conditions
Min. Typ.
Max. Unit.
R
Resistance
T
C
= 25°C
T
C
= 125°C
T
C
= 25°C
4.7
160
k
Ω
Ω
25
R
Resistance
125
B
T
B-constant
3950
K
Operating temperature
-40
150
°C
Equation 1: resistance variation vs. temperature
1
T
1
298
⎛
⎞
⎠
B
–
–
– – ———
⎝
R
(
T
)
=
R
25
⋅
e
Where T are temperatures in Kelvins
Figure 6.
NTC resistance vs. temperature
AM07843v1
R (k
Ω
)
100
10
1
0.1
0.01
T (°C)
-50
0
50
100
10/19
Doc ID 022751 Rev 4
STGIPL35K120L1
Electrical characteristics
3.2
Recommendations
●
As the IPM may be used in a very noisy environment, care should be taken to decouple
the supplies. Small ceramic capacitors, connected inside the IPM as close as possible
to the gate driver pins, are used to improve noise-withstand capabilit
y
.
●
The IPM is compatible with both pulse transformers or optocouplers. When using an
optocoupler, the IN input must be limited to approximately 5
V
.
T
he pull-up resistor to
V
H
must be between 5 k
Ω
and 20 k
Ω
, depending on optocoupler characteristics. An
optional filtering capacitor can be added in the event of a highly noisy environment,
although the IPM already includes a filtering on input signals and rejects signals
smaller than 100 ns (t
ONMIN
specification).
●
When using a pulse transformer, a 2.5 V reference point can be built from the 5 V V
REF
pin with a resistor divider. The capacitor between the V
REF
pin and the resistor divider
middle point provides decoupling of the 2.5 V reference, and also ensures a high level
on the IN input pin at power-up to start the IPM in OFF state. The waveform from the
pulse transformer must comply with the t
ONMIN
and V
tON
/ V
tOFF
specifications.
T
o
t
urn
ON the IPM outputs, the input signal must be lower than 0.8 V for
least 220 ns.
Conversel
y
,
t
he input signal must be higher than 4.2 V for at le
200 ns to turn OFF
the outputs. A pulse width of about 500 ns at these thresh
d levels is recommended. In
all cases, the input signal at the IN pin must be between 0 and 5
V
.
●
●
To
p
revent the input signals oscillation, the wiring of each input should be as short as
possible.
Electrolytic bus capacitors should be mounted as close to the module bus terminals as
possible. Additional high frequency ce
mic capacitor mounted close to the module
pins will further improve perform
.
●
●
When setting the maximum voltage to be applied between P-N, the internal stray
inductance and the maximum di/dt should be considered. Due to both internal and
layout stray inductances, the di/dt results in a voltage surges between the DC-link
capacitor and the switches during commutations.
FAULT pin i
externally available to provide a feedback signal about IPM status. Please
refer to
dervoltage protection and desaturation fault timing diagrams for more
in
mation. Fault output signals the undervoltage state and is reset only when
undervoltage state disappears. When a desaturation event occurs, the fault output is
pulled down and IPM outputs are low (IGBT off) until the IN input signal is released
(high level), then activated again (low level).
Doc ID 022751 Rev 4
11/19
Functional description
STGIPL35K120L1
4
Functional description
4.1
Input
The input is compatible with optocouplers or pulse transformers. The input is triggered by
the signal edge and allows the use of low-sized, low-cost pulse transformer. Input is active
low (output is high when input is low) to ease the use of optocoupler. When driven by a pulse
transformer, the input pulse (positive and negative) width must be larger than the minimum
pulse width t
onmin
.
4.2
4.3
Voltage reference
A voltage reference is used to create accurate timing for the two-level turn-off with external
resistor and capacitor.
Desaturation protection
The desaturation function provides a protection against o
er-current events. Voltage across
the IGBT is monitored, and the IGBT is turned off if the voltage threshold is reached. A
blanking time is made of an internal current source and a capacitor.
During operation, the DES
A
T
c
apacitor is discharged when IPM output is low (IGBT off).
When the IGBT is turned on, the DES
capacitor starts charging and desaturation
protection is effective after the blanking time (fixed by design showing a typical value of 2
µs).
When a desaturation event occurs, the fault output is pulled down and IPM outputs are low
(IGBT off) until the IN input signal is released (high level), then activated again (low level).
Figure 7.
Des
turation 1200 V
12/19
Doc ID 022751 Rev 4
STGIPL35K120L1
Functional description
4.4
Active Miller clamp
A Miller clamp allows the control of the Miller current during a high d
V
/d
t
situation and can
avoid the use of a negative supply voltage.
During turn-off, the gate voltage is monitored and the clamp output is activated when gate
voltage goes below 2 V (relative to GND). The clamp is disabled when the IN input is
triggered again.
4.5
4.6
Fault status output
Fault output is used to signal a fault event (desaturation, UVLO) to a controller. The fault pin
is designed to drive an optocoupler.
Undervoltage protection
Undervoltage detection protects the application in the event of a low VH supply voltage
(during start-up or a fault situation). Fault output signals the u
ervoltage state and is reset
only when undervoltage state disappears.
Figure 8.
Undervoltage protection
UVH
UVL
VH-Hmin
VH
2V
OUT
AULT
AM17097v1
Doc ID 022751 Rev 4
13/19
Package mechanical data
STGIPL35K120L1
5
Package mechanical data
In order to meet environmental requirements, ST offers these devices in different grades of
ECO
P
A
CK
®
packages, depending on their level of environmental compliance. ECO
P
ACK
®
ECO
P
A
CK
®
is an ST trademark.
Please refer to dedicated technical note TN0107 for mounting instructions.
Table 11.
SDIP-18L package mechanical data
mm.
Dim.
Min.
Typ.
Max.
A
A1
A2
A3
B
49.10
1.10
49.60
1.30
50.10
1.50
1.40
1.60
1.80
44.10
24.00
11.25
27.10
5.0
44.60
24.50
11.85
27.60
5.40
45.10
25.00
12.45
28.10
6.00
B1
B2
C
C1
C2
e
6.50
7.00
7.50
10.35
2.40
10.85
2.60
11.35
2.80
e1
e2
e3
e4
e5
e6
e7
D
11.80
7.10
12.00
7.30
12.20
7.50
4.50
4.70
4.90
5.80
6.00
6.20
6.30
6.50
6.70
10.40
17.00
10.60
17.20
38.00
5.70
10.80
17.40
D1
E
11.80
2.15
E1
F
0.85
0.35
1.55
0.45
0°
1.00
1.15
0.65
1.95
0.65
6°
F1
R
0.50
1.75
T
0.55
V
14/19
Doc ID 022751 Rev 4
STGIPL35K120L1
Figure 9.
Package mechanical data
SDIP-18L package drawing (dimensions are in mm.)
8243339_D
Doc ID 022751 Rev 4
15/19
Package mechanical data
Figure 10.
SDIP-18L shipping tube type A (dimensions are in mm.)
STGIPL35K120L1
16/19
Doc ID 022751 Rev 4
STGIPL35K120L1
Package mechanical data
Figure 11.
SDIP-18L shipping tube type B (dimensions are in mm.)
Doc ID 022751 Rev 4
17/19
Revision history
STGIPL35K120L1
6
Revision history
T
a
ble 12.
Document revision history
Date
Revision
Changes
30-Jan-2012
28-Feb-2012
15-Oct-2012
1
2
3
Initial release.
07-Feb-2013
4
18/19
Doc ID 022751 Rev 4
STGIPL35K120L1
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19/19
