STMicroelectronics-STH315N10F7-6
| Part # | STMicroelectronics-STH315N10F7-6 |
Download  | STMicroelectronics-STH315N10F7-6 |
STH315N10F7-2,
STH315N10F7-6
Automotive-grade N-channel 100
V
, 2.1 m
Ω
typ., 180 A
STripFET™ F7 Power MOSFE
T
s
Datasheet
–
production data
Features
V
DS
R
DS(on)
max.
I
D
Order codes
TAB
TAB
STH315N10F7-2
STH315N10F7-6
100 V
2.3 m
Ω
180 A
2
1
7
3
•
Designed for automotive applications and
1
AEC-Q101 qualified
H
2
PAK-6
H
2
PAK-2
•
Among the lowest R
DS(on)
on the market
•
Excellent figure of merit (FoM)
•
Low C
rss
/C
iss
ratio for EMI immunity
•
High avalanche ruggedness
Applications
Figure 1. Internal schematic diagram
•
Switching applications
Description
These N-channel Power MOSFE
T
s
u
tilize
STripFET™ F7 technology with an enhanced
trench gate structure that results in very low on-
state resistance, while also reducing internal
capacitance and gate charge for faster and more
efficient switching.
Table 1. Device summary
Order codes
STH315N10F7-2
STH315N10F7-6
Marking
Package
Packaging
H
2
PAK-2
H
2
PAK-6
315N10F7
T
a
pe and reel
September 2014
DocID025090 Rev 4
1/19
This is information on a product in full production.
Contents
STH315N10F7-2, STH315N10F7-6
Contents
Electrical ratings
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Electrical characteristics
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Electrical characteristics (curves) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
6
2
2
Revision history
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
2/19
DocID025090 Rev 4
STH315N10F7-2, STH315N10F7-6
Electrical ratings
1
Electrical ratings
Table 2. Absolute maximum ratings
Symbol
V
DS
Parameter
Drain-source voltage
Value
100
Unit
V
V
GS
Gate-source voltage
± 20
180
V
(1)
Drain current (continuous) at T
C
= 25°C
Drain current (continuous) at T
C
=100°C
Drain current (pulsed)
A
I
D
(1)
120
720
A
A
I
D
(2)
I
DM
P
TOT
T
o
tal dissipation at T
C
= 25°C
Derating factor
315
2.1
W
W/°C
Single pulse avalanche energy
(T
J
= 25 °C, L=0.55 mH, I
as
= 65 A)
(3)
1
J
E
AS
T
j
Operating junction temperature
storage temperature
– 55 to 175
°C
T
stg
1. Current
limited by package.
2. Pulse
width limited by safe operating area.
3. Starting
T =25°C, I
=60 A, V
=50 V
J
D
DD
Table 3. Thermal data
Symbol
Parameter
Value
0.48
35
Unit
°C/W
°C/W
R
thj-case
Thermal resistance junction-case
(1)
Thermal resistance junction-pcb max
R
thj-pcb
1. When
mounted on 1 inch² FR-4 board, 2oz Cu
DocID025090 Rev 4
3/19
19
Electrical characteristics
STH315N10F7-2, STH315N10F7-6
2
Electrical characteristics
(T
CASE
= 25 °C unless otherwise specified).
Table 4. On/off states
Symbol
Parameter
Test conditions
Min.
Typ.
Max.
Unit
Drain-source breakdown
voltage
V
(BR)DSS
V
GS
= 0, I
D
= 250 µA
100
V
V
V
GS
= 0, V
DS
= 100 V
GS
= 0, V
DS
= 100
V
,
1
µA
µA
Zero gate voltage drain
current
I
DSS
100
T
C
= 125°C
I
GSS
Gate body leakage current
V
DS
= 0, V
GS
= 20 V
100
4.5
nA
V
V
GS(th)
Gate threshold voltage
V
DS
= V
GS
, I
D
= 250 µA
V
GS
= 10
V
,
I
D
= 60 A
2.5
3.5
2.1
Static drain-source
on- resistance
R
DS(on)
2.3
m
Ω
Table 5. Dynamic
Test conditions
Symbol
C
iss
Parameter
Input capacitance
Output capacitance
Min.
Typ.
12800
3500
Max.
Unit
pF
–
–
–
–
C
oss
V
GS
= 0, V
DS
= 25 V,
f = 1 MHz
pF
Reverse transfer
capacitance
C
rss
–
170
–
pF
Q
g
Q
gs
Q
gd
T
o
tal gate charge
Gate-source charge
Gate-drain charge
–
–
–
180
78
–
–
–
nC
nC
nC
V
DD
= 50 V, I
D
= 180 A,
V
GS
= 10 V
34
Table 6. Switching times
Test conditions
Symbol
Parameter
Turn-on delay time
Rise time
Min.
Typ.
62
Max.
Unit
ns
t
d(on)
t
r
t
d(off)
t
f
–
–
–
–
–
–
–
–
V
DD
= 50 V, I
D
= 90 A
G
= 4.7
Ω
V
GS
= 10 V
108
148
40
ns
R
Turn-off delay time
Fall time
ns
ns
4/19
DocID025090 Rev 4
STH315N10F7-2, STH315N10F7-6
Electrical characteristics
Table 7. Source drain diode
Test conditions
Symbol
Parameter
Min.
Typ.
Max.
Unit
I
SD
Source-drain current
–
180
A
Source-drain current
(pulsed)
(1)
–
720
1.5
A
I
SDM
(2)
Forward on voltage
I
SD
=60 A, V
GS
=0
–
–
–
–
V
ns
nC
A
V
SD
t
rr
Reverse recovery time
85
200
4.7
I
SD
=180 A,
di/dt = 100 A/µs,
V
DD
=80 V, T
j
=150°C
Q
rr
Reverse recovery charge
I
RRM
1. Pulse
width limited by safe operating area.
2. Pulse
duration = 300µs, duty cycle 1.5%
DocID025090 Rev 4
5/19
19
Electrical characteristics
STH315N10F7-2, STH315N10F7-6
2.1
Electrical characteristics (curves)
Figure 2. Safe operating area
Figure 3. Thermal impedance
AM15430v1
280tok
I
D
(A)
K
10
-1
10
-2
δ
=0.5
100
0.2
0.1
0.05
10
1
100µs
0.02
Zth=k Rthj-c
Tj=175°C
Tc=25°C
δ
=tp/
τ
1ms
0.01
Sinlge
pulse
10ms
Single pulse
10
-4
tp
τ
0.1
10
-2
10
-5
10
-3
10
-1
10
V
DS
(V)
p
(s)
t
0.1
1
Figure 4. Output characteristics
Figure 5. Transfer characteristics
AM14734v1
AM14735v1
I
D
(A)
I
D
V
GS
=10V
8V
(A)
V
DS
= 2V
350
300
250
200
150
100
7V
300
250
200
150
100
50
6V
50
0
5V
0
2
8
V
DS
(V)
1
2
3
5
8
V
GS
(V)
0
4
6
0
4
6
7
Figure 6. Gate charge vs gate-source voltage
Figure 7. Static drain-source on-resistance
AM14736v1
AM15431v1
V
GS
(V)
R
DS(on)
(m
Ω
)
V
DD
=50V
I
D
=180A
V
GS
=10V
2.25
2.20
2.15
10
8
6
4
2.10
2.05
2
2
0
80
120
160
40
50
100
150
Q
g
(nC)
I
D
(A)
0
0
6/19
DocID025090 Rev 4
STH315N10F7-2, STH315N10F7-6
Electrical characteristics
Figure 8. Normalized V
(BR)DSS
vs temperature
Figure 9. Capacitance variations
AM14742v1
AM14738v1
V
(BR)DSS
C
(norm)
(pF)
I
D
= 1mA
14000
1.04
1.02
1.00
Ciss
12000
10000
8000
6000
0.98
4000
2000
0.96
0.94
Crss
Coss
0
-75
-25
0
25
75
125
0
60
T
J
(°C)
20
80
V
DS
(V)
100
40
Figure 10. Source-drain diode forward
characteristics
Figure 11. Normalized gate threshold voltage vs
temperature
AM14739v1
AM14741v1
V
SD
V
GS(th)
(V)
(norm)
1.05
I
D
= 250µA
1.0
T
J
=-50°C
0.95
0.85
0.75
0.90
0.80
T
J
=25°C
0.65
0.55
0.45
0.70
0.60
T
J
=150°C
0
-75
-25
0
25
75
125
80
160
I
SD
(A)
T
J
(°C)
40
120
Figure 12. Normalized on-resistance vs
temperature
AM14740v1
R
DS(on)
(norm)
2.0
I
D = 60A
1.6
1.2
0.8
0.4
-75
-25
0
25
75
125
T
J
(°C)
DocID025090 Rev 4
7/19
19
Test circuits
STH315N10F7-2, STH315N10F7-6
3
Test circuits
Figure 13. Switching times test circuit for
resistive load
Figure 14. Gate charge test circuit
V
DD
12V
47k
Ω
1k
Ω
100nF
2200
μ
F
3.3
μ
F
R
L
I
G
=CONST
V
DD
100
Ω
V
i
=20V=V
GMAX
D.U.T.
V
D
R
G
V
GS
2200
μ
F
D.U.T.
V
G
2.7k
Ω
47k
Ω
P
W
1k
Ω
P
W
AM01468v1
AM01469v1
Figure 15. Test circuit for inductive load
switching and diode recovery times
Figure 16. Unclamped inductive load test circuit
L
A
A
A
B
D
S
FAST
DIODE
L=100
μ
H
V
D
G
2200
μ
F
D.U.T.
B
3.3
μ
F
V
DD
3.3
μ
F
1000
μ
F
B
V
DD
25
Ω
I
D
D
G
R
G
S
V
i
D.U.T.
P
w
AM01470v1
AM01471v1
Figure 17. Unclamped inductive waveform
Figure 18. Switching time waveform
t
on
t
off
td
off
V
(BR)DSS
t
r
t
f
td
on
V
D
90%
10%
90%
I
DM
10%
V
GS
V
DS
I
D
0
0
V
DD
V
DD
90%
10%
AM01472v1
AM01473v1
8/19
DocID025090 Rev 4
STH315N10F7-2, STH315N10F7-6
Package mechanical data
4
Package mechanical data
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK
®
packages, depending on their level of environmental compliance. ECOPACK
®
ECOPACK
®
is an ST trademark.
DocID025090 Rev 4
9/19
19
Package mechanical data
STH315N10F7-2, STH315N10F7-6
4.1
H
2
PAK-2, STH315N10F7-2
Figure 19. H²PAK-2 drawing
8159712_C
10/19
DocID025090 Rev 4
STH315N10F7-2, STH315N10F7-6
Package mechanical data
Table 8. H²PAK-2 mechanical data
mm
Dim.
Min.
Typ.
Max.
A
A1
C
4.30
0.03
1.17
4.98
0.50
0.78
10.00
7.40
15.30
1.27
4.93
6.85
1.5
4.80
0.20
1.37
5.18
0.90
0.85
10.40
7.80
15.80
1.40
5.23
7.25
1.7
e
E
F
H
H1
L
–
L1
L2
L3
L4
M
R
2.6
2.9
0.20
0°
0.60
8°
V
DocID025090 Rev 4
11/19
19
Package mechanical data
STH315N10F7-2, STH315N10F7-6
Figure 20. H²PAK-2 recommended footprint (dimensions are in mm)
8159712_C
12/19
DocID025090 Rev 4
STH315N10F7-2, STH315N10F7-6
Package mechanical data
4.2
H
2
PAK-6, STH315N10F7-6
Figure 21. H²PAK-6 drawing
8159693_Rev_F
DocID025090 Rev 4
13/19
19
Package mechanical data
STH315N10F7-2, STH315N10F7-6
Table 9. H²PAK-6 mechanical data
mm
Dim.
Min.
Typ.
Max.
A
A1
C
4.30
0.03
1.17
2.34
4.88
7.42
0.45
0.50
10.00
7.40
14.75
1.27
4.35
6.85
1.5
4.80
0.20
1.37
2.74
5.28
7.82
0.60
0.70
10.40
7.80
15.25
1.40
4.95
7.25
1.75
2.50
0.60
8°
e
e1
e2
E
F
H
–
H1
L
L1
L2
L3
L4
M
R
1.90
0.20
0°
V
14/19
DocID025090 Rev 4
STH315N10F7-2, STH315N10F7-6
Package mechanical data
Figure 22. H²PAK-6 recommended footprint (dimensions are in mm)
footprint_Rev_F
DocID025090 Rev 4
15/19
19
Packaging mechanical data
STH315N10F7-2, STH315N10F7-6
5
Packaging mechanical data
Figure 23. Tape
10 pitches cumulative
tolerance on tape +/- 0.2 mm
P0
D
P2
Top cover
tape
T
E
F
W
K0
B0
A0
D1
P1
User direction of feed
R
Bending radius
User direction of feed
AM08852v2
16/19
DocID025090 Rev 4
STH315N10F7-2, STH315N10F7-6
Packaging mechanical data
Table 10. Tape and reel mechanical data
Tape Reel
mm
mm
Dim.
Dim.
Min.
Max.
Min.
Max.
A0
B0
D
10.5
15.7
1.5
10.7
15.9
1.6
A
B
C
D
G
N
T
330
1.5
12.8
20.2
24.4
100
13.2
26.4
30.4
D1
E
1.59
1.65
11.4
4.8
1.61
1.85
11.6
5.0
F
K0
P0
P1
P2
R
3.9
4.1
11.9
1.9
12.1
2.1
Base qty
Bulk qty
1000
1000
50
T
0.25
23.7
0.35
24.3
W
Figure 24. Reel
T
REEL DIMENSIONS
40mm min.
Access hole
At sl
ot location
B
D
C
N
A
G measured at hub
Full radius
Tape slot
in core for
tape start 25 mm min.
width
AM08851v2
DocID025090 Rev 4
17/19
19
Revision history
STH315N10F7-2, STH315N10F7-6
6
Revision history
Table 11. Document revision history
Date
Revision
Changes
02-Aug-2013
1
Initial release.
03-Sep-2013
2
– Minor text changes
– Minor text changes
27-May-2014
12-Sep-2014
3
4
– Modified: title, features and description in cover page.
18/19
DocID025090 Rev 4
STH315N10F7-2, STH315N10F7-6
IMPORTANT NOTICE – PLEASE READ CAREFUL
L
Y
STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and
improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on
ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order
acknowledgement.
Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or
the design of Purchasers’ products.
No license, express or implied, to any intellectual property right is granted by ST herein.
Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product.
ST and the ST logo are trademarks of S
T
.
A
ll other product or service names are the property of their respective owners.
Information in this document supersedes and replaces information previously supplied in any prior versions of this document.
© 2014 STMicroelectronics – All rights reserved
DocID025090 Rev 4
19/19
19
