STMicroelectronics-STI33N60M6

Part #STMicroelectronics-STI33N60M6
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STMicroelectronics-STI33N60M6
STI33N60M6  
Datasheet  
N-channel 600
V
,
1
05 mΩ typ., 25 A, MDmesh M6 Power MOSFET in an I²PAK  
package  
Features  
TAB  
V
R
max.  
I
D
Order code  
STI33N60M6  
DS  
DS(on)  
600 V  
125 mΩ  
25 A  
•
•
•
•
•
Reduced switching losses  
Lower R

DS(on)

per area vs previous generation  
Low gate input resistance  
100% avalanche tested  
3
2
1
I²PAK  
Zener-protected  
D(2, TAB)  
Applications  
•
•
•
Switching applications  
G(1)  
LLC converters  
Boost PFC converters  
S(3)  
AM01475V1  
Description  
The new MDmesh M6 technology incorporates the most recent advancements to the  
well-known and consolidated MDmesh family of SJ MOSFE
T
s
. STMicroelectronics  
builds on the previous generation of MDmesh devices through its new M6  
technology, which combines excellent R

DS(on)

per area improvement with one of the  
most effective switching behaviors available, as well as a user-friendly experience for  
maximum end-application efficiency.  
Product status link  
Product summary  
Order code  
Marking  
STI33N60M6  
33N60M6  
I²PAK  
Package  
Packing  
Tube  
DS13004
–
Rev 1
–
April 2019  
For further information contact your local STMicroelectronics sales office.  

STI33N60M6  
Electrical ratings  
1
Electrical ratings  
Table 1.
Absolute maximum ratings  
Parameter  
Symbol  
Value  
±25  
25  
Unit  
V
Gate-source voltage  
V
GS  
Drain current (continuous) at T  
Drain current (continuous) at T  
= 25 °C  
case  
case  
I
A
D
= 100 °C  
15.8  
78  
I
Drain current (pulsed)  
A
D
P
T
o
tal power dissipation at T  
= 25 °C  
case  
190  
15  
W
TOT  
dv/dt

dv/dt

Peak diode recovery voltage slope  
MOSFET dv/dt ruggedness  
Storage temperature range  
V/ns  
100  
T
stg  
-55 to 150  
°C  
T
Operating junction temperature range  
j
1. Pulse
 
width limited by safe operating area.  
2.  
3.  
I
≤ 25 A, di/dt ≤ 400 A/μs, V  
< V  
, V
 
= 400 V  
(BR)DSS DD  
SD  
DS(peak)  
V
≤ 480 V  
DS  
Table 2.
Thermal data  
Parameter  
Symbol  
Value  
0.66  
Unit  
°C/W  
°C/W  
R
thj-case  
Thermal resistance junction-case  
Thermal resistance junction-ambient  
R
thj-amb  
62.5  
Table 3.
Avalanche characteristics  
Symbol  
Parameter  
Value  
Unit  
Avalanche current, repetitive or non-repetitive  
I
4
A
AR  
(pulse width limited by T  
)
Jmax  
Single pulse avalanche energy  
(starting T
 
= 25 °C, I
 
= I
 
, V
 
= 50 V)  
E
500  
mJ  
AS  
j
D
AR  
DD  
DS13004
–
Rev 1  
page 2/13  
 
 
 
 

STI33N60M6  
Electrical characteristics  
2
Electrical characteristics  
(T

case

= 25 °C unless otherwise specified)  
Table 4.
On/off states  
Symbol  
Parameter  
Test conditions  
Min.  
Typ.  
Max.  
Unit  
V
V
V
V
T
= 0
V
, I
 
= 1
m
A  
Drain-source breakdown voltage  
600  
V
(BR)DSS  
GS  
GS  
GS  
D
= 0
V
, V
 
=
6
00 V  
1
DS  
I
= 0
V
, V
 
=
6
00 V,  
Zero gate voltage drain current  
µA  
DSS  
DS  
100  
= 125 °C

case  
I
V
= 0
V
, V
 
=
±
25 V  
GS  
Gate-body leakage current  
Gate threshold voltage  
±5  
µA  
V
GSS  
DS  
DS  
GS  
V
V
V
= V
 
, I
 
= 250 µA  
3.25  
4
4.75  
125  
GS(th)  
DS(on)  
GS  
D
R
= 10
V
, I
 
=
1
2.5 A  
D
Static drain-source on-resistance  
105  
mΩ  
1. Defined
 
by design, not subject to production test.  
Table 5.
Dynamic  
Symbol  
Parameter  
Input capacitance  
Test conditions  
Min.  
Typ.  
1515  
128  
4.2  
Max.  
Unit  
C
iss  
–
–
–
–
–
–
–
–
–
–
–
–
–
–
C
oss  
V
V
= 100
V
, f = 1
M
Hz, V
 
= 0 V  
Output capacitance  
pF  
DS  
GS  
C
Reverse transfer capacitance  
Equivalent output capacitance  
Intrinsic gate resistance  
T
o
tal gate charge  
rss  
= 0 to 480
V
, V
 
= 0 V  
C
oss eq.  
269  
1.5  
pF  
Ω
DS  
GS  
R
f = 1 MHz, I
 
= 0 A  
D
G
Q
V
V
= 480
V
, I
 
=
2
5 A,  
33.4  
7.2  
g
DD  
D
= 0 to 10 V  
Q
GS  
Gate-source charge  
gs  
nC  
Q
Gate-drain charge  
–
16.3  
–
gd  
1.  
C
oss eq.  
is defined as a constant equivalent capacitance giving the same charging time as C  
when V
 
increases from 0  
oss DS  
to 80% V  
.
DSS  
Table 6.
Switching times  
Test conditions  
Symbol  
Parameter  
Turn-on delay time  
Min.  
Typ.  
19.5  
33  
Max.  
Unit  
t
V
= 300
V
, I
 
=
1
2.5 A,  
–
–
–
–
–
–
d(on)  
DD  
D
R
G
= 4.7 Ω, V
 
= 10 V  
t
GS  
Rise time  
r
ns  
t
Turn-off delay time  
38.5  
d(off)  
t
Fall time  
–
7.5  
–
f
DS13004
–
Rev 1  
page 3/13  
 
 
 

STI33N60M6  
Electrical characteristics  
Table 7.
Source-drain diode  
Test conditions  
Symbol  
Parameter  
Source-drain current  
Min.  
Typ.  
Max.  
25  
Unit  
A
I
–
–
–
–
–
SD  
I
Source-drain current (pulsed)  
Forward on voltage  
78  
A
SDM  
V
I
I
= 25 A, V
 
= 0 V  
1.6  
V
SD  
GS  
SD  
t
= 25 A, di/dt = 100 A/µs,  
= 60 V  
Reverse recovery time  
Reverse recovery charge  
265  
ns  
µC  
rr  
SD  
V
DD  
Q
rr  
3.07  
I
Reverse recovery current  
–
23.2  
A
RRM  
t
I
V
= 25 A, di/dt = 100 A/µs,  
SD  
Reverse recovery time  
–
–
374  
ns  
rr  
= 60
V
, T
 
=
1
50 °C  
j
DD  
Q
Reverse recovery charge  
5.78  
µC  
rr  
I
Reverse recovery current  
–
30.9  
A
RRM  
1. Pulse
 
width is limited by safe operating area.  
2. Pulsed:
 
pulse duration = 300 µs, duty cycle 1.5%  
DS13004
–
Rev 1  
page 4/13  
 
 

STI33N60M6  
Electrical characteristics (curves)  
2.1  
Electrical characteristics (curves)  
Figure 2.
Thermal impedance  
Figure 1.
Safe operating area  
GC20540_ZTH  
GIPG210620181235SOA  
I

D  

(A)  
K
10

-1  

10

-2  

δ=0.5  
δ=0.2  
t

p

=1 µs  
10

1  

t

p

=10 µs  
t

p

=100 µs  
0.1  
0.05  
0.02  
0.01  
t

p

=1 ms  
in this area is  
limited by R

DS(on)  

Operation  
t

p

=10 ms  
10

0  

T

J

≤
150 °C  
T

C

=25 °C  
V

GS

=10 V  
Single pulse  
single pulse  
10

-1  

-5  
10

-2  

V

DS

(V)  
10  
10

-4  

10  
10

-1  

-3  
t
p
(s)  
10

-1  

10

0  

10

1  

10

2  

Figure 3.
Output characteristics  
Figure 4.
Transfer characteristics  
GIPG150620181232OCH  
GIPG150620181233TCH  
I

D  

I

D  

(A)  
(A)  
V

GS

= 9, 10 V  
70  
60  
50  
40  
30  
20  
70  
60  
50  
40  
30  
20  
V

DS

= 20 V  
V

GS

=8 V  
V

GS

=7 V  
V

GS

=6 V  
V

GS

=5 V  
10  
0
10  
0
0
4
8
12  
16  
V

DS

(V)  
3
4
5
6
7
8
9
V

GS

(V)  
Figure 5.
Gate charge vs gate-source voltage  
Figure 6.
Static drain-source on-resistance  
GIPG150620181237QVG  
GIPG150620181231RID  
V

GS  

(V)  
V

DS  

(V)  
R

DS(on)  

(Ω)  
V

DD

= 480 V  
I

D

= 25 A  
12  
10  
8
600  
500  
400  
300  
200  
100  
V

GS

= 10 V  
0.115  
V

DS  

0.110  
0.105  
6
4
0.100  
0.095  
2
0
0
0
8
16  
24  
32  
40  
Q

g

(nC)  
0
4
8
12  
16  
20  
24  
I

D

(A)  
DS13004
–
Rev 1  
page 5/13  
 

STI33N60M6  
Electrical characteristics (curves)  
Figure 8.
Normalized gate threshold voltage vs  
temperature  
Figure 7.
Capacitance variations  
GIPG150620181232CVR  
C
(pF)  
GIPG150620181230VTH  
V

GS(th)  

(norm.)  
I

D

= 250 μA  
1.1  
10

4  

10

3  

10

2  

C

ISS  

1.0  
0.9  
0.8  
C

OSS  

C

RSS  

f = 1 MHz  
10

1  

10

0  

0.7  
0.6  
10

-1  

10

0  

10

1  

10

2  

V

DS

(V)  
-75  
-25  
25  
75  
125  
T

J

(°C)  
Figure 10.
Normalized V

(BR)DSS

vs temperature  
Figure 9.
Normalized on-resistance vs temperature  
GIPG150620181231RON  
R

DS(on)  

(norm.)  
GIPG150620181231BDV  
V

(BR)DSS  

(norm.)  
V

GS

= 10 V  
2.5  
I

D

= 1 mA  
1.08  
1.04  
1.00  
0.96  
2.0  
1.5  
1.0  
0.5  
0.0  
0.92  
0.88  
-75  
-25  
25  
75  
125  
T

J

(°C)  
-75  
-25  
25  
75  
125  
T

J

(°C)  
Figure 12.
Source-drain diode forward characteristics  
Figure 11.
Output capacitance stored energy  
GADG200620181116EOS  
E

OSS  

GIPG150620181232SDF  
V

SD  

(V)  
(µJ)  
14  
1.1  
12  
10  
8
T

J

= -50 °C  
1.0  
0.9  
T

J

= 25 °C  
0.8  
6
4
0.7  
T

J

= 150 °C  
2
0
0.6  
0.5  
0
100 200 300 400 500 600
 
V

DS

(V)  
0
4
8
12  
16  
20  
24  
I

SD

(A)  
DS13004
–
Rev 1  
page 6/13  

STI33N60M6  
Test circuits  
3
Test circuits  
Figure 13.
Test circuit for resistive load switching times  
Figure 14.
Test circuit for gate charge behavior  
V

DD  

RL  
R

L  

2200  
μF  
3.3  
μF  
I

G

= CONST  
2.7 kΩ  
V

DD  

+
D.U.
T
.  
100 Ω  
V

GS  

V

D  

R

G  

pulse width  
+
D.U.
T
.  
V

G  

V

GS  

2200  
μF  
pulse width  
47 kΩ  
1 kΩ  
AM01469v10  
AM01468v1  
Figure 15.
Test circuit for inductive load switching and  
diode recovery times  
Figure 16.
Unclamped inductive load test circuit  
L
A
A
A
D
S
V

D  

100 µH  
D
fast  
G
D.U.
T
.  
B
diode  
2200  
3.3  
µF  
V

DD  

1000  
µF  
B
+
3.3  
µF  
µF  
B
+
V

DD  

25 Ω  
I

D  

G
D.U.
T
.  
R

G  

S
+
_
D.U.
T
.  
V

i  

pulse width  
AM01471v1  
AM01470v1  
Figure 18.
Switching time waveform  
Figure 17.
Unclamped inductive waveform  
t

on  

t

d(on)  

t

off  

t

d(off)  

V
(BR)DSS  
t

r  

t

f  

V
D  
90%  
90%  
I
DM  
V

DS  

10%  
V

GS  

10%  
0
0
I
D  
V
DD  
V
DD  
90%  
AM01472v1  
10%  
AM01473v1  
DS13004
–
Rev 1  
page 7/13  
 
 
 
 
 

STI33N60M6  
Package information  
4
Package information  
In order to meet environmental requirements, ST offers these devices in different grades of

packages,  
depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product  
status are available at:

. ECOPACK is an ST trademark.  
DS13004
–
Rev 1  
page 8/13  
 
 

STI33N60M6  
I²PAK package information  
4.1  
I²PAK package information  
Figure 19.
I²PAK package outline  
0004982_Rev_H  
DS13004
–
Rev 1  
page 9/13  

STI33N60M6  
I²PAK package information  
Table 8.
I²PAK package mechanical data  
mm  
Dim.  
Min.  
4.40  
2.40  
0.61  
1.14  
0.49  
1.23  
8.95  
2.40  
4.95  
10  
Typ.  
Max.  
4.60  
2.72  
0.88  
1.70  
0.70  
1.32  
9.35  
2.70  
5.15  
10.40  
14  
A
A1  
b
–
–
–
–
–
–
–
–
–
–
–
–
–
b1  
c
c2  
D
e
e1  
E
L
13  
L1  
L2  
3.50  
1.27  
3.93  
1.40  
DS13004
–
Rev 1  
page 10/13  

STI33N60M6  
Revision history  
Table 9.
Document revision history  
Date  
Version  
Changes  
17-Apr-2019  
1
Initial release.  
DS13004
–
Rev 1  
page 11/13  
 

STI33N60M6  
Contents  
Contents  

Electrical ratings

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
.

Electrical characteristics

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
.

Electrical characteristics (curves)

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Test circuits

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
.

Package information

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
.

I²PAK package information

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Revision history

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

DS13004
–
Rev 1  
page 12/13  

STI33N60M6  
IMPORTANT NOTICE – PLEASE READ CAREFULLY  
STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST  
products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST  
products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement.  
Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of  
Purchasers’ products.  
No license, express or implied, to any intellectual property right is granted by ST herein.  
Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product.  
ST and the ST logo are trademarks of S
T
.
F
or additional information about ST trademarks, please refer to

. All other product or service  
names are the property of their respective owners.  
Information in this document supersedes and replaces information previously supplied in any prior versions of this document.  
© 2019 STMicroelectronics – All rights reserved  
DS13004
–
Rev 1  
page 13/13