STMicroelectronics-STI47N60DM6AG

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STMicroelectronics-STI47N60DM6AG
STI47N60DM6AG  
Datasheet  
Automotive-grade N-channel 600
V
,
7
0 mΩ typ., 36 A MDmesh™ DM6  
Power MOSFET in an I²PAK package  
Features  
TAB  
V
R
DS(on)  
max.  
I
D
Order code  
DS  
STI47N60DM6AG  
600 V  
80 mΩ  
36 A  
3
•
•
•
•
•
•
•
AEC-Q101 qualified  
2
1
Fast-recovery body diode  
Lower R

DS(on)

per area vs previous generation  
I²PAK  
Low gate charge, input capacitance and resistance  
100% avalanche tested  
D(2, TAB)  
Extremely high dv/dt ruggedness  
Zener-protected  
G(1)  
Applications  
•
Switching applications  
S(3)  
AM01475V1  
Description  
This high-voltage N-channel Power MOSFET is part of the MDmesh™ DM6 fast-  
recovery diode series. Compared with the previous MDmesh fast generation, DM6  
combines very low recovery charge (Q

rr

), recovery time (t

rr

) and excellent  
improvement in R

DS(on)

per area with one of the most effective switching behaviors  
available in the market for the most demanding high-efficiency bridge topologies and  
ZVS phase-shift converters.  
Product status link  
Product summary  
Order code  
Marking  
STI47N60DM6AG  
47N60DM6  
I²PAK  
Package  
Packing  
Tube  
DS12101
–
Rev 3
–
March 2019  
For further information contact your local STMicroelectronics sales office.  

STI47N60DM6AG  
Electrical ratings  
1
Electrical ratings  
Table 1.
Absolute maximum ratings  
Parameter  
Symbol  
Value  
±25  
36  
Unit  
V
V
Gate-source voltage  
GS  
I
Drain current (continuous) at T
 
= 25 °C  
A
D
D
C
I
Drain current (continuous) at T
 
= 100 °C  
23  
A
C
I
Drain current (pulsed)  
137  
250  
50  
A
D
P
T
o
tal power dissipation at T
 
= 25 °C  
W
TOT  
C
dv/dt

dv/dt

Peak diode recovery voltage slope  
MOSFET dv/dt ruggedness  
V/ns  
°C  
100  
T
Operating junction temperature range  
Storage temperature range  
J
-55 to 150  
T
stg  
1. Pulse
 
width limited by safe operating area  
2.  
3.  
I
≤ 36 A, di/dt ≤ 800 A/μs, V  
< V  
, V
 
= 480 V  
(BR)DSS DD  
SD  
DS(peak)  
V
≤ 480 V  
DS  
Table 2.
Thermal data  
Parameter  
Symbol  
Value  
0.5  
Unit  
R
thj-case  
Thermal resistance junction-case  
Thermal resistance junction-amb  
°C/W  
R
thj-amb  
62.5  
Table 3.
Avalanche characteristics  
Symbol  
Parameter  
Value  
Unit  
Avalanche current, repetitive or not repetitive  
I
7
A
AR  
(pulse width limited by T  
)
jmax  
Single pulse avalanche energy  
(starting T = 25°C, I
 
= I
 
, V
 
= 100 V)  
E
700  
mJ  
AS  
j
D
AR  
DD  
DS12101
–
Rev 3  
page 2/13  
 
 
 
 
 

STI47N60DM6AG  
Electrical characteristics  
2
Electrical characteristics  
T

C

= 25 °C unless otherwise specified  
Table 4.
On/off state  
Symbol  
Parameter  
Test conditions  
Min.  
Typ.  
Max.  
Unit  
V
V
V
V
V
T
= 0
V
, I
 
= 1
m
A  
Drain-source breakdown voltage  
600  
(BR)DSS  
GS  
GS  
GS  
D
= 0
V
, V
 
=
6
00 V  
1
µA  
DS  
I
= 0
V
, V
 
= 600 V,  
Zero gate voltage drain current  
DSS  
DS  
100  
µA  
= 125 °C

C
I
V
V
V
= 0
V
, V
 
=
±
25 V  
Gate body leakage current  
Gate threshold voltage  
±1  
4.75  
80  
µA  
V
GSS  
DS  
GS  
V
= V
 
, I
 
= 250 µA  
3.25  
4
GS(th)  
DS(on)  
DS  
GS  
GS  
D
R
= 10
V
, I
 
=
1
8 A  
D
Static drain-source on-resistance  
70  
mΩ  
1. Defined
 
by design, not subject to production test.  
Table 5.
Dynamic  
Symbol  
Parameter  
Input capacitance  
Test conditions  
Min.  
Typ.  
2350  
160  
2
Max.  
Unit  
pF  
pF  
pF  
pF  
Ω
C
iss  
–
–
–
–
–
–
–
–
–
–
–
–
–
–
C
oss  
V
V
= 100 V, f = 1 MHz, V
 
= 0 V  
Output capacitance  
DS  
GS  
C
Reverse transfer capacitance  
Equivalent output capacitance  
Intrinsic gate resistance  
T
o
tal gate charge  
rss  
= 0 to 480
V
, V
 
= 0 V  
C
oss eq.  
416  
1.6  
55  
DS  
GS  
R
f = 1 MHz open drain  
G
Q
V
V
= 480
V
, I
 
=
3
6 A,  
nC  
nC  
g
DD  
GS  
D
= 0 to 10 V  
Q
Gate-source charge  
12  
gs  
Q
Gate-drain charge  
–
31  
–
nC  
gd  
1.  
C
oss eq.  
is defined as a constant equivalent capacitance giving the same charging time as C  
when V
 
increases from 0  
oss DS  
to 80% V  
.
DSS  
Table 6.
Switching times  
Test conditions  
Symbol  
Parameter  
Turn-on delay time  
Min.  
Typ.  
23  
Max.  
Unit  
ns  
t
V
= 300
V
, I
 
=
1
8 A,  
–
–
–
–
–
–
d(on)  
DD  
D
R
G
= 4.7 Ω, V
 
= 10 V  
t
GS  
Rise time  
5.5  
57  
ns  
r
t
Turn-off delay time  
ns  
d(off)  
t
Fall time  
–
9
–
ns  
f
DS12101
–
Rev 3  
page 3/13  
 
 
 

STI47N60DM6AG  
Electrical characteristics  
Table 7.
Source-drain diode  
Test conditions  
Symbol  
Parameter  
Source-drain current  
Min.  
Typ.  
Max.  
36  
Unit  
A
I
–
–
–
–
–
SD  
I
Source-drain current (pulsed)  
Forward on voltage  
137  
1.6  
A
SDM  
V
I
I
= 36 A, V
 
= 0 V  
V
SD  
GS  
SD  
t
= 36 A, di/dt = 100 A/µs,  
= 60 V  
Reverse recovery time  
Reverse recovery charge  
115  
ns  
µC  
rr  
SD  
V
DD  
Q
rr  
0.54  
I
Reverse recovery current  
–
9.5  
A
RRM  
t
I
= 36 A, di/dt = 100 A/µs,  
= 60 V, T = 150 °C  
Reverse recovery time  
–
–
210  
2.1  
ns  
rr  
SD  
V
Q
DD  
j
Reverse recovery charge  
µC  
rr  
I
Reverse recovery current  
–
20.4  
A
RRM  
1. Pulse
 
width limited by safe operating area  
2. Pulsed:
 
pulse duration = 300 µs, duty cycle 1.5%  
Table 8.
Gate-source Zener diode  
Test conditions  
Symbol  
Parameter  
Min.  
Typ.  
Max.  
Unit  
V
I =
 
±1 mA, I
 
= 0 A  
GS D  
Gate-source breakdown voltage  
±30  
–
–
V
(BR)GSO  
The built-in back-to-back Zener diodes are specifically designed to enhance the ESD performance of the device.  
The Zener voltage facilitates efficient and cost-effective device integrity protection, thus eliminating the need for  
additional external componentry.  
DS12101
–
Rev 3  
page 4/13  
 
 

STI47N60DM6AG  
Electrical characteristics (curves)  
2.1  
Electrical characteristics (curves)  
Figure 1.
Safe operating area  
Figure 2.
Thermal impedance  
GADG200220171036SOA  
I

D  

(A)  
is  
this area  
Operation in  
limited by R

DS(on)  

10

2  

10

1  

10

0  

t

p

=10 µs  
t

p

=100 µs  
T

j

≤
150 °C  
T

c

= 25°C  
single pulse  
t

p

=1 ms  
10

-1  

10

-2  

t

p

=10 ms  
10

-1  

10

0  

10

1  

10

2  

V

DS

(V)  
Figure 3.
Output characteristics  
Figure 4.
Transfer characteristics  
GADG170220171018OCH  
GADG170220171019TCH  
I

D  

I

D  

(A)  
(A)  
V

GS

= 10 V  
V

GS

= 9 V  
120  
100  
80  
120  
100  
80  
V

DS

= 20 V  
V

GS

= 8 V  
V

GS

= 7 V  
60  
60  
40  
40  
V

GS

= 6 V  
20  
0
20  
0
0
4
8
12  
16  
V

DS

(V)  
4
5
6
7
8
9
V

GS

(V)  
Figure 5.
Gate charge vs gate-source voltage  
Figure 6.
Static drain-source on-resistance  
GADG170220171019QVG  
GADG170220171016RID  
V

DS  

(V)  
V

GS  

(V)  
R

DS(on)  

(mΩ)  
V

DD

= 480 V  
I

D

= 36 A  
600  
500  
400  
300  
200  
12  
10  
8
76  
V

GS

= 10 V  
74  
72  
70  
68  
V

DS  

6
4
100  
0
2
66  
64  
0
0
10  
20  
30  
40  
50  
60  
Q

g

(nC)  
0
6
12  
18  
24  
30  
36  
I

D

(A)  
DS12101
–
Rev 3  
page 5/13  
 

STI47N60DM6AG  
Electrical characteristics (curves)  
Figure 7.
Capacitance variations  
Figure 8.
Normalized gate threshold voltage vs  
temperature  
GADG170220171018CVR  
C
(pF)  
GADG191220180856VTH  
V

GS(th)  

(norm.)  
10

4  

10

3  

10

2  

1.1  
C

ISS  

1.0  
0.9  
0.8  
I

D

= 250 µA  
C

OSS  

f = 1 MHz  
10

1  

10

0  

C

RSS  

0.7  
0.6  
-75  
-25  
25  
75  
125  
T

j

(°C)  
10

-1  

10

0  

10

1  

10

2  

V

DS

(V)  
Figure 10.
Normalized V

(BR)DSS

vs temperature  
Figure 9.
Normalized on-resistance vs temperature  
GADG191220180856RON  
R

DS(on)  

(norm.)  
GADG191220180856BDV  
V

(BR)DSS  

(norm.)  
2.5  
1.10  
1.05  
1.00  
0.95  
2.0  
I

D

= 1 mA  
V

GS

= 10 V  
1.5  
1.0  
0.5  
0
0.90  
0.85  
-75  
-25  
25  
75  
125  
T

j

(°C)  
-75  
-25  
25  
75  
125  
T

j

(°C)  
Figure 11.
Source-drain diode forward characteristics  
Figure 12.
Output capacitance stored energy  
GADG170220171018SDF  
V

SD  

(V)  
GIPD280120191305EOS  
E

OSS  

(µJ)  
18  
15  
12  
9
1.2  
1
T

J

= -50 °C  
T

J

= 25 °C  
T

J

= 150 °C  
0.8  
0.6  
6
0.4  
0.2  
3
0
0
6
12  
18  
24  
30  
36  
I

SD

(A)  
0
100 200 300 400 500 600
 
V

DS

(V)  
DS12101
–
Rev 3  
page 6/13  
 

STI47N60DM6AG  
Test circuits  
3
Test circuits  
Figure 13.
Test circuit for resistive load switching times  
Figure 14.
Test circuit for gate charge behavior  
V

DD  

12 V  
47 kΩ  
1 kΩ  
100 nF  
R

L  

2200  
μF  
3.3  
μF  
V

DD  

+
I

G

= CONST  
2.7 kΩ  
V

D  

R

G  

D.U.
T
.  
100 Ω  
V

GS  

pulse width  
+
D.U.
T
.  
V

GS  

V

G  

2200  
μF  
pulse width  
47 kΩ  
1 kΩ  
AM01469v1  
AM01468v1  
Figure 15.
Test circuit for inductive load switching and  
diode recovery times  
Figure 16.
Unclamped inductive load test circuit  
L
A
A
A
D
S
V

D  

100 µH  
D
fast  
G
D.U.
T
.  
B
diode  
2200  
3.3  
µF  
+
V

DD  

1000  
µF  
B
µF  
3.3  
µF  
B
+
V

DD  

I

D  

25 Ω  
G
D.U.
T
.  
R

G  

S
+
_
D.U.
T
.  
V

i  

pulse width  
AM01471v1  
AM01470v1  
Figure 18.
Switching time waveform  
Figure 17.
Unclamped inductive waveform  
t

on  

t

d(on)  

t

off  

t

d(off)  

V
(BR)DSS  
t

r  

t

f  

V
D  
90%  
90%  
I
DM  
V

DS  

10%  
V

GS  

10%  
0
0
I
D  
V
DD  
V
DD  
90%  
10%  
AM01472v1  
AM01473v1  
DS12101
–
Rev 3  
page 7/13  
 
 
 
 

STI47N60DM6AG  
Package information  
4
Package information  
In order to meet environmental requirements, ST offers these devices in different grades of

packages, depending on their level of environmental compliance. ECOPACK

®

specifications, grade definitions  
and product status are available at:

. ECOPACK

®

is an ST trademark.  
DS12101
–
Rev 3  
page 8/13  
 
 

STI47N60DM6AG  
I²PAK package information  
4.1  
I²PAK package information  
Figure 19.
I²PAK package outline  
0004982_Rev_H  
DS12101
–
Rev 3  
page 9/13  

STI47N60DM6AG  
I²PAK package information  
Table 9.
I²PAK package mechanical data  
mm  
Dim.  
Min.  
4.40  
2.40  
0.61  
1.14  
0.49  
1.23  
8.95  
2.40  
4.95  
10  
Typ.  
Max.  
4.60  
2.72  
0.88  
1.70  
0.70  
1.32  
9.35  
2.70  
5.15  
10.40  
14  
A
A1  
b
–
–
–
–
–
–
–
–
–
–
–
–
–
b1  
c
c2  
D
e
e1  
E
L
13  
L1  
L2  
3.50  
1.27  
3.93  
1.40  
DS12101
–
Rev 3  
page 10/13  

STI47N60DM6AG  
Revision history  
Table 10.
Document revision history  
Changes  
Date  
Revision  
12-Apr-2017  
1
2
Initial release.  
15-Mar-2018  
Removed maturity status indication from cover page. The document status is production data.  
Minor text changes.  
11-Mar-2019  
3
DS12101
–
Rev 3  
page 11/13  
 

STI47N60DM6AG  
Contents  
Contents  

Electrical ratings

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
.

Electrical characteristics

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
.

Electrical characteristics (curves)

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Test circuits

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
.

Package information

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
.

I²PAK package information

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Revision history

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Contents

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

DS12101
–
Rev 3  
page 12/13  
 

STI47N60DM6AG  
IMPORTANT NOTICE – PLEASE READ CAREFULLY  
STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST  
products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST  
products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement.  
Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of  
Purchasers’ products.  
No license, express or implied, to any intellectual property right is granted by ST herein.  
Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product.  
ST and the ST logo are trademarks of S
T
.
F
or additional information about ST trademarks, please refer to

. All other product or service  
names are the property of their respective owners.  
Information in this document supersedes and replaces information previously supplied in any prior versions of this document.  
© 2019 STMicroelectronics – All rights reserved  
DS12101
–
Rev 3  
page 13/13