STMicroelectronics-STL135N8F7AG

Part #STMicroelectronics-STL135N8F7AG
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STMicroelectronics-STL135N8F7AG
STL135N8F7AG  
Automotive-grade N-channel 80 V, 3.15
mΩ typ., 120 A  
STripFET™ F7 Power
MOSFET in a
PowerFLAT™ 5×6
package  
Datasheet – production data  
Features  
R

DS(on)  

max.  
Order code  
V

DS  

I

D  

P

TOT  

STL135N8F7AG 80
 
V  
3.6
mΩ  
120 A
 
135 W  
Designed for automotive applications and  
AEC-Q101 qualified  
Among the lowest R

DS(on)

on the market  
Excellent FoM (figure of merit)  
Low C

rss

/C

iss

ratio for EMI immunity  
High avalanche ruggedness  
Wettable flank package  
Applications  
Switching applications  
Figure 1: Internal schematic diagram  
Description  
This N-channel Power MOSFET utilizes  
STripFET™ F7 technology with an enhanced  
trench gate structure that results in very low  
on-state resistance, while also reducing internal  
capacitance and gate charge for faster and more  
efficient switching.  
Table 1: Device summary  
Order code  
Marking  
135N8F7  
Package  
Packing  
STL135N8F7AG  
PowerFLAT™ 5×6  
Tape and reel  
September 2016  
DocID028274 Rev 4  
1/15  
This is information on a product in full production.  

STL135N8F7AG  
Electrical ratings  
1
Electrical ratings  
Table 2: Absolute maximum ratings  
Symbol  
V

DS  

Parameter  
Value  
80  
Unit  
V
Drain-source voltage  
V

GS  

Gate-source voltage  
±20  
120  
98  
V
Drain current (continuous) at T

case

= 25 °C  
Drain current (continuous) at T

case

= 100 °C  
Drain current (pulsed)  
A
A
A
480  
26  
Drain current (continuous) at T

pcb

= 25 °C  
Drain current (continuous) at T

pcb

= 100 °C  
Drain current (pulsed)  
19  
104  
135  
4.8  
1.2  
A
W
W
J
Total dissipation at T

case

= 25 °C  
Total dissipation at T

pcb

= 25 °C  
Single pulse avalanche energy  
Storage temperature range  
T

stg  

T

j  

-55 to 175  
°C  
Operating junction temperature range  
Notes:  

(1)

This value is rated according to R

thj-c  

(2)

Pulse width is limited by safe operating area  

(3)

This value is rated according to R

thj-pcb  

(4)

Starting T

j

= 25 °C, I

D

= 13 A, V

DD

= 50 V  
Table 3: Thermal data  
Symbol  
Parameter  
Thermal resistance junction-pcb  
Thermal resistance junction-case  
Value  
31.3  
1.1  
Unit  
°C/W  
R

thj-p

R

thj-case  

Notes:  

(1)

When mounted on a 1-inch² FR-4 board, 2oz Cu, t < 10 s  
DocID028274 Rev 4  
3/15  
 
 
 
 
 
 

Electrical characteristics  
STL135N8F7AG  
2
Electrical characteristics  
(T

case

= 25 °C unless otherwise specified)  
Table 4: Static  
Test conditions  
Symbol  
Parameter  
Min. Typ. Max. Unit  
Drain-source breakdown  
voltage  
V

(BR)DSS  

V

GS

= 0 V, I

D

= 250 µA  
V

GS

= 0 V, V

DS

= 80 V  
80  
V
1
Zero gate voltage drain  
current  
I

DSS  

µA  
V

GS

= 0 V, V

DS

= 80 V,  
T

j

= 125

10  
I

GSS  

Gate-body leakage current  
Gate threshold voltage  
V

DS

= 0 V, V

GS

= 20 V  
V

DS

= V

GS

, I

D

= 250 µA  
100  
4.5  
nA  
V
V

GS(th)  

2.5  
Static drain-source  
on-resistance  
R

DS(on)  

V

GS

= 10 V, I

D

= 13 A  
3.15  
3.6  
mΩ  
Notes:  

(1)

Defined by design, not subject to production test  
Table 5: Dynamic  
Test conditions  
Symbol  
C

iss  

Parameter  
Input capacitance  
Output capacitance  
Min. Typ. Max. Unit  
6800  
1350  
–
–
–
–
V

DS

= 40 V, f = 1 MHz,  
V

GS

= 0 V  
C

oss  

pF  
nC  
Reverse transfer  
capacitance  
95  
C

rss  

–
–
103  
35  
Q

g  

Q

gs  

Q

gd  

Total gate charge  
Gate-source charge  
Gate-drain charge  
–
–
–
–
–
–
V

DD

= 40 V, I

D

= 26 A,  
V

GS

= 10 V (see

28  
Table 6: Switching times  
Test conditions  
Symbol  
t

d(on)  

t

r  

Parameter  
Turn-on delay time  
Rise time  
Min. Typ. Max. Unit  
V

DD

= 40 V, I

D

= 13 A  
–
–
–
30  
28  
73  
–
–
–
R

G

= 4.7
Ω, V

GS

= 10 V (see  
ns  
t

d(off)  

Turn-off delay time  
t

f  

Fall time  
–
30  
–
4/15  
DocID028274 Rev 4  
 

STL135N8F7AG  
Electrical characteristics  
Min. Typ. Max. Unit  
Table 7: Source-drain diode  
Test conditions  
Symbol  
I

SD  

Parameter  
Source-drain current  
–
–
26  
104  
1.2  
A
A
Source-drain current  
(pulsed)  
t

rr  

Forward on voltage  
V

GS

= 0 V, I

SD

= 26 A  
–
–
V
Reverse recovery time  
47  
66  
ns  
I

SD

= 26 A, di/dt = 100 A/µs,  
V

DD

= 64 V (see

Reverse recovery  
charge  
Q

rr  

–
–
nC  
A
Reverse recovery  
current  
I

RRM  

2.8  
Notes:  

(1)

Pulse width is limited by safe operating area  

(2)

Pulse test: pulse duration = 300 µs, duty cycle 1.5%  
DocID028274 Rev 4  
5/15  
 
 

Electrical characteristics  
STL135N8F7AG  
2.1  
Electrical characteristics (curves)  
Figure 2: Safe operating area  
Figure 3: Thermal impedance  
Figure 5: Transfer characteristics  
Figure 4: Output characteristics  
Figure 7: Static drain-source on-resistance  
Figure 6: Gate charge vs gate-source voltage  
6/15  
DocID028274 Rev 4  
 
 

STL135N8F7AG  
Figure 8: Capacitance variations  
Electrical characteristics  
Figure 9: Normalized gate threshold voltage vs  
temperature  
Figure 11: Normalized V

(BR)DSS

vs temperature  
Figure 10: Normalized on-resistance vs temperature  
Figure 12: Source-drain diode forward characteristics  
DocID028274 Rev 4  
7/15  

Test circuits  
STL135N8F7AG  
3
Test circuits  
Figure 13: Test circuit for resistive load  
switching times  
Figure 14: Test circuit for gate charge  
behavior  
Figure 15: Test circuit for inductive load  
switching and diode recovery times  
Figure 16: Unclamped inductive load test  
circuit  
Figure 18: Switching time waveform  
Figure 17: Unclamped inductive waveform  
8/15  
DocID028274 Rev 4  

STL135N8F7AG  
Package information  
4
Package information  
In order to meet environmental requirements, ST offers these devices in different grades of  
ECOPACK

®

packages, depending on their level of environmental compliance. ECOPACK

®  

specifications, grade definitions and product status are available at:

.  
ECOPACK

®

is an ST trademark.  
4.1  
PowerFLAT™ 5×6 WF type C package information  
Figure 19
: PowerFLAT™ 5×6 WF type C package outline  
8231817_WF_typeC_r14  
DocID028274 Rev 4  
9/15  

Package information  
STL135N8F7AG  
Table 8: PowerFLAT™ 5×6 WF type C mechanical data  
mm  
Dim.  
Min.  
0.80  
0.02  
Typ.  
Max.  
1.00  
0.05  
A
A1  
A2  
b
0.25  
0.30  
5.80  
5.00  
4.15  
4.05  
4.80  
0.25  
0.15  
0.50  
6.10  
5.40  
4.45  
4.35  
5.10  
0.55  
0.45  
C
6.00  
5.20  
D
D2  
D3  
D4  
D5  
D6  
e
4.20  
5.00  
0.40  
0.30  
1.27  
6.40  
E
6.20  
3.50  
2.35  
0.40  
0.08  
0.20  
0.85  
4.00  
3.55  
1.05  
0.90  
0.175  
0°  
6.60  
3.70  
2.55  
0.60  
0.28  
0.45  
1.15  
4.40  
3.85  
1.35  
1.10  
0.375  
12°  
E2  
E3  
E4  
E5  
E6  
E7  
E9  
E10  
K
0.325  
1.00  
4.20  
3.70  
L
1.00  
L1  
θ
0.275  
10/15  
DocID028274 Rev 4  

STL135N8F7AG  
Package information  
Figure 20
: PowerFLAT™ 5×6 recommended footprint (dimensions are in mm)  
8231817_FOOTPRINT_rev14  
DocID028274 Rev 4  
11/15  

Package information  
STL135N8F7AG  
4.2  
PowerFLAT™ 5×6 WF packing information  
Figure 21
: PowerFLAT™ 5×6 WF tape (dimensions are in mm)  
Figure 22:
PowerFLAT™ 5×6 package orientation in carrier tape  
12/15  
DocID028274 Rev 4  

STL135N8F7AG  
Package information  
Figure 23
: PowerFLAT™ 5×6 reel (dimensions are in mm)  
DocID028274 Rev 4  
13/15  

Revision history  
STL135N8F7AG  
5
Revision history  
Table 9: Document revision history  
Changes  
Date  
Revision  
07-Sep-2015  
1
First release.  
Minor text edits.  
15-Sep-2015  
26-Jan-2016  
2
3
On cover page:  
– updated Title and Features.  
Updated
Table 2: “Absolute maximum ratings”
and
Section 4.1:  
“PowerFLAT™ 5×6 WF type C package
information”.  
Updated the silhouette, the title and the features in cover page.  
16-Sep-2016  
4
Minor text changes.  
14/15  
DocID028274 Rev 4  

STL135N8F7AG  
IMPORTANT NOTICE
–
PLEASE READ CAREFULLY  
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, and  
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der  
acknowledgement.  
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Information in this document supersedes and replaces information previously supplied in any prior versions of this document.  
© 2016 STMicroelectronics
–
All rights reserved  
DocID028274 Rev 4  
15/15