STMicroelectronics-STL76DN4LF7AG

Part #STMicroelectronics-STL76DN4LF7AG
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STMicroelectronics-STL76DN4LF7AG
STL76DN4LF7AG  
Automotive-grade dual N-
channel 40 V, 5 mΩ typ., 40 A  
STripFET™ F7 Power MOSFET in a PowerFLAT™ 5×6 DI  
Datasheet – production data  
Features  
Order code  
V

DS  

R

DS(on)

max.  
I

D  

STL76DN4LF7AG  
40 V  
6 mΩ  
40 A  
AEC-Q101 qualified  
Among the lowest R

DS(on)

on the market  
Excellent FoM (figure of merit)  
Low C

rss

/C

iss

ratio for EMI immunity  
High avalanche ruggedness  
Wettable flank package  
Applications  
Switching applications  
Description  
This dual N-channel Power MOSFET utilizes  
STripFET™ F7 technology with an enhanced  
Figure 1: Internal schematic diagram  
trench gate structure that results in very low on-  
state resistance, while also reducing internal  
capacitance and gate charge for faster and more  
efficient switching.  
Table 1: Device summary  
Package  
PowerFLAT

TM

5×6 double island  
Order code  
Marking  
Packing  
STL76DN4LF7AG  
76DN4LF7  
Tape and reel  
July 2017  
DocID029186 Rev 5  
1/16  
This is information on a product in full production.  

STL76DN4LF7AG  
Electrical ratings  
1
Electrical ratings  
Table 2: Absolute maximum ratings  
Symbol  
V

DS  

Parameter  
Value  
40  
Unit  
V
Drain-source voltage  
V

GS  

Gate-source voltage  
±20  
40  
V
Drain current (continuous) at T

C

= 25 °C  
Drain current (continuous) at T

c

= 100 °C  
Drain current (pulsed)  
A
40  
A
160  
71  
A
P

TOT  

T

j  

Total dissipation at T

C

= 25 °C  
Operating junction temperature range  
Storage temperature range  
W
-55 to 175  
°C  
T

stg  

Notes:  

(1)

Drain current is limited by package, the current capability of the silicon is 79 A at 25 °C and 56 A at 100 °C.  

(2)

Pulse width limited by safe operating area.  
Table 3: Thermal data  
Symbol  
Parameter  
Thermal resistance junction-case  
Thermal resistance junction-pcb  
Value  
2.1  
Unit  
°C/W  
°C/W  
R

thj-case  

R

thj-p

32  
Notes:  

(1)

When mounted on FR-4 board of 1 inch², 2oz Cu, t < 10 s.  
DocID029186 Rev 5  
3/16  
 
 
 

Electrical characteristics  
STL76DN4LF7AG  
2
Electrical characteristics  
(T

C

= 25 °C unless otherwise specified)  
Table 4: On/Off states  
Symbol  
Parameter  
Test conditions  
Min. Typ. Max. Unit  
V

(BR)DSS

Drain-source breakdown voltage  
I

D

= 1 mA, V

GS

= 0 V  
40  
V
Zero gate voltage  
V

GS

= 0 V  
I

DSS  

10  
µA  
drain current  
V

DS

= 40 V  
Gate-body leakage  
I

GSS  

V

GS

= ±20 V, V

DS

= 0 V  
100  
nA  
V
current  
V

GS(th)  

R

DS(on)  

Gate threshold voltage  
V

DS

= V

GS

, I

D

= 250 μA  
V

GS

= 10 V, I

D

= 10 A  
V

GS

= 4.5 V, I

D

= 10 A  
1.5  
2.5  
6
5
7
Static drain-source  
on-resistance  
mΩ  
12  
Table 5: Dynamic  
Symbol  
C

iss  

Parameter  
Input capacitance  
Output capacitance  
Test conditions  
Min. Typ. Max. Unit  
–
–
956  
241  
–
–
V

DS

= 25 V, f = 1 MHz,  
V

GS

= 0 V  
C

oss  

pF  
nC  
Reverse transfer  
capacitance  
C

rss  

–
28  
–
Q

g  

Total gate charge  
V

DD

= 20 V, I

D

= 20 A,  
–
–
17  
–
–
V

GS

= 0 to 10 V (see

Q

gs  

Gate-source charge  
3.2  
Q

gd  

Gate-drain charge  
–
4.3  
–
Table 6: Switching times  
Test conditions  
Symbol  
t

d(on)  

t

r  

Parameter  
Turn-on delay time  
Rise time  
Min. Typ. Max. Unit  
V

DD

= 32 V, I

D

= 10 A,  
–
–
–
9
–
–
–
R

G

= 4.7 Ω, V

GS

= 10 V (see  
4.3  
39  
ns  
t

d(off)  

Turn-off delay time  
t

f  

Fall time  
–
10  
–
4/16  
DocID029186 Rev 5  

STL76DN4LF7AG  
Symbol  
Electrical characteristics  
Min. Typ. Max. Unit  
Table 7: Source-drain diode  
Test conditions  
Parameter  
Source-drain current  
–
–
40  
160  
1.3  
A
A
Source-drain current  
(pulsed)  
Forward on voltage  
I

SD

= 40 A, V

GS

= 0 V  
–
–
V
t

rr  

Reverse recovery time  
27  
ns  
I

SD

= 20 A, di/dt = 100 A/µs,  
V

DD

= 32 V (see

Reverse recovery  
charge  
19.5  
Q

rr  

–
–
nC  
A
Reverse recovery  
current  
I

RRM  

1.4  
Notes:  

(1)

Drain current is limited by package, the current capability of the silicon is 79 A at 25 °C.  

(2)

Pulse width limited by safe operating area .  

(3)

Pulsed: pulse duration = 300
μs, duty cycle 1.5%.  
DocID029186 Rev 5  
5/16  
 
 
 

Electrical characteristics  
STL76DN4LF7AG  
2.1  
Electrical characteristics (curves)  
Figure 2: Safe operating area  
Figure 3: Thermal impedance  
Figure 4: Output characteristics  
Figure 5: Transfer characteristics  
Figure 6: Gate charge vs gate-source voltage  
Figure 7: Static drain-source on-resistance  
6/16  
DocID029186 Rev 5  

STL76DN4LF7AG  
Figure 8: Capacitance variations  
Electrical characteristics  
Figure 9: Normalized gate threshold voltage vs  
temperature  
Figure 10: Normalized on-resistance vs temperature  
Figure 11: Normalized V

(BR)DSS

vs temperature  
Figure 12: Source-drain diode forward characteristics  
DocID029186 Rev 5  
7/16  

Test circuits  
STL76DN4LF7AG  
3
Test circuits  
Figure 13: Test circuit for resistive load  
switching times  
Figure 14: Test circuit for gate charge  
behavior  
Figure 15: Test circuit for inductive load  
switching and diode recovery times  
Figure 16: Unclamped inductive load test  
circuit  
Figure 18: Switching time waveform  
Figure 17: Unclamped inductive waveform  
8/16  
DocID029186 Rev 5  

STL76DN4LF7AG  
Package information  
4
Package information  
In order to meet environmental requirements, ST offers these devices in different grades of  
ECOPACK

®

packages, depending on their level of environmental compliance. ECOPACK

®  

specifications, grade definitions and product status are available at:

.  
ECOPACK

®

is an ST trademark.  
DocID029186 Rev 5  
9/16  

Package information  
STL76DN4LF7AG  
4.1  
PowerFLAT 5×6 double island WF type C package  
information  
Figure 19
: PowerFLAT™ 5×6 double island WF type C package outline  
826945_DI_WF_typeC_r16  
10/16  
DocID029186 Rev 5  

STL76DN4LF7AG  
Package information  
Table 8: PowerFLAT™ 5×6 double island WF type C mechanical data  
mm  
Dim.  
Min.  
0.80  
0.02  
Typ.  
Max.  
1.00  
0.05  
A
A1  
A2  
b
0.25  
0.30  
5.80  
5.00  
4.15  
4.05  
4.80  
0.25  
0.15  
1.68  
0.50  
6.10  
5.40  
4.45  
4.35  
5.10  
0.55  
0.45  
1.98  
C
6.00  
5.20  
D
D2  
D3  
D4  
D5  
D6  
D7  
e
4.20  
5.00  
0.40  
0.30  
1.27  
6.40  
E
6.20  
3.50  
2.35  
0.40  
0.08  
0.20  
0.85  
0.55  
4.00  
3.55  
0.90  
0.175  
1.05  
0°  
6.60  
3.70  
2.55  
0.60  
0.28  
0.45  
1.15  
0.75  
4.40  
3.85  
1.10  
0.375  
1.35  
12°  
E2  
E3  
E4  
E5  
E6  
E7  
E8  
E9  
E10  
L
0.325  
1.00  
4.20  
3.70  
1.00  
L1  
K
0.275  
ϴ
DocID029186 Rev 5  
11/16  

Package information  
STL76DN4LF7AG  
Figure 20:
PowerFLAT™ 5×6 double island recommended footprint (dimensions are in mm)  
8256945_FP_std_R16  
12/16  
DocID029186 Rev 5  

STL76DN4LF7AG  
Package information  
4.2  
Packing information  
Figure 21:
PowerFLAT™ 5×6 WF tape (dimensions are in mm)  
Figure 22
: PowerFLAT™ 5×6 package orientation in carrier tape  
DocID029186 Rev 5  
13/16  

Package information  
STL76DN4LF7AG  
Figure 23
: PowerFLAT™ 5×6 reel (dimensions are in mm)  
14/16  
DocID029186 Rev 5  

STL76DN4LF7AG  
Revision history  
5
Revision history  
Table 9: Document revision history  
Changes  
Date  
Revision  
20-Apr-2016  
1
First release.  
Modified: title, features and description in cover page.  
Modified:
Table 4: “On/Off states”
,
Table 5: “Dynamic”
,
Table 6:  
“Switching times”
and
Table 7: “Source-drain diode”
.  
23-Jun-2016  
2
Added:
Section 4.1: “Electrical characteristics (curves)”
.  
Updated:
Section 6.1: “PowerFLAT 5×6 double island WF type C  
package information”
.  
Minor text changes  
27-Jul-2016  
16-Dec-2016  
3
4
Updated
Table 4: “On/Off states”
.  
Updated
Section 4: “Package information”
.  
Minor text changes  
Updated title and features in cover page.  
27-Jul-2017  
5
Document status updated from preliminary to production data.  
DocID029186 Rev 5  
15/16  

STL76DN4LF7AG  
IMPORTANT NOTICE
–
PLEASE READ CAREFULLY  
STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications
, and  
improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST  
products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of or
der  
acknowledgement.  
Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the  
design of Purchasers’ products.  
No license, express or implied, to any intellectual property right is granted by ST herein.  
Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product.  
ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners.  
Information in this document supersedes and replaces information previously supplied in any prior versions of this document.  
© 2017 STMicroelectronics
–
All rights reserved  
16/16  
DocID029186 Rev 5