STMicroelectronics-STL8DN6LF6AG
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STL8DN6LF6AG
Datasheet
Automotive-grade dual N-channel 60
V
,
2
1 mΩ typ., 32 A STripFET F6
Power MOSFET in a PowerFLAT 5×6 DI package
Features
V
R
DS(on)
max.
I
D
P
TOT
Order code
DS
STL8DN6LF6AG
60 V
27 mΩ
32 A
55 W
4
3
•
•
•
•
•
•
AEC-Q101 qualified
2
1
Very low on-resistance
Very low gate charge
PowerFLAT 5×6
double island
High avalanche ruggedness
Low gate drive power loss
Wettable flank package
D1(7, 8)
D2(5, 6)
Applications
G1(2)
G2(4)
•
Switching applications
Description
This device is a dual N-channel Power MOSFET developed using the STripFET F6
technology with a new trench gate structure. The resulting Power MOSFET exhibits
very low R
DS(on)
in all packages.
S1(1)
S2(3)
SC12820
Product status link
Product summary
Order code
Marking
STL8DN6LF6AG
8DN6LF6
PowerFLAT 5×6
double island
Package
Packing
T
a
pe and reel
DS11120
–
Rev 5
–
July 2021
For further information contact your local STMicroelectronics sales office.
STL8DN6LF6AG
Electrical ratings
1
Electrical ratings
Table 1.
Absolute maximum ratings
Parameter
Symbol
Value
60
Unit
V
V
Drain-source voltage
Gate-source voltage
DS
GS
V
±20
32
V
Drain current (continuous) at T
= 25 °C
C
I
A
A
D
Drain current (continuous) at T
= 100 °C
23
C
Drain current (continuous) at T
= 25 °C
9.6
6.8
38
B
I
D
Drain current (continuous) at T
= 100 °C
B
I
Drain current (pulsed)
Drain current (pulsed)
A
A
DM
I
128
55
DM
T
o
tal dissipation at T
= 25 °C (one channel active)
C
P
W
TOT
T
o
tal power dissipation at T
= 25 °C (one channel active)
4.8
B
T
Storage temperature range
°C
°C
stg
-55 to 175
T
Operating junction temperature range
J
1. When
mounted on a 1-inch² FR-4, 2 Oz copper board, t < 10 s.
2. Pulse
width is limited by safe operating area.
Table 2.
Thermal data
Symbol
Parameter
Thermal resistance, junction-to-case
Value
2.7
Unit
R
thJC
°C/W
R
Thermal resistance, junction-to-board
31.3
thJB
1. When
mounted on a 1-inch² FR-4, 2 Oz copper board, t < 10 s.
Table 3.
Avalanche characteristics
Symbol
Parameter
Value
32
Unit
A
I
AV
Avalanche current, not repetitive
Single pulse avalanche energy (starting T
= 25 °C, I
= 38 A, V
= 43.5 V)
E
120
mJ
AS
J
D
DD
DS11120
–
Rev 5
page 2/15
STL8DN6LF6AG
Electrical characteristics
2
Electrical characteristics
T
C
= 25 °C unless otherwise specified.
Table 4.
Static
Symbol
Parameter
Test conditions
Min.
Typ. Max. Unit
V
V
GS
V
GS
V
DS
V
DS
V
GS
V
GS
= 0
V
, I
=
2
50 µA
Drain-source breakdown voltage
Zero gate voltage drain current
Gate-body leakage current
Gate threshold voltage
60
V
(BR)DSS
D
I
= 0
V
, V
=
6
0 V
1
±100
2.5
27
µA
nA
V
DSS
DS
I
= 0
V
, V
=
±
20 V
GSS
GS
V
= V
, I
= 250 µA
1
GS(th)
GS
D
= 10
V
, I
=
9
.6 A
21
25
D
R
Static drain-source on-resistance
mΩ
DS(on)
= 4.5
V
, I
=
9
.6 A
31
D
Table 5.
Dynamic
Symbol
Parameter
Input capacitance
Test conditions
Min.
Typ. Max. Unit
C
iss
–
–
–
–
–
–
1340
90
–
–
–
–
–
–
pF
pF
pF
nC
nC
nC
C
oss
V
V
= 25
V
, f = 1
M
Hz, V
= 0 V
GS
Output capacitance
Reverse transfer capacitance
T
o
tal gate charge
DS
C
rss
60
Q
g
27
= 30
V
, I
=
9
.6 A, V
= 10 V
DD
D
GS
Q
Gate-source charge
Gate-drain charge
4.6
4.3
gs
Q
gd
Table 6.
Switching times
Test conditions
Symbol
Parameter
Turn-on delay time
Rise time
Min.
Typ. Max. Unit
t
–
–
–
–
9.6
20
56
7
–
–
–
–
ns
ns
ns
ns
V
= 30
V
, I
=
1
2.5 A,
d(on)
DD
D
R
G
= 4.7 Ω, V
= 10 V
t
r
GS
t
Turn-off delay time
Fall time
d(off)
t
f
DS11120
–
Rev 5
page 3/15
STL8DN6LF6AG
Electrical characteristics
Table 7.
Source-drain diode
Test conditions
Symbol
Parameter
Source-drain current
Min.
Typ. Max. Unit
I
–
–
–
–
–
9.6
38
A
A
SD
I
Source-drain current (pulsed)
Forward on voltage
SDM
V
V
I
= 0
V
, I
=
9
.6 A
SD
1.3
V
GS
SD
t
rr
= 25 A, di/dt = 100 A/µs,
= 48 V, T
= 25 °C
Reverse recovery time
Reverse recovery charge
22.5
22.2
ns
nC
SD
V
Q
DD
J
rr
I
Reverse recovery current
–
2.0
A
RRM
1. Pulse
width is limited by safe operating area.
2. Pulse
test: pulse duration = 300 µs, duty cycle 1.5%.
DS11120
–
Rev 5
page 4/15
STL8DN6LF6AG
Electrical characteristics (curves)
2.1
Electrical characteristics (curves)
Figure 1.
Safe operating area
Figure 2.
Thermal impedance
GADG210620211108SOA
I
D
(A)
GADG210620211108ZTH
K
0.2 0.1
I
DM
δ = 0.5
10
2
10
1
t
p
=10µs
t
p
=100µs
10
-1
0.05
0.02
0.01
t
p
=1ms
R
DS(on)
max.
T
J
≤
175 °C
t
p
=10ms
R
th
= K*R
thJC
10
0
Single pulse
V
(BR)DSS
T
C
= 25 °C
Single pulse
V
GS
= 10 V
10
-1
10
-2
10
-5
10
-1
10
0
10
1
V
DS
(V)
10
-4
10
-3
10
-2
10
-1
t
p
(s)
Figure 3.
Output characteristics
Figure 4.
Transfer characteristics
GIPG2206157L62A1LOCH
V
GS
= 5, 6, 7, 8, 9, 10 V
GIPG2206157L62A1LTCH
I
D
(A)
I
D
(A)
V
DS
= 1 V
35
30
25
20
15
10
35
30
25
20
15
10
V
GS
= 4 V
V
GS
= 3 V
5
0
5
0
0
1
2
3
4
5
6
7
V
DS
(V)
0
1
2
3
4
5
V
GS
(V)
Figure 5.
Gate charge vs gate-source voltage
Figure 6.
Static drain-source on-resistance
GIPG2206157L62A1LQVG
GIPG2206157L62A1LRID
V
GS
R
DS(on)
(V)
(mΩ)
V
GS
= 10 V
V
DD
= 30 V
I
D
= 9.6 A
21.5
12
21.0
20.5
20.0
19.5
19.0
10
8
6
4
2
0
18.5
18.0
0
5
10
15
20
25
Q
g
(nC)
0
2
4
6
8
10
I
D
(A)
DS11120
–
Rev 5
page 5/15
STL8DN6LF6AG
Electrical characteristics (curves)
Figure 8.
Normalized gate threshold voltage vs
temperature
Figure 7.
Capacitance variations
GIPG2206157L62A1LCVR
C
(pF)
GIPG2206157L62A1LVTH
V
GS(th)
(norm.)
I
D
= 250 µA
1.2
C
ISS
10
3
1.0
0.8
10
2
C
OSS
C
RSS
0.6
0.4
f = 1 MHz
10
1
0
10
20
30
40
50
60
V
DS
(V)
-75
-25
25
75
125 175
T
j
(°C)
Figure 10.
Normalized V
(BR)DSS
vs temperature
Figure 9.
Normalized on-resistance vs temperature
GIPG2206157L62A1LRON
R
DS(on)
(norm.)
GIPG2206157L62A1LBDV
V
(BR)DSS
(norm.)
V
GS
= 10 V
2.2
2.0
1.8
1.6
1.4
1.2
1.0
0.8
I
D
= 250 µA
1.10
1.05
1.00
0.95
0.90
0.6
0.4
-75
-25
25
75
125 175
T
j
(°C)
-75
-25
25
75
125 175
T
j
(°C)
Figure 11.
Source-drain diode forward characteristics
GIPG2206157L62A1LSDF
V
SD
(V)
1.0
T
j
= -55 °C
0.9
T
j
= 25 °C
0.8
0.7
T
j
= 175 °C
0.6
0.5
5
10
15
20
25
30
I
SD
(A)
DS11120
–
Rev 5
page 6/15
STL8DN6LF6AG
Test circuits
3
Test circuits
Figure 12.
Test circuit for resistive load switching times
Figure 13.
Test circuit for gate charge behavior
V
DD
12 V
47 kΩ
1 kΩ
100 nF
R
L
2200
μF
3.3
μF
V
DD
+
I
G
= CONST
2.7 kΩ
V
D
R
G
D.U.
T
.
100 Ω
V
GS
pulse width
+
D.U.
T
.
V
GS
V
G
2200
μF
pulse width
47 kΩ
1 kΩ
AM01469v1
AM01468v1
Figure 14.
Test circuit for inductive load switching and
diode recovery times
Figure 15.
Unclamped inductive load test circuit
L
A
A
A
D
S
V
D
100 µH
D
fast
G
D.U.
T
.
B
diode
2200
3.3
µF
+
V
DD
1000
µF
B
µF
3.3
µF
B
+
V
DD
25 Ω
I
D
G
D.U.
T
.
R
G
S
+
_
D.U.
T
.
V
i
pulse width
AM01471v1
AM01470v1
Figure 17.
Switching time waveform
Figure 16.
Unclamped inductive waveform
t
on
t
d(on)
t
off
t
d(off)
V
(BR)DSS
t
r
t
f
V
D
90%
90%
I
DM
V
DS
10%
V
GS
10%
I
D
0
0
V
DD
V
DD
90%
10%
AM01472v1
AM01473v1
DS11120
–
Rev 5
page 7/15
STL8DN6LF6AG
Package information
4
Package information
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK
packages,
depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product
4.1
PowerFLAT 5×6 double island WF type R package information
Figure 18.
PowerFLAT 5×6 double island WF type R package outline
8256945_typeR-WF_R18
DS11120
–
Rev 5
page 8/15
STL8DN6LF6AG
PowerFLAT 5×6 double island WF type R package information
Table 8.
PowerFLAT 5×6 double island WF type R mechanical data
mm
Dim.
Min.
0.80
0.02
Typ.
Max.
1.00
0.05
A
A1
A2
b
0.25
0.30
5.80
5.00
4.15
4.05
4.80
0.25
0.15
1.68
0.50
6.10
5.40
4.45
4.35
5.10
0.55
0.45
1.98
C
6.00
5.20
D
D2
D3
D4
D5
D6
D7
e
4.20
5.00
0.40
0.30
1.27
6.40
E
6.20
3.50
2.35
0.40
0.08
0.20
0.85
0.55
4.00
3.55
1.275
0.725
0.175
0°
6.60
3.70
2.55
0.60
0.28
0.45
1.15
0.75
4.40
3.85
1.575
0.925
0.375
12°
E2
E3
E4
E5
E6
E7
E8
E9
E10
K
0.325
1.00
4.20
3.70
L
0.825
0.275
L1
θ
DS11120
–
Rev 5
page 9/15
STL8DN6LF6AG
PowerFLAT 5×6 double island WF type R package information
Figure 19.
PowerFLAT 5×6 double island recommended footprint (dimensions are in mm)
8256945_DI_FP_smp_R18
DS11120
–
Rev 5
page 10/15
STL8DN6LF6AG
PowerFLAT 5×6 WF packing information
4.2
PowerFLAT 5×6 WF packing information
Figure 20.
PowerFLAT 5×6 WF tape (dimensions are in mm)
P2
Po
Do
1.50
0.0
E1
1.75
0.1
T
2.0
0.05(I)
4.0
0.1(II)
+
0.1
0.30 0.05
Y
D1
1.50
MIN
R0.30
MAX
Y
A
o
(6.70±0.1)
Ko (1.20±0.1)
P1(8.00±0.1)
SECTION
Y
–
Y
(I)
Measured from centreline of sprocket hole
to centreline of pocket.
(II)
(III)
Cumulative tolerance of 10 sprocket
holes is ± 0.20 .
Base and bulk qua ntity 3000 pcs
Measured from centreline of sprocket
hole to centreline of pocket.
8234350
_
T
a
peWF_rev_C
Figure 21.
PowerFLAT 5×6 package orientation in carrier tape
Pin 1
identification
DS11120
–
Rev 5
page 11/15
STL8DN6LF6AG
PowerFLAT 5×6 WF packing information
Figure 22.
PowerFLAT 5×6 reel (dimensions are in mm)
R0.60
W3
11.9/15.4
PART NO.
1.90
2.50
W2
18.4 (max)
R25.00
ØN
178(±2.0)
A
330 (+0/-4.0)
∅
4.00
∅
2.50
ESD LOGO
W1
12.4 (+2/-0)
ØA
R1.10
Ø21.2
All dimensions are in millimeters
∅
13.00
8234350_Reel_rev_C
CORE DETAIL
DS11120
–
Rev 5
page 12/15
STL8DN6LF6AG
Revision history
Table 9.
Document revision history
Changes
Date
Revision
24-Jun-2015
1
2
First release.
07-Jul-2015
Minor text edits throughout document.
Updated title.
Updated
T
a
ble 2: “Absolute maximum ratings
“,
T
a
ble 3: “Thermal data
” and
T
a
ble 4
:
“
Avalanche characteristics
“.
19-Jan-2016
3
Updated
Figure 2: “Safe operating area
” and
Figure 3: “Thermal impedance
“.
Minor text changes.
Updated
T
a
ble 2: “Absolute maximum ratings”
.
21-Sep-2016
01-Jul-2021
4
5
Updated
Section 4.1: “PowerFLAT™ 5×6 double island WF type R package information”
.
Minor text changes.
Minor text changes.
DS11120
–
Rev 5
page 13/15
STL8DN6LF6AG
Contents
Contents
Electrical ratings
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
.
2
Electrical characteristics
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
.
3
Electrical characteristics (curves)
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5
Test circuits
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
.
7
Package information
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
.
8
PowerFLAT 5×6 double island WF type R package information
. . . . . . . . . . . . . . . . . . . . . . . .
8
PowerFLAT 5×6 WF packing informatio
n
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
11
Revision history
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
13
DS11120
–
Rev 5
page 14/15
STL8DN6LF6AG
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DS11120
–
Rev 5
page 15/15
