STMicroelectronics-STO67N60DM6
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STO67N60DM6
Datasheet
N-channel 600 V, 48 mΩ typ., 58 A MDmesh DM6 Power MOSFET
in a TO
‑
LL package
Features
V
R
DS(on)
max.
I
D
Order code
DS
STO67N60DM6
600 V
59 mΩ
58 A
•
•
•
•
•
•
Fast-recovery body diode
Lower R
DS(on)
per area vs previous generation
Low gate charge, input capacitance and resistance
100% avalanche tested
TO-LL type A2
Extremely high dv/dt ruggedness
Zener-protected
Drain (TAB)
Applications
Gate(1)
•
Switching applications
Driver
source (2)
Power
source (3, 4, 5, 6, 7,8)
Description
N-chG1DS2PS345678DTABZ
This high-voltage N-channel Power MOSFET is part of the MDmesh DM6 fast-
recovery diode series. Compared with the previous MDmesh fast generation,
DM6 combines very low recovery charge (Q
rr
), recovery time (t
rr
) and excellent
improvement in R
DS(on)
per area with one of the most effective switching behaviors
available in the market for the most demanding high-efficiency bridge topologies and
ZVS phase-shift converters.
Product status link
Device summary
Order code
STO67N60DM6
67N60DM6
Marking
Package
Packing
TO-LL type A2
T
a
pe and reel
DS13219
–
Rev 5
–
June 2021
For further information contact your local STMicroelectronics sales office.
STO67N60DM6
Electrical ratings
1
Electrical ratings
Table 1.
Absolute maximum ratings
Parameter
Symbol
Value
±25
58
Unit
V
Gate-source voltage
V
GS
Drain current (continuous) at T
= 25 °C
C
I
A
D
Drain current (continuous) at T
= 100 °C
37
C
I
Drain current (pulsed)
190
240
100
1000
100
A
DM
P
T
o
tal power dissipation at T
= 25 °C
W
TOT
C
Peak diode recovery voltage slope
Peak diode recovery current slope
MOSFET dv/dt ruggedness
V/ns
A/μs
V/ns
°C
T
Storage temperature range
stg
-55 to 150
T
Operating junction temperature range
°C
J
1. Referred
to TO-247 package.
2. Pulse
width is limited by safe operating area.
3.
4.
I
≤ 33 A, V
(peak) < V
, V
= 400 V.
(BR)DSS DD
SD
DS
V
≤ 480 V.
DS
Table 2.
Thermal data
Symbol
Parameter
Value
0.52
43
Unit
R
thJC
Thermal resistance, junction-to-case
°C/W
R
thJB
°C/W
22
1. When
mounted on 1 inch² FR-4 pcb, standard footprint 2 Oz copper board.
2. When
mounted on 40x40mm FR-4 pcb, 6 cm² 2 Oz copper board.
Table 3.
Avalanche characteristics
Symbol
Parameter
Value
9
Unit
A
I
Avalanche current, repetitive or not repetitive (pulse width limited by T
max.)
AR
J
E
Single pulse avalanche energy (starting T
= 25 °C, I
= I
, V
= 50 V)
845
mJ
AS
J
D
AR
DD
DS13219
–
Rev 5
page 2/15
STO67N60DM6
Electrical characteristics
2
Electrical characteristics
T
C
= 25 °C unless otherwise specified.
Table 4.
On /off-states
Symbol
Parameter
Test conditions
Min.
Typ. Max. Unit
V
V
GS
V
GS
V
GS
V
DS
V
DS
V
GS
= 0
V
, I
= 1
m
A
Drain-source breakdown voltage
600
V
(BR)DSS
D
= 0
V
, V
=
6
00 V
1
DS
I
Zero-gate voltage drain current
µA
DSS
100
DS
C
I
= 0
V
, V
=
±
25 V
Gate-body leakage current
Gate threshold voltage
±5
4.75
59
µA
V
GSS
GS
V
= V
, I
= 250 µA
3.25
4.00
48
GS(th)
DS(on)
GS
D
R
= 10
V
, I
=
2
9 A
D
Static drain-source on-resistance
mΩ
1. Defined
by design, not subject to production test.
Table 5.
Dynamic
Symbol
Parameter
Input capacitance
Test conditions
Min.
Typ. Max. Unit
C
iss
–
–
–
–
–
–
–
–
3400
280
2
–
–
–
–
–
–
–
–
pF
pF
pF
pF
Ω
C
oss
V
V
= 0
V
, V
=
1
00
V
, f = 1
M
Hz
Output capacitance
GS
DS
C
rss
Reverse transfer capacitance
Equivalent output capacitance
Intrinsic gate resistance
T
o
tal gate charge
= 0
V
, V
= 0
t
o 480 V
C
oss eq.
520
1.5
GS
DS
R
G
f = 1 MHz open drain
= 480 V, I
= 52 A, V
= 0 to 10 V
Q
72.5
24.5
28.5
nC
nC
nC
g
V
DD
D
GS
Q
Gate-source charge
gs
Q
Gate-drain charge
gd
1.
C
oss eq.
is defined as a constant equivalent capacitance giving the same charging time as C
when V
increases from 0
oss DS
to 80% V
.
DSS
Table 6.
Switching times
Test conditions
Symbol
Parameter
Min.
Typ. Max. Unit
t
Turn-on delay time
Rise time
–
–
–
–
24.5
32
–
–
–
–
ns
ns
ns
ns
V
= 300
V
, I
=
2
3.75 A,
d (on)
DD
D
R
= 4.7 Ω, V
= 10 V
t
r
G
GS
t
Turn-off delay time
Fall time
87.5
8.6
d(off)
t
f
DS13219
–
Rev 5
page 3/15
STO67N60DM6
Electrical characteristics
Table 7.
Source-drain diode
Test conditions
Symbol
Parameter
Source-drain current
Min.
Typ. Max. Unit
I
–
–
–
–
–
58
190
1.6
A
A
SD
I
Source-drain current (pulsed)
Forward on voltage
SDM
V
V
I
= 0
V
, I
=
5
8 A
SD
V
GS
SD
t
rr
= 47.5 A, di/dt = 100 A/µs,
= 60 V
Reverse recovery time
Reverse recovery charge
125
0.6
ns
µC
SD
V
Q
DD
rr
I
Reverse recovery current
–
9.6
A
RRM
t
I
= 47.5 A, di/dt = 100 A/µs,
= 60
V
, T
=
1
50 °C
Reverse recovery time
–
–
228
ns
rr
SD
V
Q
DD
J
Reverse recovery charge
2.34
µC
rr
I
Reverse recovery current
–
20.5
A
RRM
1. Pulse
width is limited by safe operating area.
2. Pulse
test: pulse duration = 300 µs, duty cycle 1.5%.
DS13219
–
Rev 5
page 4/15
STO67N60DM6
Electrical characteristics (curves)
2.1
Electrical characteristics (curves)
Figure 1.
Safe operating area
Figure 2.
Maximum transient thermal impedance
GADG011020201559SOA
GADG191220191258ZTH
I
D
(A)
Z
thJC
(°C/W)
I
DM
duty=0.5
t
p
=1 µs
10
2
10
1
10
0
0.4
0.3
t
p
=10 µs
V
(BR)DSS
0.2
10
-1
0.1
R
DS(on)
max.
0.05
t
p
=100 µs
t
p
=1 ms
10
-2
R
thJC
= 0.52 °C/W
duty = t
on
/ T
10
-1
10
-2
T
C
= 25 °C
T
J
≤
150 °C
single pulse
Single pulse
t
on
t
p
=10 ms
V
DS
(V)
T
10
-3
10
-1
10
0
10
1
10
2
10
-6
10
-5
10
-4
10
-3
10
-2
10
-1
t
p
(s)
Figure 3.
Typical output characteristics
Figure 4.
Typical transfer characteristics
GADG220220190911OCH
GADG220220190912TCH
I
D
I
D
(A)
(A)
160
V
GS
=9 V
V
GS
= 10 V
160
140
120
100
80
V
DS
= 15 V
140
120
100
80
V
GS
=8 V
V
GS
=7 V
60
60
40
40
V
GS
=6 V
10 12 14 V
DS
(V)
20
0
20
0
0
2
4
6
8
4
5
6
7
8
9
V
GS
(V)
Figure 6.
Typical drain-source on-resistance
Figure 5.
Typical gate charge characteristics
GADG030220201050RID
R
DS(on)
GADG131220191131QVG
V
DS
(V)
V
GS
(V)
(mΩ)
V
DD
= 480 V
I
D
= 52 A
V
GS
=10 V
51
600
500
400
300
200
12
10
8
Q
g
50
49
48
Q
gs
Q
gd
6
4
100
0
2
47
46
0
0
20
40
60
80
Q
g
(nC)
0
10
20
30
40
50
I
D
(A)
DS13219
–
Rev 5
page 5/15
STO67N60DM6
Electrical characteristics (curves)
Figure 7.
Typical capacitance characteristics
Figure 8.
Normalized gate threshold vs. temperature
GADG131220191115CVR
GADG131220191107VTH
C
V
GS(th)
(pF)
(norm.)
I
D
= 250 μA
1.1
10
4
C
iss
10
3
1.0
0.9
0.8
10
2
10
1
C
o ss
C
r ss
f = 1 MHz
10
0
0.7
0.6
10
-1
10
-1
10
0
10
1
10
2
V
DS
(V)
-75
-25
25
75
125
T
J
(°C)
Figure 9.
Normalized on-resistance vs. temperature
Figure 10.
Normalized breakdown voltage vs temperature
GADG131220191108RON
GADG131220191109BDV
R
DS(on)
V
(BR)DSS
(norm.)
(norm.)
V
GS
= 10 V
2.2
I
D
= 1 mA
1.08
1.8
1.4
1.0
1.04
1.00
0.96
0.6
0.2
0.92
0.88
-75
-25
25
75
125
T
J
(°C)
-75
-25
25
75
125
Figure 12.
Typical reverse diode forward characteristics
Figure 11.
Output capacitance stored energy
GIPG030220201102SDF
V
SD
(V)
GADG131220191119EOS
E
OSS
(μJ)
1.1
30
T
j
= -50 °C
1.0
25
20
15
10
0.9
T
j
= 25 °C
0.8
0.7
T
j
= 150 °C
5
0
0.6
0.5
0
100 200 300 400 500 600
V
DS
(V)
0
10
20
30
40
50
I
SD
(A)
DS13219
–
Rev 5
page 6/15
STO67N60DM6
Test circuits
3
Test circuits
Figure 14.
Test circuit for gate charge behavior
Figure 13.
Switching times test circuit for resistive load
V
DD
R
L
2200
3.3
µF
R
L
µF
V
DD
+
D.U.
T
.
I
G
= CONST
2.7 kΩ
100 Ω
V
D
R
G
V
GS
V
GS
pulse width
+
D.U.
T
.
V
G
2200
μF
P
W
47 kΩ
GND1
(driver signal)
GND2
(power)
1 kΩ
GND1
GND2
AM15855v1
GADG180720181011SA
Figure 15.
Test circuit for inductive load switching and
diode recovery times
Figure 16.
Unclamped inductive load test circuit
A
A
A
L
D
S
FAST
DIODE
L=100µH
G
D.U.
T
.
B
V
D
2200
µF
3.3
µF
3.3
µF
1000
µF
B
V
DD
B
+
V
DD
+
D
S
25Ω
I
D
G
R
G
D.U.
T
.
V
i
D.U.
T
.
P
w
GND2
GND1
GND1
GND2
AM15858v1
AM15857v1
Figure 18.
Switching time waveform
Figure 17.
Unclamped inductive waveform
t
on
t
d(on)
t
off
t
d(off)
V
(BR)DSS
t
r
t
f
V
D
90%
90%
I
DM
V
DS
10%
V
GS
10%
I
D
0
0
V
DD
V
DD
90%
10%
AM01472v1
AM01473v1
DS13219
–
Rev 5
page 7/15
STO67N60DM6
Package information
4
Package information
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK
packages,
depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product
4.1
TO-LL type A2 package information
Figure 19.
TO-LL type A2 package outline
DM00276569_5_type_A2
DS13219
–
Rev 5
page 8/15
STO67N60DM6
TO-LL type A2 package information
Table 8.
TO-LL type A2 package mechanical data
mm
Typ.
2.30
0.48
0.80
0.46
0.15
10.38
2.45
1.16
9.90
3.50
9.40
8.40
9.70
7.40
2.20
1.20
11.68
5.58
6.15
5.14
0.90
0.72
7.23
1.44
0.70
1.90
Dim.
Min.
2.20
0.40
0.70
Max.
2.40
0.60
0.90
A
A1
b
c
c1
C
10.28
2.35
10.48
2.55
C2
C3
D
9.80
3.30
9.30
8.20
9.50
10.00
3.70
9.50
8.60
9.90
D2
D3
D4
D5
D6
D7
e
E
11.48
11.88
E1
E2
E3
E4
E5
E6
E7
E8
K
7.03
7.43
0.50
1.70
2.40
0.90
2.10
K1
L
0.70
0.44
0.60
11°
L1
L2
θ
0.40
0.80
DS13219
–
Rev 5
page 9/15
STO67N60DM6
TO-LL type A2 package information
Figure 20.
TO-LL type A2 recommended footprint (dimensions are in mm)
DM00276569_5_type_A2
DS13219
–
Rev 5
page 10/15
STO67N60DM6
TO-LL packing information
4.2
TO-LL packing information
Figure 21.
Carrier tape outline and dimensions
Figure 22.
Reel outline and dimensions
DS13219
–
Rev 5
page 11/15
STO67N60DM6
TO-LL packing information
Figure 23.
TO-LL orientation in tape pocket
DS13219
–
Rev 5
page 12/15
STO67N60DM6
Revision history
Table 9.
Document revision history
Changes
Date
Revision
03-Feb-2020
1
First release.
Updated title of the document, section
Features
,
T
a
ble 1. Absolute maximum ratings
,
T
a
ble 4.
On /off-states
and
T
a
ble 7. Source-drain diode
.
20-Mar-2020
28-Jul-2020
2
3
Updated
T
a
ble 1. Absolute maximum ratings
. Added
Section 4.2 TO-LL packing information
.
Updated
title
and
Device summary
in cover page.
Updated
Section 4 Package information.
Minor text changes.
30-Apr-2021
4
Modified features and I
value on cover page.
D
08-Jun-2021
5
Minor text changes.
DS13219
–
Rev 5
page 13/15
STO67N60DM6
Contents
Contents
Electrical ratings
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
.
2
Electrical characteristics
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
.
3
Electrical characteristics (curves)
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5
Test circuits
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
.
7
Package information
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
.
8
TO-LL type A2 package information
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
8
TO-LL packing information
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
11
Revision history
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
13
DS13219
–
Rev 5
page 14/15
STO67N60DM6
IMPORTANT NOTICE – PLEASE READ CAREFULLY
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Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of
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T
.
F
or additional information about ST trademarks, please refer to
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. All other product or service
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Information in this document supersedes and replaces information previously supplied in any prior versions of this document.
© 2021 STMicroelectronics – All rights reserved
DS13219
–
Rev 5
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