STMicroelectronics-STP65N045M9
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STP65N045M9
Datasheet
N-channel 650 V, 39 mΩ typ., 54 A MDmesh M9 Power MOSFET
in a TO-220 package
Features
V
R
DS(on)
max.
I
D
Order code
DS
TAB
STP65N045M9
650 V
45 mΩ
54A
•
•
•
•
•
•
Worldwide best FOM R
DS(on)
*Q
g
among silicon-based devices
Higher V
DSS
rating
3
2
1
TO-220
Higher dv/dt capability
Excellent switching performance
Easy to drive
D(2, TAB)
100% avalanche tested
Applications
•
High efficiency switching applications
G(1)
Description
This N-channel Power MOSFET is based on the most innovative super-junction
MDmesh M9 technology, suitable for medium/high voltage MOSFE
T
s
f
eaturing very
low R
DS(on)
per area. The silicon based M9 technology benefits from a multi-drain
manufacturing process which allows an enhanced device structure. The resulting
product has one of the lower on-resistance and reduced gate charge values, among
all silicon based fast switching super-junction Power MOSFE
T
s
, making it particularly
suitable for applications that require superior power density and outstanding
efficiency.
S(3)
AM01475v1_noZen
Product status link
Product summary
Order code
STP65N045M9
Marking
Package
Packing
65N045M9
TO-220
Tube
DS13506
–
Rev 5
–
September 2023
For further information contact your local STMicroelectronics sales office.
STP65N045M9
Electrical ratings
1
Electrical ratings
Table 1.
Absolute maximum ratings
Parameter
Symbol
Value
±30
54
Unit
V
Gate-source voltage
V
GS
Drain current (continuous) at T
= 25 °C
C
I
A
D
Drain current (continuous) at T
= 100 °C
34
C
I
Drain current (pulsed)
170
245
50
A
DM
P
T
o
tal power dissipation at T
= 25 °C
W
TOT
C
Peak diode recovery voltage slope
Peak diode recovery current slope
MOSFET dv/dt ruggedness
V/ns
A/μs
V/ns
°C
900
120
T
Storage temperature range
stg
-55 to 150
T
Operating junction temperature range
°C
J
1. Referred
to TO-247 long leads package.
2. Pulse
width is limited by safe operating area.
3.
4.
I
≤ 28 A, V
(peak) < V
, V
= 400 V.
(BR)DSS DD
SD
DS
V
(peak) < V
, V
≤ 400 V.
(BR)DSS DD
DS
Table 2.
Thermal data
Parameter
Symbol
Value
0.51
Unit
°C/W
°C/W
R
thJC
Thermal resistance, junction-to-case
Thermal resistance, junction-to-ambient
R
thJA
62.5
Table 3.
Avalanche characteristics
Symbol
Parameter
Value
6
Unit
A
I
Avalanche current, repetitive or non-repetitive (pulse width limited by T
max.)
AR
J
E
Single pulse avalanche energy (starting T
= 25 °C, I
= I
, V
= 50 V)
775
mJ
AS
J
D
AR
DD
DS13506
–
Rev 5
page 2/12
STP65N045M9
Electrical characteristics
2
Electrical characteristics
T
C
= 25 °C unless otherwise specified.
Table 4.
On-/off-states
Symbol
Parameter
Test conditions
Min.
Typ. Max. Unit
V
V
V
V
V
V
V
= 0
V
, I
= 1
m
A
Drain-source breakdown voltage
650
V
(BR)DSS
GS
GS
GS
DS
DS
GS
D
= 0
V
, V
=
6
50 V
1
DS
I
Zero gate voltage drain current
µA
DSS
200
DS
C
I
= 0
V
, V
=
±
25 V
Gate-body leakage current
Gate threshold voltage
±100
4.2
nA
V
GSS
GS
V
= V
, I
= 250 µA
3.2
3.7
39
GS(th)
DS(on)
GS
D
R
= 10
V
, I
=
2
8 A
D
Static drain-source on-resistance
45
mΩ
1. Specified
by design, not tested in production.
Table 5.
Dynamic
Symbol
Parameter
Input capacitance
Test conditions
Min.
Typ. Max. Unit
C
iss
–
–
–
–
–
–
–
4610
76
–
–
–
–
–
–
–
pF
pF
pF
Ω
V
V
= 400
V
, f = 1
M
Hz, V
= 0 V
DS
DS
GS
C
oss
Output capacitance
= 0 to 400
V
, V
= 0 V
C
oss eq.
Equivalent output capacitance
Intrinsic gate resistance
T
o
tal gate charge
885
1
GS
R
f = 1 MHz open drain
= 400
V
, I
=
2
8 A, V
= 0 to 10 V
G
Q
80
nC
nC
nC
g
V
DD
D
GS
Q
Gate-source charge
Gate-drain charge
26.5
23.5
gs
Q
gd
1.
C
oss eq.
is a constant equivalent capacitance that provides the same charging time as C
while V
is rising from 0 V to
oss DS
the stated value.
Table 6.
Switching times
Test conditions
Symbol
Parameter
Turn-on delay time
Min.
Typ.
25
Max.
Unit
ns
t
V
= 325
V
, I
=
2
8 A,
–
–
–
–
–
–
d(on)
DD
D
R
G
= 4.7 Ω, V
= 10 V
t
r
GS
Rise time
26
ns
t
Turn-off delay time
77
ns
d(off)
t
f
Fall time
–
4
–
ns
DS13506
–
Rev 5
page 3/12
STP65N045M9
Electrical characteristics
Table 7.
Source-drain diode
Test conditions
Symbol
Parameter
Source-drain current
Min.
Typ. Max. Unit
I
–
–
–
–
–
54
170
1.5
A
A
SD
I
Source-drain current (pulsed)
Forward on voltage
SDM
V
I
I
= 55 A, V
= 0 V
V
SD
SD
GS
SD
t
= 55 A, di/dt = 100 A/µs,
= 100 V
Reverse recovery time
Reverse recovery charge
288
4
ns
µC
rr
V
Q
DD
rr
I
Reverse recovery current
–
26
A
RRM
t
I
= 55 A, di/dt = 100 A/µs,
= 100
V
, T
=
1
50 °C
Reverse recovery time
–
–
400
7.5
ns
rr
SD
V
Q
DD
J
Reverse recovery charge
µC
rr
I
Reverse recovery current
–
34
A
RRM
1. Referred
to TO-247 long leads package.
2. Pulse
width is limited by safe operating area.
3. Pulsed:
pulse duration = 300 µs, duty cycle 1.5%.
DS13506
–
Rev 5
page 4/12
STP65N045M9
Electrical characteristics (curves)
2.1
Electrical characteristics (curves)
Figure 1.
Safe operating area
Figure 2.
Maximum transient thermal impedance
GADG251120210953SOA
GADG251120210954ZTH
I
D
Z
thJC
(°C/W)
(A)
I
DM
0.4
0.3 0.2
duty=0.5
10
2
10
1
10
0
t
p
=1µs
10
-1
t
p
=10µs
0.1
R
DS(on)
max.
0.05
10
-2
R
thJC
= 0.51 °C/W
duty = t
on
/ T
t
p
=100µs
V
(BR)DSS
10
-1
10
-2
T
J
≤
150 °C
T
C
= 25 °C
Single pulse
Single pulse
t
p
=10ms
t
p
=1ms
t
on
T
10
-3
10
-1
10
0
10
1
10
2
10
-6
10
-5
10
-4
10
-3
10
-2
10
-1
V
DS
(V)
t
p
(s)
Figure 3.
Typical output characteristics
Figure 4.
Typical transfer characteristics
GADG251120210954OCH
GADG141220210753TCH
I
D
I
D
(A)
(A)
V
GS
= 8, 9, 10 V
150
120
90
150
120
90
V
DS
= 14 V
7 V
60
60
6 V
30
0
30
0
0
2
4
6
8
10
12
V
DS
(V)
4
5
6
7
8
9
V
GS
(V)
Figure 5.
Typical gate charge characteristics
Figure 6.
Typical drain-source on-resistance
GADG251120210955QVG
GADG251120210959RID
V
DS
(V)
V
GS
(V)
R
DS(on)
(mΩ)
V
DD
= 400 V, I
D
= 28 A
Q
g
V
GS
375
300
225
150
10
8
42
41
40
39
V
GS
= 10 V
Q
gs
Q
gd
6
4
75
0
2
0
38
37
V
DS
40
0
20
60
80
Q
g
(nC)
0
10
20
30
40
50
I
D
(A)
DS13506
–
Rev 5
page 5/12
STP65N045M9
Electrical characteristics (curves)
Figure 7.
Typical capacitance characteristics
Figure 8.
Typical output capacitance stored energy
GADG251120210958CVR
GADG251120211015EOS
C
E
OSS
(pF)
(µJ)
10
4
20
C
iss
10
3
15
10
10
2
10
1
C
oss
C
rss
f = 1 MHz
10
0
5
0
10
-1
10
-1
10
0
10
1
10
2
V
DS
(V)
0
100 200 300 400 500 600
V
DS
(V)
Figure 9.
Normalized gate threshold vs temperature
Figure 10.
Normalized on-resistance vs temperature
GADG251120211003VTH
GADG251120211003RON
V
GS(th)
R
DS(on)
(norm.)
(norm.)
1.1
2.5
I
D
= 250 µA
1.0
2.0
1.5
1.0
0.9
0.8
0.7
0.6
0.5
0.0
-75
-25
25
75
125
T
J
(°C)
-75
-25
25
75
125
T
J
(°C)
Figure 11.
Normalized breakdown voltage vs temperature
Figure 12.
Typical reverse diode forward characteristics
GADG251120211004BDV
GADG251120211006SDF
V
(BR)DSS
V
SD
(norm.)
(V)
1.1
1.10
T
J
= -50 °C
V
GS
= 10 V
1.0
1.05
1.00
0.95
0.9
T
J
= 25 °C
0.8
T
J
= 150 °C
0.7
0.90
0.85
0.6
0.5
-75
-25
25
75
125
T
J
(°C)
0
10
20
30
40
50
I
SD
(A)
DS13506
–
Rev 5
page 6/12
STP65N045M9
Test circuits
3
Test circuits
Figure 13.
Test circuit for resistive load switching times
Figure 14.
Test circuit for gate charge behavior
V
DD
RL
R
L
2200
μF
3.3
μF
I
G
= CONST
2.7 kΩ
V
DD
+
D.U.
T
.
100 Ω
V
GS
V
D
R
G
pulse width
+
V
G
D.U.
T
.
2200
μF
V
GS
pulse width
47 kΩ
1 kΩ
AM01469v10
AM01468v1
Figure 16.
Unclamped inductive load test circuit
Figure 15.
Test circuit for inductive load switching and
diode recovery times
A
A
A
L
D
S
100 µH
D
fast
diode
V
D
G
D.U.
T
.
B
2200
3.3
1000
µF
B
3.3
µF
B
µF
V
DD
+
µF
+
V
DD
25 Ω
I
D
G
D.U.
T
.
R
G
S
+
_
D.U.
T
.
V
i
pulse width
AM01470v1
AM01471v1
Figure 17.
Unclamped inductive waveform
Figure 18.
Switching time waveform
t
on
t
d(on)
t
off
t
d(off)
V
(BR)DSS
t
r
t
f
V
D
90%
90%
I
DM
V
DS
10%
V
GS
10%
I
D
0
0
V
DD
V
DD
90%
10%
AM01472v1
AM01473v1
DS13506
–
Rev 5
page 7/12
STP65N045M9
Package information
4
Package information
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK
packages,
depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product
4.1
TO-220 type A package information
Figure 19.
TO-220 type A package outline
0015988_typeA_Rev_23
DS13506
–
Rev 5
page 8/12
STP65N045M9
TO-220 type A package information
Table 8.
TO-220 type A package mechanical data
mm
Dim.
Min.
4.40
0.61
1.14
0.48
15.25
Typ.
Max.
4.60
0.88
1.55
0.70
15.75
A
b
b1
c
D
D1
1.27
E
10.00
2.40
4.95
1.23
6.20
2.40
13.00
3.50
10.40
2.70
5.15
1.32
6.60
2.72
14.00
3.93
e
e1
F
H1
J1
L
L1
L20
16.40
28.90
L30
øP
Q
3.75
2.65
3.85
2.95
0.10
Slug flatness
0.03
DS13506
–
Rev 5
page 9/12
STP65N045M9
Revision history
Table 9.
Document revision history
Changes
Date
Version
24-Feb-2021
1
First release.
Updated title,
Features
and
Description
on cover page.
Updated
Section 1 Electrical ratings.
16-Dec-2021
2
Updated
Section 2 Electrical characteristics.
Added
Section 2.1 Electrical characteristics (curves).
Updated
Section 3
T
e
st circuits.
Updated
T
a
ble 1. Absolute maximum ratings.
Updated
T
a
ble 5. Dynamic.
16-Feb-2022
25-May-2022
3
4
Minor text changes.
Updated
Features
on cover page.
04-Sep-2023
5
DS13506
–
Rev 5
page 10/12
STP65N045M9
Contents
Contents
Electrical ratings
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
.
2
Electrical characteristics
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
.
3
Electrical characteristics (curves)
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5
Test circuits
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
.
7
Package information
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
.
8
TO-220 type A package information
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
8
Revision history
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
10
DS13506
–
Rev 5
page 11/12
STP65N045M9
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T
.
F
or additional information about ST trademarks, refer to
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. All other product or service names
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Information in this document supersedes and replaces information previously supplied in any prior versions of this document.
© 2023 STMicroelectronics – All rights reserved
DS13506
–
Rev 5
page 12/12
