STMicroelectronics-STP8NK80ZFP

Part #STMicroelectronics-STP8NK80ZFP
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STMicroelectronics-STP8NK80ZFP
STP8NK80Z – STP8NK80ZFP  
STW8NK80Z  
N-channel 800V – 1.3
Ω
– 6.2A – TO-220 /TO-220FP/TO-247  
Zener-protected SuperMESH™ Power MOSFET  
Features  
Type  
V

DSS  

R

DS(on)  

I

D  

STP8NK80Z  
STP8NK80ZFP  
STW8NK80Z  
800 V  
800 V  
800 V  
< 1.5
Ω  
< 1.5
Ω  
< 1.5
Ω  
6.2 A  
6.2 A  
6.2 A  
3
2
1
TO-220  
TO-220FP  
■
Extremely high dv/dt capability  
■
100% avalanche tested  
■
Gate charge minimized  
■
Very low intrinsic capacitances  
■
Very good manufacturing repeatability  
TO-247  
Description  
Figure 1.  
Internal schematic diagram  
The SuperMESH™ series is obtained through an  
extreme optimization of ST’s well established  
strip-based PowerMESH™ layout. In addition to  
pushing on-resistance significantly down, special  
care is taken to ensure a very good dv/dt  
capability for the most demanding applications.  
Such series complements ST full range of high  
voltage MOSFETs including revolutionary  
MDmesh™ products.  
Application  
■
Switching applications  
Table 1.  
Device summary  
Order codes  
Marking  
Package  
TO-220  
Packaging  
STP8NK80Z  
STP8NK80ZFP  
STW8NK80Z  
P8NK80Z  
P8NK80ZFP  
W8NK80Z  
T
u
be  
T
u
be  
T
u
be  
TO-220FP  
TO-247  
July 2007  
Rev 5  
1/15  
15  

STP8NK80Z – STP8NK80ZFP – STW8NK80Z  
Electrical ratings  
1
Electrical ratings  
Table 2.  
Symbol  
Absolute maximum ratings  
Value  
TO-220 – TO-247  
Parameter  
Unit  
TO-220FP  
V

DS  

V

GS  

I

D  

Drain-source voltage (V

GS

= 0)  
Gate- source voltage  
800  
30  
V
V
Drain current (continuous) at T

C

= 25°C  
Drain current (continuous) at T

C

= 100°C  
Drain current (pulsed)  
6.2  
3.9  
6.2

(1)  

3.9

(1)  

24.8

(1)  

30  
A
A
I

D  

(2)  
I

DM  

24.8  
140  
1.12  
A
P

TOT  

T
o
tal dissipation at T

C

= 25°C  
Derating factor  
W
0.24  
W/°C  
V
V

ESD(G-S)

Gate source ESD(HBM-C=100p
F
,
R
=1.5K
Ω
)  
dv/dt

(3)

Peak diode recovery voltage slope  
Insulation withstand voltage (RMS) from all  
4000  
4.5  
V/ns  
three leads to external heat sink  
V

ISO  

–
2500  
V
(t=1s; Tc= 25°C)  
T

j  

Max operating Junction temperature  
Storage temperature  
-55 to 150  
°C  
T

stg  

1. Limited
 
only by maximum temperature allowed  
2. Pulse
 
width limited by safe operating area  
3. I

SD

≤
6.2 A, di/dt
≤
200A/µs, V

DD

≤
V

(BR)DSS

, T

j

≤
T

JMAX.  

Table 3.  
Symbol  
Thermal data  
Parameter  
Value  
Unit  
TO-220 TO-220FP  
TO-247  
R

thj-case

Thermal resistance junction-case max  
R

thj-amb

Thermal resistance junction-ambient max  
0.89  
4.2  
0.89  
50  
°C/W  
°C/W  
62.5  
Maximum lead temperature for soldering  
purpose  
T

l  

300  
°C  
Table 4.  
Symbol  
Avalanche characteristics  
Parameter  
Value  
Unit  
Avalanche current, repetitive or not-  
repetitive (pulse width limited by Tj Max)  
I

AR  

6.2  
A
Single pulse avalanche energy  
E

AS  

300  
mJ  
(starting Tj=25°C, Id=Iar, Vdd=50V)  
3/15  
 

Electrical characteristics  
STP8NK80Z – STP8NK80ZFP – STW8NK80Z  
2
Electrical characteristics  
(T  
=25°C unless otherwise specified)  
CASE  
Table 5.  
Symbol  
On/off states  
Parameter  
Test conditions  
I

D

=1mA, V

GS

= 0  
Min. Typ. Max. Unit  
Drain-source  
V

(BR)DSS  

800  
V
Breakdown voltage  
V

DS

= Max rating  
Zero gate voltage  
1
µA  
µA  
I

DSS  

Drain current (V

GS

= 0)  
V

DS

= Max rating, @125°C  
50  
Gate-body leakage  
Current (V

DS

= 0)  
I

GSS  

V

GS  

V

DS

= V

GS

, I

D

= 100 µA  

GS

= 10
V
,
I

D

= 3.1 A  
=
20 V  
10  
µA  
V

GS(th)  

R

DS(on)  

Gate threshold voltage  
3
3.75  
1.3  
4.5  
1.5  
V
Static drain-source on  
resistance  
V
Ω
Table 6.  
Symbol  
Dynamic  
Parameter  
Test conditions  
Min. Typ. Max. Unit  
(1)  
V

DS

= 15v, I

D

= 3.1 A  
Forward transconductance  
5.2  
S
g

fs  

C

iss  

C

oss  

C

rss  

Input capacitance  
1320  
143  
27  
pF  
pF  
pF  
V

DS

= 25
V
, f = 1
M
Hz,  
V

GS

= 0  
Output capacitance  
Reverse transfer capacitance  
(2)  
Equivalent output  
capacitance  
C

oss eq.  

V

DS

=0
V
,
V

DS

= 0V to 640V  
58  
pF  
t

d(on)  

t

r  

t

r(off)  

t

r  

T
u
rn-on delay time  
Rise time  
17  
30  
48  
28  
ns  
ns  
ns  
ns  
V

DD

= 400
V
,
I

D

= 3.1 A,  
R

G

= 4.7
Ω
,
V

GS

= 10 V  
T
u
rn-off delay time  
Fall time  
(see

)  
Q

g  

Q

gs  

Q

gd  

T
o
tal gate charge  
Gate-source charge  
Gate-drain charge  
46  
8.5  
25  
nC  
nC  
nC  
V

DD

= 640
V
,
I

D

= 6.2 A,  
V

GS

= 10 V  
t

r(Voff)  

V

DD

= 640
V
,
I

D

= 6.2 A,  
R

G

= 4.7
Ω
,
V

GS

= 10 V  
(see

)  
Off-voltage rise time  
Fall time  
9
9
ns  
ns  
ns  
t

r  

Cross-over time  
18  
t

c  

1. Pulsed:
 
pulse duration=300µs, duty cycle 1.5%  
2. C

oss eq.

is defined as a constant equivalent capacitance giving the same charging time as C

oss

when V

DS  

increases from 0 to 80% V

DSS  

.
4/15  
 

STP8NK80Z – STP8NK80ZFP – STW8NK80Z  
Electrical characteristics  
Min. Typ. Max.
 
Unit  
Table 7.  
Symbol  
Source drain diode  
Parameter  
Test conditions  
I

SD  

Source-drain current  
6.2  
A
A
(1)  
Source-drain current (pulsed)  
24.8  
I

SDM  

(2)  
I

SD

= 6.2 A, V

GS

= 0  
Forward on voltage  
1.6  
V
V

SD  

t

rr  

I

SD

= 6.2 A, di/dt = 100 A/µs  
V

DD

= 50
V
,
T
j = 150°C  
(see

)  
Reverse recovery time  
Reverse recovery charge  
Reverse recovery current  
460  
2990  
13  
ns  
Q

rr  

nC  
A
I

RRM  

1. Pulsed:
 
pulse duration=300µs, duty cycle 1.5%  
2. Pulse
 
width limited by safe operating area  
Table 8.  
Symbol  
Gate-source zener diode  
Parameter  
Test conditions  
Min. Typ. Max. Unit  
(1)  
BV

GSO  

Gate-source breakdown voltage
 
Igs= 1mA
 
(Open Drain)
 
30  
V
1. The
 
built-in back-to-back Zener diodes have specifically been designed to enhance not only the device’s  
ESD capability, but also to make them safely absorb possible voltage transients that may occasionally be  
applied from gate to source. In this respect the Zener voltage is appropriate to achieve an efficient and  
cost-effective intervention to protect the device’s integrity. These integrated Zener diodes thus avoid the  
usage of external components.  
5/15  

Electrical characteristics  
STP8NK80Z – STP8NK80ZFP – STW8NK80Z  
Figure 3.
 
Thermal impedance for TO-220  
2.1  
Electrical characteristics (curves)  
Figure 2.
 
Safe operating area for TO-220  
Figure 4.
 
Safe operating area for TO-220FP  
Figure 5.
 
Thermal impedance for TO-220FP  
Figure 6.
 
Safe operating area for TO-247  
Figure 7.
 
Thermal impedance for TO-247  
6/15  

STP8NK80Z – STP8NK80ZFP – STW8NK80Z  
Figure 8.
 
Output characteristics  
Electrical characteristics  
Figure 9.
 
Transfer characteristics  
Figure 10.
 
Transconductance  
Figure 11.
 
Static drain-source on resistance  
Figure 12.
 
Gate charge vs gate-source voltage
 
Figure 13.
 
Capacitance variations  
7/15  

Electrical characteristics  
STP8NK80Z – STP8NK80ZFP – STW8NK80Z  
Figure 14.
 
Normalized gate threshold voltage
 
Figure 15.
 
Normalized on resistance vs  
vs temperature  
temperature  
Figure 16.
 
Source-drain diode forward  
characteristic  
Figure 17.
 
Normalized B  
vs temperature  
VDSS  
Figure 18.
 
Maximum avalanche energy vs  
temperature  
8/15  

STP8NK80Z – STP8NK80ZFP – STW8NK80Z  
Test circuit  
3
Test circuit  
Figure 19.
 
Unclamped inductive load test  
circuit  
Figure 20.
 
Unclamped inductive waveform  
Figure 21.
 
Switching times test circuit for  
resistive load  
Figure 22.
 
Gate charge test circuit  
Figure 23.
 
Test circuit for inductive load  
switching and diode recovery times  
9/15  

Package mechanical data  
STP8NK80Z – STP8NK80ZFP – STW8NK80Z  
4
Package mechanical data  
In order to meet environmental requirements, ST offers these devices in ECO
P
A
CK®  
packages. These packages have a Lead-free second level interconnect. The category of  
second level interconnect is marked on the package and on the inner box label, in  
compliance with JEDEC Standard JESD97. The maximum ratings related to soldering  
conditions are also marked on the inner box label. ECO
P
ACK is an ST trademark.  
ECO
P
ACK specifications are available at:

10/15  

STP8NK80Z – STP8NK80ZFP – STW8NK80Z  
Package mechanical data  
TO-220 mechanical data  
mm  
inch  
Dim  
Min  
Typ  
Max  
Min  
Typ  
Max  
A
b
4.40  
0.61  
1.14  
0.4
9
 
15.25  
4.60  
0.
88  
1.70  
0.70  
15.75  
0.17
3  
0.024  
0.044  
0.01
9  
0.6  
0.1
8
1  
0.0
3
4  
0.066  
0.027  
0.62  
b
1  
c
D
D1  
E
1.27  
0.050  
10  
10.40  
2.70  
5.15  
1.
3
2  
6.60  
2.72  
14  
0.
393  
0.0
9
4  
0.1
9
4  
0.04
8  
0.244  
0.0
9
4  
0.511  
0.1
3
7  
0.40
9  
0.106  
0.202  
0.051  
0.256  
0.107  
0.551  
0.154  
e
2.40  
4.
9
5  
1.2
3  
6.20  
2.40  
1
3  
e1  
F
H1  
J1  
L
L1  
L20  
L
3
0  
∅
P  
Q
3
.50  
3
.
93  
16.40  
0.645  
2
8
.
9
0  
1.1
3
7  
3
.75  
3
.
8
5  
2.
9
5  
0.147  
0.104  
0.151  
0.116  
2.65  
11/15  

Package mechanical data  
STP8NK80Z – STP8NK80ZFP – STW8NK80Z  
TO-220FP MECHANICAL DATA  
mm.  
TYP  
inch  
TYP.  
DIM.  
MIN.  
4.4  
MAX.  
4.6  
2.7  
2.75  
0.7  
1
MIN.  
0.173  
0.098  
0.098  
0.017  
0.030  
0.045  
0.045  
0.195  
0.094  
0.393  
MAX.  
0.181  
0.106  
0.108  
0.027  
0.039  
0.067  
0.067  
0.204  
0.106  
0.409  
A
B
2.5  
D
2.5  
E
0.45  
0.75  
1.15  
1.15  
4.95  
2.4  
F
F1  
F2  
G
1.7  
1.7  
5.2  
2.7  
10.4  
G1  
H
10  
L2  
L3  
L4  
L5  
L6  
L7  
Ø
16  
0.630  
28.6  
9.8  
2.9  
15.9  
9
30.6  
10.6  
3.6  
1.126  
.0385  
0.114  
0.626  
0.354  
0.118  
1.204  
0.417  
0.141  
0.645  
0.366  
0.126  
16.4  
9.3  
3
3.2  
L3  
L6  
L7  
1
2 3  
L5  
L2  
L4  
12/15  

STP8NK80Z – STP8NK80ZFP – STW8NK80Z  
Package mechanical data  
TO-247 MECHANICAL DATA  
mm.  
TYP  
inch  
DIM.  
MIN.  
4.85  
2.20  
1.0  
MAX.  
5.15  
MIN.  
0.19  
TYP.  
MAX.  
0.20  
A
A1  
b
2.60  
0.086  
0.039  
0.079  
0.118  
0.015  
0.781  
0.608  
0.102  
0.055  
0.094  
0.134  
0.03  
1.40  
b1  
b2  
c
2.0  
2.40  
3.0  
3.40  
0.40  
19.85  
15.45  
0.80  
D
20.15  
15.75  
0.793  
0.620  
E
e
5.45  
18.50  
5.50  
0.214  
0.728  
0.216  
L
14.20  
3.70  
14.80  
4.30  
0.560  
0.14  
0.582  
0.17  
L1  
L2  
øP  
øR  
S
3.55  
4.50  
3.65  
5.50  
0.140  
0.177  
0.143  
0.216  
13/15  

Revision history  
STP8NK80Z – STP8NK80ZFP – STW8NK80Z  
5
Revision history  
Table 9.  
Date  
Revision history  
Revision  
Changes  
09-Sep-2004  
17-Aug-2006  
20-Apr-2007  
02-Jul-2007  
2
3
4
5
Complete version  
New template, no content change  
T
y
po errors on

T

has been updated  
14/15  

STP8NK80Z – STP8NK80ZFP – STW8NK80Z  
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15/15