STMicroelectronics-STS5N15F4

Part #STMicroelectronics-STS5N15F4
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STMicroelectronics-STS5N15F4
STS5N15F4  
N-channel 150
V
,
0
.057
Ω
, 5 A, SO-8  
S
T
r
ipFET™ DeepG
A
T
E™ Power MOSFET  
Features  
R

DS(on)  

max  
Type  
V

DSS  

I

D  

STS5N15F4  
150 V  
< 0.063
Ω  
5 A  
■
N-channel enhancement mode  
■
100% avalanched rated  
■
Low gate charge  
SO-8  
■
Very low on-resistance  
Application  
Figure 1.  
Internal schematic diagram  
■
Switching applications  
Description  
This S
T
r
ipFET™ DeepG
A
T
E™ Power MOSFET  
technology is among the latest improvements,  
which have been especially tailored to minimize  
on-state resistance, with a new gate structure,  
providing superior switching performances.  
Table 1.  
Order code  
STS5N15F4  
Device summary  
Marking  
Package  
SO-8  
Packaging  
5U15-  
T
a
pe and reel  
August 2009  
Doc ID 16083 Rev 2  
1/11  
11  

Electrical ratings  
STS5N15F4  
1
Electrical ratings  
Table 2.  
Symbol  
Absolute maximum ratings  
Parameter  
Value  
Unit  
V

DS  

V

GS  

I

D  

Drain-source voltage (V

GS

= 0)  
Gate-source voltage  
150  
20  
5
V
V
Drain current (continuous) at T

C

= 25 °C  
Drain current (continuous) at T

C

=100 °C  
Drain current (pulsed)  
A
I

D  

3
A
(1)  
I

DM  

20  
2.5  
A
P

TOT  

T

stg  

T

j  

T
o
tal dissipation at T

C

= 25 °C  
Storage temperature  
W
-55 to 150  
°C  
Operating junction temperature  
1. Pulse
 
width limited by safe operating area  
Table 3.  
Symbol  
Thermal data  
Parameter  
Thermal resistance junction-pcb max  
Value  
Unit  
(1)  
R

thj-pcb  

50  
°C/W  
1. When
 
mounted on FR-4 board of 1 inch², 2 oz Cu, t < 10 sec  
Table 4.  
Symbol  
Avalanche characteristics  
Parameter  
Max value  
Unit  
Avalanche current, repetitive or not-repetitive  
(pulse width limited by T

j

max)  
I

AS  

5
A
Single pulse avalanche energy  
E

AS  

125  
mJ  
(starting T

j

= 25 °C, I

D

= I

AS

, V

DD

= 140 V)  
2/11  
Doc ID 16083 Rev 2  

STS5N15F4  
Electrical characteristics  
2
Electrical characteristics  
(T =
 
25 °C unless otherwise specified)  
J
Table 5.  
Symbol  
On/off states  
Parameter  
Test conditions  
Min.  
Typ.  
Max. Unit  
Drain-source breakdown  
voltage  
V

(BR)DSS  

I

D

= 1 mA, V

GS

= 0  
150  
V
V

DS

= 150
V
,  
1
µA  
µA  
Zero gate voltage drain  
current (V

GS

= 0)  
I

DSS  

V

DS

= 150
V
,
@
125 °C  
10  
Gate body leakage current  
(V

DS

= 0)  
I

GSS  

V

GS

= 20
 
V  
100  
4
nA  
V
V

GS(th)

Gate threshold voltage  
V

DS

= V

GS

, I

D

= 250 µA  
2
Static drain-source on  
resistance  
R

DS(on)  

V

GS

= 10
V
,
I

D

= 2.5 A  
0.057 0.063  
Ω
Table 6.  
Symbol  
Dynamic  
Parameter  
Test conditions  
Min. Typ. Max. Unit  
Input capacitance  
C

iss  

C

oss  

C

rss  

2710  
180  
pF  
pF  
pF  
Output capacitance  
V

DS

=25
V
, f = 1
M
Hz,  
V

GS

= 0  
–
–
Reverse transfer  
capacitance  
69.5  
Q

g  

Q

gs  

Q

gd  

T
o
tal gate charge  
Gate-source charge  
Gate-drain charge  
V

DD

= 75
V
,
I

D

= 5 A  
V

GS

=10 V  
48  
nC  
nC  
nC  
–
–
10.8  
13.7  
–
–
f=1 MHz Gate DC Bias=0  
T
e
st signal level=20 mV  
open drain  
R

g  

Gate input resistance  
1.9  
Ω
Doc ID 16083 Rev 2  
3/11  

Electrical characteristics  
STS5N15F4  
Table 7.  
Symbol  
Switching times  
Parameter  
Test conditions  
Min.  
Typ. Max.
 
Unit  
t

d(on)  

t

r  

t

d(off)  

t

f  

T
u
rn-on delay time  
Rise time  
13.5  
5.1  
ns  
ns  
ns  
ns  
V

DD

= 75
V
,
I

D

= 3 A,  
R

G

=4.7
Ω
,
V

GS

=10 V  
–
–
T
u
rn-off delay time  
Fall time  
39.7  
11.4  
Table 8.  
Symbol  
Source drain diode  
Parameter  
Test conditions  
Min.  
Typ.  
Max Unit  
I

SD  

Source-drain current  
–
–
–
5
A
A
V
(1)  
I

SDM  

Source-drain current (pulsed)  
Forward on voltage  
20  
1.3  
(2)  
V

SD  

I

SD

= 6 A, V

GS

= 0  
I

SD

= 6 A,  
t

rr  

Reverse recovery time  
Reverse recovery charge  
Reverse recovery current  
85.2  
277.6  
8.2  
ns  
nC  
A
di/dt = 100 A/µs,  
V

R

= 120
V
,
T

J

= 150 °C  
Q

rr  

–
I

RRM  

1. Pulse
 
width limited by safe operating area  
2. Pulsed:
 
pulse duration=300µs, duty cycle 1.5%  
4/11  
Doc ID 16083 Rev 2  

STS5N15F4  
Electrical characteristics  
2.1  
Electrical characteristics (curves)  
Figure 2.  
Safe operating area  
Figure 3.  
Thermal impedance  
AM04995v1  
I
D
(A)  
Tj=150°C  
Tc=25°C  
100  
S
inlge  
p
u
l
s
e  
10  
1
10m
s  
100m
s  
0.1  
1
s  
0.01  
10  
V
D
S
(V)  
0.1  
1
100  
Figure 4.  
Output characteristics  
Figure 5.  
Transfer characteristics  
AM049
8
6v1  
AM049
8
7v1  
I
D
(A)  
I
D  
(A)  
V
G
S
=10V  
70  
60  
50  
40  
3
0  
20  
70  
V
D
S
=10V  
60  
6V  
50  
40  
3
0  
5V  
20  
10  
10  
0
4V  
D
S
(V)  
0
0
5
V
8
10  
V

G
S

(V)  
0
10  
15  
4
6
2
Figure 6.
 
Normalized B  
vs temperature  
Figure 7.
 
Static drain-source on resistance  
VDSS  
AM049
8
9v1  
AM049
88
v1  
R
D
S
(on)  
(
Ω
)  
BV
D
SS  
(norm)  
140  
1.10  
120  
100  
8
0  
V
G
S
=10V  
I
D
= 1 mA  
1.05  
1.00  
60  
40  
0.95  
0.90  
20  
0
0
2
3
4
1
5
-50  
-25  
0
25 50 75  
T
125 150  
J
(°C)  
I
D
(A)  
100  
Doc ID 16083 Rev 2  
5/11  
 
 

Electrical characteristics  
STS5N15F4  
Figure 8.
 
Gate charge vs gate-source voltage
 
Figure 9.
 
Capacitance variations  
AM04990v1  
AM04991v1  
(pF)  
C
V
G
S  
(V)  
T =25°C  
J
V
DD
=75V  
=5A  
2500  
2000  
2000  
1500  
12  
f=1MHz  
I
D
Ci
ss  
10  
8
6
1000  
500  
0
4
2
0
Cr
ss  
Co
ss  
100 120 140  
V
D
S
(V)  
20  
40  
0
60  
50  
Q
g
(nC)  
8
0  
0
10  
3
0  
20 40  
Figure 10.
 
Normalized gate threshold voltage
 
Figure 11.
 
Normalized on resistance vs  
vs temperature
 
temperature  
AM04992v1  
AM0499
3
v1  
V
G
S
(th)  
R
D
S
(on)  
(norm)  
(norm)  
1.10  
2.5  
I
D
= 250
µ
A  
V
G
S
= 10 V  
I
D
= 2.5 A  
1.00  
0.90  
0.
8
0  
0.70  
2.0  
1.5  
1.0  
0.5  
0
0.60  
0.50  
-50  
-50  
-25  
-25  
0
25 50 75  
150 T  
J
(°C)  
0
25 50 75  
T
J
(°C)  
125 150  
100  
125  
100  
Figure 12.
 
Source-drain diode forward  
characteristics  
AM04994v1  
V
S
D  
(V)  
T
J
=-55°C  
0.9  
0.
8  
0.7  
0.6  
T
J
=25°C  
T
J
=175°C  
0.5  
0.4  
0
10  
20  
3
0  
40  
50 I

S
D

(A)  
6/11  
Doc ID 16083 Rev 2  
 
 

STS5N15F4  
Test circuits  
3
Test circuits  
Figure 13.
 
Switching times test circuit for  
resistive load  
Figure 14.
 
Gate charge test circuit  
V
DD  
12V  
47k
Ω  
1k
Ω  
100nF  
2200  
3
.
3  
µ
F  
R
L  
µ
F  
I
G
=CON
S
T  
V

DD  

100
Ω  
V

i

=20V=V
GMAX  
D.U.
T
.  
V

G  

V
D  
R
G  
V
G
S  
2200  
µ
F  
D.U.
T
.  
2.7k
Ω  
47k
Ω  
P
W  
1k
Ω  
P
W  
AM0146
8
v1  
AM01469v1  
Figure 15.
 
Test circuit for inductive load  
switching and diode recovery times  
Figure 16.
 
Unclamped inductive load test  
circuit  
L
A
A
A
B
D
FA
S
T  
DIODE  
L=100
µ
H  
V
D  
G
2200  
µ
F  
D.U.
T
.  
B
3
.
3  
µ
F  
V
DD  
S
3
.
3  
µ
F  
1000  
µ
F  
B
V

DD  

25  
Ω
I
D  
D
G
R

G  

S
V
i  
D.U.
T
.  
P
w  
AM01470v1  
AM01471v1  
Figure 17.
 
Unclamped inductive waveform  
Figure 18.
 
Switching time waveform  
t
on  
t
off  
td
off  
V
(BR)D
SS  
t
r  
t
f  
td
on  
V
D  
90
%  
10
%  
90
%  
I
DM  
10
%  
V
D
S  
I
D  
0
0
V
DD  
V
DD  
90
%  
V

G
S  

10
%  
AM01472v1  
AM0147
3
v1  
Doc ID 16083 Rev 2  
7/11  

Package mechanical data  
STS5N15F4  
4
Package mechanical data  
In order to meet environmental requirements, ST offers these devices in different grades of  
®
®
ECO
P
A
CK packages,
 
depending on their level of environmental compliance. ECO
P
A
CK  
is an ST trademark.  
8/11  
Doc ID 16083 Rev 2  

STS5N15F4  
Package mechanical data  
SO-8 MECHANICAL DATA  
mm.  
inch  
DIM.  
MIN.  
TYP  
MAX.  
1.75  
0.25  
1.65  
0.85  
0.48  
0.25  
0.5  
MIN.  
TYP.  
MAX.  
0.068  
0.009  
0.064  
0.033  
0.018  
0.010  
0.019  
A
a1  
a2  
a3  
b
0.1  
0.003  
0.65  
0.35  
0.19  
0.25  
0.025  
0.013  
0.007  
0.010  
b1  
C
c1  
D
45 (typ.)  
4.8  
5.8  
5.0  
6.2  
0.188  
0.228  
0.196  
0.244  
E
1.27  
3.81  
e
0.050  
0.150  
e3  
F
3.8  
0.4  
4.0  
1.27  
0.6  
0.14  
0.157  
0.050  
0.023  
L
0.015  
M
S
8 (max.)  
Doc ID 16083 Rev 2  
9/11  

Revision history  
STS5N15F4  
5
Revision history  
Table 9.  
Date  
Document revision history  
Revision  
Changes  
23-Jul-2009  
03-Aug-2009  
1
2
First release  
Updated figures

,

,

and

10/11  
Doc ID 16083 Rev 2  

STS5N15F4  
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Doc ID 16083 Rev 2  
11/11