STMicroelectronics-STS7PF30L

Part #STMicroelectronics-STS7PF30L
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STMicroelectronics-STS7PF30L
STS7PF30L  
P-CHANNEL 30V – 0.016
Ω
– 7A SO-8  
STripFET™ II POWER MOSFET  
PRELIMINARY DATA  
TYPE  
V
R
DS(on)  
I
D
DSS  
STS7PF30L  
30 V  
< 0.021
Ω  
7 A  
■
■
TYPICAL R
 
(on) = 0.016
Ω  
STANDARD OUTLINE FOR EASY  
DS  
AUTOMATED SURFACE MOUNT ASSEMBLY  
LOW THRESHOLD DRIVE  
■
SO-8  
DESCRIPTION  
This Power Mosfet is the latest development of ST-  
Microelectronics unique “Single Feature Size
™”  
strip-based process. The resulting transistor shows  
extremely high packing density for low on-resis-  
tance, rugged avalanche characteristics and less  
critical alignment steps therefore a remarkable man-  
ufacturing reproducibility.  
INTERNAL SCHEMATIC DIAGRAM  
APPLICATIONS  
■
BATTERY MANAGEMENT IN NOMADIC  
EQUIPMENT  
■
POWER MANAGEMENT IN CELLULAR  
PHONES  
ABSOLUTE MAXIMUM RATINGS  
Symbol  
Parameter  
Value  
30  
Unit  
V
DS  
Drain-source Voltage (V
 
= 0)  
V
V
V
A
A
A
W
GS  
V
Drain-gate Voltage (R
 
= 20 k
Ω
)  
30  
DGR  
GS  
V
Gate- source Voltage  
±20  
7
GS  
I
Drain Current (continuous) at T
 
= 25°C  
D
C
I
Drain Current (continuous) at T
 
= 100°C  
4.4  
28  
D
C
I
Drain Current (pulsed)  
DM  
P
TOT  
Total Dissipation at T
 
= 25°C  
2.5  
C
(
●
) Pulse width limited by safe operating area  
Note: For the P-CHANNEL MOSFET actual polarity of voltages and  
current has to be reversed  
December 2002  
1/6  

STS7PF30L  
THERMAL DATA  
Rthj-amb(#) Thermal
 
Resistance Junction-ambient Max  
50  
150  
°C/W  
°C  
Tj  
Maximum Lead
T
emperature For Soldering Purpose Typ  
T
stg  
Storage Temperature  
–55 to 150  
°C  
2
(#) When mounted on 1 inch
 
FR4 Board, 2 oz of Cu and t
≤
10s  
ELECTRICAL CHARACTERISTICS
(T =
 
25 °C UNLESS OTHERRWISE SPECIFIED)  
J
OFF  
Symbol  
Parameter  
Drain-source  
Test Conditions  
Min.  
T
y
p.  
Max.  
Unit  
V
I
= 250 µA, V
 
= 0  
30  
V
(BR)DSS  
D
GS  
Breakdown Voltage  
I
Zero Gate Voltage  
V
V
V
= Max Rating  
DS  
1
µA  
µA  
nA  
DSS  
Drain Current (V
 
= 0)  
GS  
= Max Rating, T
 
= 125 °C  
10  
DS  
GS  
C
I
Gate-body Leakage  
= ± 20V  
±100  
GSS  
Current (V
 
= 0)  
DS  
ON (1)  
Symbol  
Parameter  
Test Conditions  
Min.  
1
T
y
p.  
1.6  
Max.  
2.5  
Unit  
V
V
R
V
V
V
= V
 
, I
 
= 250µA  
Gate Threshold Voltage  
GS(th)  
DS  
GS  
GS  
GS  
D
Static Drain-source On  
Resistance  
= 10
V
, I
 
=
3
.5A  
0.0
1
1  
0.016  
0.016  
0.022  
0.021  
0.028  
Ω
DS(on)  
D
= 4.5
V
, I
 
=
3
.5A  
Ω
D
DYNAMIC  
Symbol  
Parameter  
Test Conditions  
Min.  
T
y
p.  
Max.  
Unit  
g
Forward Transconductance  
V
= 10
V
, I
 
= 3.5A  
16  
S
fs  
DS  
D
C
V
= 25
V
, f = 1
M
Hz, V
 
= 0  
Input Capacitance  
Output Capacitance  
2600  
523  
pF  
pF  
pF  
iss  
DS  
GS  
C
oss  
C
rss  
Reverse Transfer  
Capacitance  
174  
2/6  

STS7PF30L  
ELECTRICAL CHARACTERISTICS
(CONTINUED)  
SWITCHING ON(2)  
Symbol  
Parameter  
Test Conditions  
Min.  
Typ.  
Max.  
Unit  
t
V
R
= 15
V
, I
 
=
3
.5A  
Turn-on Delay Time  
68  
ns  
d(on)  
DD  
D
= 4.7
Ω
V =
 
4.5 V  
G
GS  
t
Rise Time  
54  
ns  
r
(Resistive Load, Figure 3)  
Q
V
V
=15
V
, I
 
= 7
A
,  
= 4.5V  
38  
T
o
tal Gate Charge  
Gate-Source Charge  
Gate-Drain Charge  
28  
8.8  
12  
nC  
nC  
nC  
g
DD  
GS  
D
Q
gs  
Q
gd  
SWITCHING OFF(2)  
Symbol  
Parameter  
Test Conditions  
Min.  
Min.  
Typ.  
Max.  
Unit  
t
Turn-off-Delay Time  
Fall Time  
V
DD  
=15
V
, I
 
= 3.5 A,  
65  
23  
ns  
ns  
d(off)  
D
t
f
R =
 
4.7
Ω,
V =
 
4.5 V  
G GS  
(Resistive Load, Figure 3)  
SOURCE DRAIN DIODE (2)  
Symbol  
Parameter  
Test Conditions  
Typ.  
Max.  
7
Unit  
A
I
Source-drain Current  
SD  
I
(1)  
(2)  
Source-drain Current (pulsed)  
Forward On Voltage  
28  
A
SDM  
V
I
I
= 7 A, V
 
= 0  
1.2  
V
SD  
SD  
SD  
GS  
t
Reverse Recovery Time  
Reverse Recovery Charge  
Reverse Recovery Current  
40  
46  
2.3  
ns  
nC  
A
= 7A, di/dt = 100A/µs,  
= 24 V, T
 
= 150°C  
rr  
Q
V
rr  
RRM  
DD  
j
I
(see test circuit, Figure 5)  
Note: 1. Pulsed:
 
Pulse duration = 300 µs, duty cycle 1.5 %.  
2. Pulse
 
width limited by safe operating area.  
3/6  

STS7PF30L  
Fig. 1:
Unclamped Inductive Load Test Circuit  
Fig. 2:
Unclamped Inductive Waveform  
Fig. 3:
Switching Times Test Circuit For  
Fig. 4:
Gate Charge test Circuit  
Resistive Load  
Fig. 5:
Test Circuit For Inductive Load Switching  
And Diode Recovery Times  
4/6  

STS7PF30L  
SO-8 MECHANICAL
 
DATA  
mm  
inch  
TYP.  
DIM.  
MIN.  
TYP.  
MAX.  
1.75  
0.25  
1.65  
0.85  
0.48  
0.25  
0.5  
MIN.  
MAX.  
0.068  
0.009  
0.064  
0.033  
0.018  
0.010  
0.019  
A
a1  
a2  
a3  
b
0.1  
0.003  
0.65  
0.35  
0.19  
0.25  
0.025  
0.013  
0.007  
0.010  
b1  
C
c1  
D
45 (typ.)  
4.8  
5.8  
5.0  
6.2  
0.188  
0.228  
0.196  
0.244  
E
e
1.27  
3.81  
0.050  
0.150  
e3  
F
3.8  
0.4  
4.0  
1.27  
0.6  
0.14  
0.157  
0.050  
0.023  
L
0.015  
M
S
8 (max.)  
0016023  
5/6  

STS7PF30L  
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the  
consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from  
its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications  
mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information  
previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or  
systems without express written approval of STMicroelectronics.  
© The ST logo is a registered trademark of STMicroelectronics  
© 2002 STMicroelectronics – Printed in Italy – All Rights Reserved  
STMicroelectronics GROUP OF COMPANIES  
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