STMicroelectronics-STTN6050H-12M1Y
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STTN6050H-12M1Y
Datasheet
60 A 1200 V thyristor controlled bridge leg in ACEPACK SMIT module
Features
•
•
•
•
•
•
•
•
AEC-Q101 qualified
1200 V symmetrical blocking voltage
High junction temperature: 150 °C
High noise immunity, static dV/dt: 1000 V/μs
Module qualified according to AQG324 recommendation
SMD with isolated top cooled tab
4000 V insulated tab-to-lead package
–
UL recognized, File E81734
T
e
rminal pins opposite to cooling side
Fully automatic PCB mounting to heat sink
Large creepage distance to meet IEC 60664-1
•
•
–
–
–
250 V
AC
, material group 2, pollution degree 3
600 V
AC
, material group 2, pollution degree 2
•
ECOPACK2
compliant component
Applications
•
•
•
•
•
•
•
Single and tri-phase controlled rectifier bridge
Product status
AC phasing half bridge of a totem pole PFC
On-board and stationary chargers
Internal
AC DC converter for motor drive, UPS and SMPS
Output full wave DC current up to 75 A
AV
Product summary
I
,
I
60 A
75 A
T(RMS) F(RMS)
AC Input converter current up to 85 A
RMS
I
Solid-state relay in heating control , by pass switch and motor starter
OUT(AV)
I
85 V
IN_AC(RMS)
Description
V
/V
1200 V
DRM RRM
The STTN6050H-12M1Y achieves a 1200 V 60 A full controlled SCR bridge leg in
ACEPACK SMIT module, and it can control an AC current up to 85 A
RMS
when
connected to an AC line network. Thus, it allows to design a single or three-phase
AC DC rectifier bridge, a phase recombination branch of a totem pole PFC up to 75
A
(AVE)
output current, the AC phasing arm of a line inverter or even an back-to-back
SCR based AC switch for a heating controller or the by pass relay of an UPS.
V
/V
1400 V
DSM RSM
I
50 mA
GT
T
j
– 40 to + 150 °C
With its top cooling pad opposite to the printed circuit board this device allows the
PCB-module-heat sink stack to be automatically assembled. This provides a low
profile and compact converter in the field of on-board charger, charging station, motor
drive, UPS and AC-DC power supplies.
Based on the ST high temperature automotive ASD technology, it offers higher
specified noise immunity of 1000 V/µs at the 150 °C junction temperature T
j
, and
an over-voltage robustness V
DSM
up to 1400
V
.
DS13748
–
Rev 1
–
June 2021
For further information contact your local STMicroelectronics sales office.
STTN6050H-12M1Y
Characteristics
1
Characteristics
Table 1.
Absolute maximum ratings (limiting values)
Parameter
Symbol
Value
60
Unit
A
I
RMS on-state current, sine half wave
Average on-state current, sine half wave
T(RMS)
T
= 106 °C
C
I
38
A
T(AV)
t =
8.3 ms
660
600
1800
p
Non repetitive surge peak on-state current, V
=
R
I
T initial
= 25 °C
A
TSM
j
0
V
, I
=
1
00 mA
G
t =
10 ms
p
2
2
2
t =
10 ms
p
T =
25 °C
j
I t
I t
value for fusing
A s
Critical rate of rise of on-state SCR current
T =
150 °C
dl/dt
/ V
f = 50 and 60 Hz
200
A/µs
j
I
= 2 x I
, tr ≤ 100 ns
G
GT
V
T =
-40 °C to 150 °C
j
Repetitive off-state voltage
1200
V
V
DRM
RRM
RSM
V
/ V
t =
10 ms
p
T =
25 °C
j
Non repetitive surge peak off-state voltage
Peak forward SCR gate voltage
Peak forward SCR gate current
Peak cathode drive current, C1 and C2 pins
Peak SCR gate voltage
1400
DSM
V
t =
20 µs
p
T =
150 °C
j
10
V
GM
I
t =
20 µs
p
T =
150 °C
j
8
A
GM
I
t =
20 µs
p
T =
150 °C
j
8
A
GCM
V
P
T =
25 °C
j
5
V
RGM
T =
150 °C
j
Average SCR gate power dissipation
Storage junction temperature range
Operating junction temperature range
1
W
°C
°C
kV
G(AV)
T
-40 to +150
-40 to +150
4
stg
T
j
V
RMS tab-to-pin lead insulation voltage, 1 minute
INS
DS13748
–
Rev 1
page 2/18
STTN6050H-12M1Y
Characteristics
Table 2.
SCR electrical characteristics, per single SCR
Test Conditions
Symbol
SCR triggering characteristics
Value Unit
Min.
Max.
Max.
10
50
I
V
= 12
V
, R
=
3
3 Ω
T =
25 °C
mA
GT
D
L
j
V
V
V
V
= 12 V, R
= 33 Ω
T =
25 °C
j
1.3
V
V
GT
D
L
= 2/3 V
, R
= 3.3 kΩ
T =
150 °C
j
Min.
Max.
Max.
0.2
100
125
GD
D
DRM
L
I
I =
500 mA, gate open
T
T =
25 °C
j
mA
mA
H
I
L
I
G
= 1.2 x I
T =
25 °C
j
GT
SCR dynamic characteristics
I =
60 A , V
= 800
V
, I
=
1
00 mA,
T
D
G
t
T =
25 °C
Typ.
Typ.
1
µs
µs
GT
j
dI /dt
= 0.2 A/µs
G
I =
38 A, V
= 800
V
,
d
I
/dt = 10 A/µs,
T
D
T
t
T =
150 °C
j
150
Q
V
= 75 V, dV
/dt = 20 V/µs, t
= 100 µs
R
D
D
p
V
= 800 V, gate open
T =
150 °C
j
dV/dt
Min. 1000 V/µs
SCR static characteristics
T =
25 °C
Max.
Max.
Max.
1.3
1.3
0.8
V
V
j
V
I
= 60 A, t
= 380 µs
TM P
TM
T =
150 °C
j
V
T =
150 °C
j
SCR on-state threshold voltage
SCR on-state dynamic resistance
V
TOT
R
T =
150 °C
j
Max. 7.35
mΩ
µA
mA
µA
DT
T =
25 °C
j
Max.
Max.
Max.
5
I
/I
V
= V
, V
= V
DRMT RRMT
D
D
DRM
R
RRM
T =
150 °C
j
7.5
10
I
/I
V
= V
, V
= V
T =
25 °C
j
DSMT RSMT
DSM
R
RSM
SCR losses evaluation
2
P
V
x I
T(AV)
+ R
x I
T(RMS)
W
LT
TOT
DT
Table 3.
Thermal characteristics
Parameter
Symbol
Value Unit
R
th(j-c)
Max.
0.75 °C/W
1. The
case temperature is measured right underneath the device die on cooling pad
DS13748
–
Rev 1
page 3/18
STTN6050H-12M1Y
Characteristics (curves)
1.1
Characteristics (curves)
Figure 1.
SCR on-state characteristics (maximum value),
T
j
= 25 °C and 150 °C
Figure 2.
SCR maximum average power dissipation
versus average half-wave on-state current, a = 30° to 180°
P(W)
60
I
(A)
TM
1000
100
10
α = 120 °
55
50
45
40
35
30
25
20
15
10
5
T max:
j
V
T0T
= 0.80 V
R
DT
= 7.35 mΩ
α = 90 °
α = 60 °
α = 180 °
T =
150 °C
j
α = 30 °
360 °
T =
25 °C
j
I
(A)
V
(V)
α
TM
T
(AV)
1
0
0
0.5
1
1.5
2
2.5
3
3.5
4
4.5
5
5.5
0
10
20
30
40
50
Figure 4.
SCR relative variation of thermal impedance
junction to case and junction to ambient versus pulse
duration, 1 ms to 1 s
Figure 3.
SCR average on-state current versus case
temperature
I
(A)
T
(AV)
K = [Z
/ R
]
th th
50
40
30
20
10
0
1.0E+00
α = 180 °
α = 120 °
α = 90 °
Z
th(j-c)
α = 60 °
α = 30 °
T (°C)
c
t (s)
P
1.0E-01
1.0E-03
0
25
50
75
100
125
150
1.0E-02
1.0E-01
1.0E+00
Figure 6.
SCR relative variation of holding current and
latching current versus junction temperature (typical
values)
Figure 5.
SCR relative variation of gate trigger voltage and
current versus junction temperature (typical values)
I
V
[ T
] / I
j
V [
T =
25 °C]
G
T
,
G
T
j
G
T
,
G
T
I
I
[ T
] / I
j
I
[ T
= 25 °C]
H, L
H, L
j
1.5
1.0
0.5
0.0
1.6
1.2
0.8
0.4
0.0
I
GT
I
H
I
L
V
GT
T (°C)
j
T (°C)
j
-50
-25
0
25
50
75
100
125
150
-50
-25
0
25
50
75
100
125
150
DS13748
–
Rev 1
page 4/18
STTN6050H-12M1Y
Characteristics (curves)
Figure 7.
SCR non repetitive surge peak on-state current
Figure 8.
SCR surge peak forward current versus number
for a sinusoidal pulse (t
p
< 10 ms), V
R
= 0 V
of half cycles, V
R
= 0 V
I
TSM
(A)
I
(A)
TSM
700
650
600
550
500
450
400
350
300
250
200
150
100
50
10000
1000
100
T initial
= 25 °C
j
Non repetitive T
= 25 °C
j
I
TSM
dl/dt limitation: 200 A/µs
Repetitive Tc = 106 °C
t (ms)
p
10
Number of cycles
100
0
1.E-02
1.E-01
1.E+00
1.E+01
1
10
1000
Figure 10.
SCR junction capacitance versus reverse
voltage applied, gate open (typical values)
Figure 9.
SCR relative variation of the static dV/dt
immunity versus junction temperature (typical values
C(pF)
1000.0
dV/dt [T
j
] / dV/dt [
T
j
= 150 °C]
6
F = 1 MHz
V
osc
= 30 mV
RMS
T
j
= 25 °C
V
D
= V
R
= 2/3 V
DRM
5
100.0
10.0
4
3
2
1
T (°C)
j
0
V
R
(V)
1.0
10
25
50
75
100
125
150
100
1000
Figure 11.
SCR relative variation of leakage current versus junction temperature for max blocking voltage
(typical values)
I
DRM
,I
RRM
[Tj , V
DRM
, V
RRM
] / I
DRM
,
I
RRM
[150 °C , 1200 V]
1.0E+00
1.0E-01
1.0E-02
1.0E-03
1.0E-04
T (°C)
j
1.0E-05
25
50
75
100
125
150
DS13748
–
Rev 1
page 5/18
STTN6050H-12M1Y
Application
2
Application
2.1
Solid state Inrush current limitation (ICL) using STTN6050H-12M1Y
SCRs can be used in single and three phase applications as AC line polarity switches with an active current
limitation at power up or line recovery.
For more information, refer to the application note:
•
AN4606
: Inrush-current limiter circuits (ICL) with Triacs and thyristors (SCR) and controlled bridge design
tips.
Solid-state topologies with SCR allow the applications to easily comply to the following standard:
1.
2.
IEC61000-3-3 (voltage fluctuations and flicker in public low-voltage supply systems, for equipment with rated
current ≤ 16 A). the high current powered from the grid may lead to voltage fluctuations and drops due to
the line impedance. Those mains voltage disturbances have an impact on any other equipment connected to
the same circuit and cause undesired brightness variation of lamps or displays (commonly called flickering
phenomenon).
IEC61000-4-11 (voltage dips, short interruptions, and voltage variations immunity tests) As any appliance
connected to the mains can be subject to line voltage dips or interruptions, a high input current may
occur when the line voltage suddenly comes back to its nominal value. This high current may damage the
front-end circuit components and can trigger an AC fuse for example.
2.1.1
Single- phase applications
Figure 12
and
Figure 13
define an active inrush current limiter in single-phase application with SCRs respectively
in full wave SCRs bridge and in PFC totem pole bridgeless topology.
Figure 12.
Single-phase full wave SCRs bridge rectifier
Figure 13.
Single-phase PFC Totem Pole bridgeless
D_BP
HVDC
G2
S2
L
STTN6050H-12M1Y
HVDC
T2
D2
G1
T1
G3
T3
D1
VAC
L
+
C
C
+
S1
S1
VAC
D1
G1
T1
G2
T2
G4
T4
STTN6050H-12M1Y
STTN6050H-12M1Y
SCRs are controlled in phase angle to smoothly increase the PFC output capacitor voltage up to peak AC line
voltage. The pre-charging peak current value is controlled by a microcontroller which smartly synchronize the
SCRs gate driving signal angle step (referred as Δt in the
Figure 14
here below). Limiting resistor like a negative
temperature coefficient resistor (NTC) is no more needed.
DS13748
–
Rev 1
page 6/18
STTN6050H-12M1Y
Solid state Inrush current limitation (ICL) using STTN6050H-12M1Y
Figure 14.
Inrush current controlled by SCRs principle
HVDC
V
AC
I
Line
t
G1 / G4
G2 / G3
t
t
∆
t
4x
∆
t
2x
∆
t
3x
∆
t
5x
∆
t
2.1.2
Three-phase applications
Figure 15
and
Figure 16
define an example of active inrush current limiter in three-phase application with SCR
respectively in three-phase SCRs bridge rectifier and in three-phase VIENNA with 6 totem-pole SCRs topology.
Figure 15.
Three-phase SCRs bridge rectifier
Figure 16.
Three-phase VIENNA with 6 Totem-Pole SCR
HVDC
D1
STTN6050H-12M1Y
STTN6050H-12M1Y
HVDC
G1
T1
+
G5
T5
G3
T3
v
(L1,N)
i
(L1)
i
(L2)
i
(L3)
M
+
C
VAC
v
(L2,N)
N
+
v
(L3,N)
G4
T4
G2
T2
G6
T6
STTN6050H-12M1Y
DS13748
–
Rev 1
page 7/18
STTN6050H-12M1Y
Solid state relay (SSR) using STTN6050H-12M1Y
2.2
Solid state relay (SSR) using STTN6050H-12M1Y
Solid-state relays (SSR) can perform same tasks as electromechanical relay. SSR provides a high reliability, a
long service life, an electromagnetic interference reduction, a fast response. Moreover, the SSR has no moving
parts to wear out or arcing contacts to deteriorate that are cause of failure about the electromechanical relay.
As defined by the
Figure 17
, when a control current is applied to the input of the opto-TRIAC, the SCRs are
turned on. When the control current is removed from the input of the opto-TRIAC, SCRs are turned off when the
load current falls to the zero. Note the SSR can be used as contactor for 2-phase motor (see
Figure 18
) or as
Figure 17.
SSR as AC load control
Figure 18.
SSR as contactor
L1
L2
L3
T3
T1
MOTOR
T2
Figure 19.
SSR as relay bypass
Relay
LOAD
G1
V
AC
T2
T1
G2
DS13748
–
Rev 1
page 8/18
STTN6050H-12M1Y
Dissipated power and junction temperature calculation at steady state
2.3
Dissipated power and junction temperature calculation at steady state
2.3.1
Dissipated power definition
Dissipated power of the SCR is defined by the following equation with V
TOT
the SCR on-state threshold voltage,
R
DT
the SCR on-state dynamic resistance, I
T(AV)
the SCR average current and I
T(RMS)
the SCR RMS current:
2
P
=
V
TOꢀ
×
I
T AV
+
R
Dꢀ
×
I
(1)
d
T RMS
T
a
ble 4
gives the average and RMS current of SCR according to the topology defined in the previous section by
considering the RMS current of the AC line I
L(RMS)
is a sinus waveform.
Table 4.
I
T(AV)
and I
T(RMS)
definition
Topology
Current definition
Single-phase full wave SCRs bridge
rectifier
2
π
I
ꢁ
=
×
ꢁ
T(AV)
ꢀ ꢂꢃ
L ꢄꢅꢆ
Single-phase PFC
T
o
tem Pole
bridgeless
SSR
ꢁ
L ꢄꢅꢆ
I
ꢁ
ꢀ ꢄꢅꢆ
=
T(RMS)
Three-phase VIENNA with 6
T
o
tem-Pole
SCRs
2
DS13748
–
Rev 1
page 9/18
STTN6050H-12M1Y
Dissipated power and junction temperature calculation at steady state
2.3.2
Junction temperature definition
Figure 20.
Die assembly representation
When
T
c
v
alue is known, silicon junction temperature can be calculated as follows:
ꢀ
=
ꢀ
+
ꢇ
×
ꢄ
ꢀH j
− c
j
C
ꢈ
Otherwise, starting from ambient temperature measurement, junction temperature can be calculated as follows:
ꢀ
=
ꢀ
+
ꢇ
×
ꢄ
j
ꢂ
ꢈ
ꢀH j
− a
Note:
R
th(j-c)
value is given in the datasheet above.
with:
ꢄ
=
ꢄ
+
ꢄ
+
ꢄ
ꢀH
ℎ
− a
ꢀH j
− a
ꢀH j
− c
ꢀH c
−
ℎ
and where R
TH(c-h)
is the thermal interface resistance (grease or foil) and R
TH(h-a)
is the heatsink thermal
resistance.
For more information about the thermal management and power dissipation calculation, refer to the application
note:
•
AN533
: SCRs, TRIACs, and AC switches, thermal management precautions for handling and mounting
DS13748
–
Rev 1
page 10/18
STTN6050H-12M1Y
Package information
3
Package information
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK
packages,
depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product
3.1
ACEPACK SMIT package information
•
•
Lead-free package leads finishing
Halogen-free molding compound resin meets UL94 standard level V0
Figure 21.
ACEPACK SMIT package outline
DM00447519_Rev.5
DS13748
–
Rev 1
page 11/18
STTN6050H-12M1Y
ACEPACK SMIT
package information
Table 5.
ACEPACK SMIT package mechanical data
mm
Typ.
20.00
22.00
23.00
25.00
32.70
9.00
Inches (for reference only)
Typ.
Dim.
Min.
19.50
21.50
22.80
24.80
32.20
Max.
20.50
22.50
23.20
25.20
33.20
Min.
Max.
A
B
0.7677
0.8465
0.8976
0.9764
1.2677
0.7874
0.8661
0.9055
0.9843
1.2874
0.3543
0.1575
0.2657
0.3740
0.0394
0.0787
0.0000
0.0217
0.0591
0.1909
0.1575
0.2165
0.0591
0.0591
2°
0.8071
0.8858
0.9134
0.9921
1.3071
C
D
E
b
b1
b2
b3
c
4.00
6.75
9.50
0.95
1.95
0.00
0.45
1.30
4.65
3.95
5.40
1.30
1.30
0°
1.00
1.10
2.10
0.15
0.65
1.70
5.05
4.05
5.60
1.80
1.80
4°
0.0374
0.0768
0.0000
0.0177
0.0512
0.1831
0.1555
0.2126
0.0512
0.0512
0°
0.0433
0.0827
0.0059
0.0256
0.0669
0.1988
0.1594
0.2205
0.0709
0.0709
4°
c1
d
2.00
d1
e
0.55
1.50
4.85
4.00
5.50
1.50
1.50
2°
e1
L
L1
m
m1
V
aaa
bbb
0.01
0.00
0.05
0.10
0.0004
0.0000
0.0020
0.0039
Figure 22.
ACEPACK SMIT recommended footprint (dimensions are in mm)
4.00 (x9)
30.10
DM00447519_FP_Rev.5
Note:
DS13748
–
Rev 1
page 12/18
STTN6050H-12M1Y
ACEPACK SMIT package insulation information
3.2
ACEPACK SMIT package insulation information
Figure 23.
ACEPACK SMIT package insulation information
Table 6.
ACEPACK SMIT package insulation characteristics
Parameter
Symbol
L2
Value Unit
Pin-to-pin creepage distance
T
e
rminal to terminal: 3 to 4, 7 to 8, 8 to 9
Min.
Min.
Max.
6.6
4
mm
mm
mA
L3
Pin-to-backside creepage distance
RMS tab-to-pin lead insulation current
I
Duration = 1 s., V
= 4.8 kV
INS
1
INS
Note:
DS13748
–
Rev 1
page 13/18
STTN6050H-12M1Y
ACEPACK SMIT terminal description
3.3
ACEPACK SMIT terminal description
Table 7.
ACEPACK SMIT STTN6050H-12M1Y module pinout description
Pin #
Name
C2
Description
T2 cathode drive
Not connected
T2 gate
1
2
3
4
5
6
7
8
9
NC
G2
G1
T1 gate
NC
Not connected
T1 cathode drive
DC output 1
DC output 2
AC line
C1
DC1
DC2
AC
Figure 24.
ACEPACK SMIT STTD6050H-12M2Y module pinout
DS13748
–
Rev 1
page 14/18
STTN6050H-12M1Y
ACEPACK SMIT packing information
3.4
ACEPACK SMIT packing information
Figure 25.
ACEPACK SMIT carrier tape outline, bottom view
Table 8.
ACEPACK SMIT carrier tape dimensions
Carrier tape typical dimension (mm)
A
B
D
0
D
1
E
K
K
P
P
1
P
2
C
F
G
T
W
0
0
1
0
1
0
26.00 33.30
0.40
2.00
1.50
1.75
26.20 24.10
7.10
5.80
4.00
36.00
2.00
0.35
56.00
Figure 26.
ACEPACK SMIT reel outline
Table 9.
ACEPACK SMIT reel dimensions
Reel dimension (mm)
Base qty.
T (max.)
A
B (max.)
22.4
C
D (min.)
E (max.)
F (min.)
20.2
G
1
200
16.4 ±0.3
13.2 ±0.2
20.2 ±0.25
330
2.0 ±0.5
0.1
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STTN6050H-12M1Y
Ordering information
4
Ordering information
Figure 27.
Ordering information scheme
ST
T
N
60
50
H
–
12
M1
Y
Devices Type
TN = Thyristor SCR
RMS SCR current
60 = 60 A
Gate triggering Current
50 = 50 mA
High Temperature
H = 150 °C rated
Blocking Voltage
12 = 1200 V
Package
M1 = ACEPACK SMIT module with one embedde
d
l
eg
Quality grade
Comply with automotive AQG324
Table 10.
Ordering information
Order code
Marking
Package
Weight
Base qty.
Delivery mode
STTN6050H-12M1Y
STTN6050H12M1Y
ACEPACK SMIT
8.1 g
200
T
a
pe and reel
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STTN6050H-12M1Y
Revision history
Table 11.
Document revision history
Date
15-Jun-2021
Revision
Changes
1
Initial release.
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STTN6050H-12M1Y
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