STMicroelectronics-STW11NK90Z
| Part # | STMicroelectronics-STW11NK90Z |
Download  | STMicroelectronics-STW11NK90Z |
STW11NK90Z
N-channel 900V – 0.82
Ω
– 9.2A – TO-247
Zener-protected SuperMESH™ Power MOSFET
General features
Type
V
DSS
R
DS(on)
I
D
Pw
STW11NK90Z
900V
<0.98
Ω
9.2A 200W
■
100% avalanche tested
■
Extremely high dv/dt capability
■
Gate charge minimized
■
Very low intrinsic capacitances
TO-247
■
Very good manufacturing repeability
Description
The SuperMESH™ series is obtained through an
extreme optimization of ST’s well established
strip-based PowerMESH™ layout. In addition to
pushing on-resistance significantly down, special
care is taken to ensure a very good dv/dt
capability for the most demanding applications.
Such series complements ST full range of high
voltage Power MOSFETs including revolutionary
MDmesh™ products
Internal schematic diagram
Applications
■
Switching application
Order codes
Part number
Marking
Package
Packaging
STW11NK90Z
W11NK90Z
TO-247
T
u
be
July 2006
Rev 2
1/12
12
Contents
STW11NK90Z
Contents
Electrical ratings
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Electrical characteristics
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Revision history
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
2/12
STW11NK90Z
Electrical ratings
1
Electrical ratings
Table 1.
Absolute maximum ratings
Symbol
Parameter
Value
Unit
V
DS
V
DGR
V
GS
I
D
Drain-source voltage (V
GS
= 0)
Drain-gate voltage (R
GS
= 20K
Ω
)
Gate-source voltage
900
900
30
V
V
V
Drain current (continuous) at T
C
= 25°C
Drain current (continuous) at T
C
=100°C
Drain current (pulsed)
9.2
A
I
D
5.8
A
(1)
I
DM
36.8
200
1.51
6000
4.5
A
P
TOT
T
o
tal dissipation at T
C
= 25°C
Derating factor
W
W/°C
V
V
ESD(G-D)
Gate source ESD(HBM-C=100p
F
,
R
=1.5K
Ω
)
dv/dt
(2)
Peak diode recovery voltage slope
V/ns
T
J
Operating junction temperature
Storage temperature
-55 to 150
°C
T
stg
1. Pulse
width limited by safe operating area
2.
I
SD
<
9.2A, di/dt
<
200A/µs, V
DD
=80%
V
(BR)DSS
Table 2.
Thermal resistance
Symbol
Parameter
Value
Unit
R
thj-case
R
thj-a
T
l
Thermal resistance junction-case Max
0.66
50
°C/W
°C/W
°C
Thermal resistance junction-ambient Max
Maximum lead temperature for soldering purpose
300
Table 3.
Avalanche data
Symbol
Parameter
Value
Unit
Avalanche current, repetitive or not-repetitive
(pulse width limited by Tj Max)
I
AR
9.2
A
Single pulse avalanche energy
E
AS
400
mJ
(starting Tj=25°C, Id=Iar, Vdd=50V)
3/12
Electrical characteristics
STW11NK90Z
2
Electrical characteristics
(T
=25°C unless otherwise specified)
CASE
Table 4.
On/off states
Parameter
Symbol
Test conditions
Min.
Typ. Max. Unit
Drain-source breakdown
voltage
V
(BR)DSS
I
D
= 1mA, V
GS
= 0
900
V
V
DS
= Max rating,
1
µA
µA
Zero gate voltage drain
current (V
GS
= 0)
I
DSS
V
DS
= Max rating @125°C
50
Gate body leakage current
(V
DS
= 0)
I
GSS
V
GS
= 20V
±
10
µA
V
GS(th)
R
DS(on)
V
DS
= V
GS
, I
D
= 100µA
V
GS
= 10
V
,
I
D
= 4.6A
Gate threshold voltage
3
3.75
0.82
4.5
V
Static drain-source on
resistance
0.98
Ω
Table 5.
Dynamic
Symbol
Parameter
Test conditions
Min. Typ. Max. Unit
(1)
V
DS
=15
V
,
I
D
= 4.6A
Forward transconductance
11
S
g
fs
C
iss
C
oss
C
rss
Input capacitance
3000
240
48
pF
pF
pF
Output capacitance
V
DS
=25
V
,
f
=1 MHz, V
GS
=0
Reverse transfer
capacitance
(2)
Equivalent output
capacitance
C
oss eq
.
V
GS
=0, V
DS
=0V to 720V
83
pF
Q
g
Q
gs
Q
gd
V
DD
=720
V
,
I
D
= 9.2A
V
GS
=10V
T
o
tal gate charge
Gate-source charge
Gate-drain charge
95
14
49
115
nC
nC
nC
1. Pulsed:
pulse duration=300µs, duty cycle 1.5%
2. C
oss eq.
is defined as a constant equivalent capacitance giving the same charging time as C
oss
when V
DS
inceases from 0 to 80% V
DSS
Table 6.
Switching times
Symbol
Parameter
Test conditions
Min.
Typ. Max. Unit
t
d(on)
t
r
t
d(off)
t
f
T
u
rn-on delay time
Rise time
30
19
76
50
ns
ns
ns
ns
V
DD
=450
V
,
I
D
= 4.6A,
R
G
=4.7
Ω
,
V
GS
=10V
T
u
rn-off delay time
Fall time
4/12
STW11NK90Z
Electrical characteristics
Table 7.
Source drain diode
Symbol
Parameter
Test conditions
Min. Typ. Max. Unit
I
SD
Source-drain current
9.2
36.8
1.6
A
A
V
(1)
Source-drain current (pulsed)
Forward on voltage
I
SDM
(2)
I
SD
=9.2A, V
GS
=0
V
SD
I
SD
=9.2A,
t
rr
Reverse recovery time
Reverse recovery charge
Reverse recovery current
584
6
ns
µC
A
di/dt = 100A/µs,
Q
rr
V
DD
=50
V
,
T
j=25°C
21
I
RRM
I
SD
=9.2A,
t
rr
Reverse recovery time
Reverse recovery charge
Reverse recovery current
790
8.7
22
ns
µC
A
di/dt = 100A/µs,
Q
rr
V
DD
=50
V
,
T
j=150°C
I
RRM
1. Pulse
width limited by safe operating area
2. Pulsed:
pulse duration=300µs, duty cycle 1.5%
Table 8.
Gate-source zener diode
Symbol
Parameter
Test conditions
Min. Typ.
Max. Unit
Gate-source breakdown
voltage
(1)
BV
GSO
Igs= 1mA
(open drain)
30
V
1. The
built-in back-to-back Zener diodes have specifically been designed to enhance not only the device’s
ESD capabilit
y
, but also to make them safely absorb possible voltage transients that may occasionally be
applied from gate to source. In this respect the Zener voltage is appropriate to achieve an efficient and
cost-effective intervention to protect the device’s integrit
y
.
T
hese integrated Zener diodes thus avoid the
usage of external components.
5/12
Electrical characteristics
STW11NK90Z
2.1
Electrical characteristics (curves)
Figure 1.
Safe operating area
Figure 2.
Thermal impedance
Figure 3.
Output characterisics
Figure 4.
Transfer characteristics
Figure 5.
Normalized B
vs temperature
Figure 6.
Static drain-source on resistance
VDSS
6/12
STW11NK90Z
Electrical characteristics
Figure 7.
Gate charge vs gate-source voltage
Figure 8.
Capacitance variations
Figure 9.
Normalized gate threshold voltage
Figure 10.
Normalized on resistance vs
vs temperature
temperature
Figure 11.
Source-drain diode forward
characteristics
Figure 12.
Maximum avalanche energy vs
temperature
7/12
Test circuits
STW11NK90Z
3
Test circuits
Figure 13.
Switching times test circuit for
resistive load
Figure 14.
Gate charge test circuit
Figure 15.
Test circuit for inductive load
switching and diode recovery times
Figure 16.
Unclamped Inductive load test
circuit
Figure 17.
Unclamped inductive waveform
Figure 18.
Switching time waveform
8/12
STW11NK90Z
Package mechanical data
4
Package mechanical data
In order to meet environmental requirements, ST offers these devices in ECO
P
A
CK®
packages. These packages have a Lead-free second level interconnect . The category of
second level interconnect is marked on the package and on the inner box label, in
compliance with JEDEC Standard JESD97. The maximum ratings related to soldering
conditions are also marked on the inner box label. ECO
P
ACK is an ST trademark.
9/12
Package mechanical data
STW11NK90Z
TO-247 MECHANICAL DATA
mm.
inch
TYP.
DIM.
MIN.
4.85
2.20
1.0
TYP
MAX.
5.15
MIN.
0.19
MAX.
0.20
A
A1
b
2.60
0.086
0.039
0.079
0.118
0.015
0.781
0.608
0.102
0.055
0.094
0.134
0.03
1.40
b1
b2
c
2.0
2.40
3.0
3.40
0.40
19.85
15.45
0.80
D
20.15
15.75
0.793
0.620
E
e
5.45
18.50
5.50
0.214
0.728
0.216
L
14.20
3.70
14.80
4.30
0.560
0.14
0.582
0.17
L1
L2
øP
øR
S
3.55
4.50
3.65
5.50
0.140
0.177
0.143
0.216
10/12
STW11NK90Z
Please Read Carefully:
Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the
right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any
time, without notice.
All ST products are sold pursuant to ST’s terms and conditions of sale.
Purchasers are solely responsible for the choice, selection and use of the ST products and services described herein, and ST assumes no
liability whatsoever relating to the choice, selection or use of the ST products and services described herein.
No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. If any part of this
document refers to any third party products or services it shall not be deemed a license grant by ST for the use of such third party products
or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoever of such
third party products or services or any intellectual property contained therein.
UNLESS OTHERWISE SET FORTH IN ST’S TERMS AND CONDITIONS OF SALE ST DISCLAIMS ANY EXPRESS OR IMPLIED
WARRANTY WITH RESPECT TO THE USE AND/OR SALE OF ST PRODUCTS INCLUDING WITHOUT LIMITATION IMPLIED
WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE (AND THEIR EQUIVALENTS UNDER THE LAWS
OF ANY JURISDICTION), OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT.
UNLESS EXPRESSLY APPROVED IN WRITING BY AN AUTHORIZED ST REPRESENTATIVE, ST PRODUCTS ARE NOT
RECOMMENDED, AUTHORIZED OR WARRANTED FOR USE IN MILITARY, AIR CRAFT, SPACE, LIFE SAVING, OR LIFE SUSTAINING
APPLICATIONS, NOR IN PRODUCTS OR SYSTEMS WHERE FAILURE OR MALFUNCTION MAY RESULT IN PERSONAL INJURY,
DEATH, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE. ST PRODUCTS WHICH ARE NOT SPECIFIED AS “AUTOMOTIVE
GRADE” MAY ONLY BE USED IN AUTOMOTIVE APPLICATIONS AT USER’S OWN RISK.
Resale of ST products with provisions different from the statements and/or technical features set forth in this document shall immediately void
any warranty granted by ST for the ST product or service described herein and shall not create or extend in any manner whatsoever, any
liability of ST.
ST and the ST logo are trademarks or registered trademarks of ST in various countries.
Information in this document supersedes and replaces all information previously supplied.
The ST logo is a registered trademark of STMicroelectronics. All other names are the property of their respective owners.
© 2006 STMicroelectronics – All rights reserved
STMicroelectronics group of companies
Australia – Belgium – Brazil – Canada – China – Czech Republic – Finland – France – Germany – Hong Kong – India – Israel – Italy – Japan –
Malaysia – Malta – Morocco – Singapore – Spain – Sweden – Switzerland – United Kingdom – United States of America
12/12
