STMicroelectronics-STW13NK100Z

STW11NK100Z  

STW13NK100Z  

N-channel 1000V – 0.56

Ω

– 13A – TO-247  

Zener – Protected SuperMESH™ PowerMOSFET  

General features  

V

DSS  

Type  

R

DS(on)  

I

D  

P

W  

(@Tjmax)  

STW13NK100Z  

1000 V

 

< 0.70

Ω

13 A

 

350W  

■

Extremely high dv/dt capability  

■

100% avalanche tested  

■

Gate charge minimized  

TO-247  

■

Very low intrinsic capacitances  

■

Very good manufacturing repeatibility  

Description  

The SuperMESH™ series is obtained through an  

extreme optimization of ST’s well established  

strip-based PowerMESH™ layout. In addition to  

pushing on-resistance significantly down, special  

care is taken to ensure a very good dv/dt  

capability for the most demanding applications.  

Such series complements ST full range of high  

voltage MOSFETs including revolutionary  

MDmesh™ products.  

Internal schematic diagram  

Applications  

■

Switching application  

Order codes  

Part number  

Marking  

Package  

Packaging  

STW13NK100Z  

W13NK100Z  

TO-247  

T

u

be  

August 2006  

Rev 5  

1/14  

14  

Contents  

STW13NK100Z  

Contents  

2/14  

STW13NK100Z  

Electrical ratings  

1

Electrical ratings  

Table 1.  

Symbol  

Absolute maximum ratings  

Parameter  

Value  

Unit  

V

DS  

V

DGR  

V

GS  

I

D  

Drain-source voltage (V

GS

= 0)  

Drain-gate voltage (R

GS

= 20K

Ω

)  

Gate-source voltage  

1000  

1000  

30  

V

V

V

Drain current (continuous) at T

C

= 25°C  

Drain current (continuous) at T

C

=100°C  

Drain current (pulsed)  

13  

A

I

D  

8.2  

52  

A

(1)  

I

DM  

A

P

TOT  

T

o

tal dissipation at T

C

= 25°C  

Derating Factor  

350  

2.7  

6000  

4

W

W/°C  

V

V

ESD (G-S)

 

Gate source ESD(HBM-C=100p

F

,

R

=1,5K

Ω

)  

dv/dt

(2)  

Peak diode recovery voltage slope  

V/ns  

T

J  

Operating junction temperature  

Storage temperature  

-55 to 150  

°C  

T

stg  

1. Pulse

 

width limited by safe operating area  

2.

I

SD

≤

8.3 A, di/dt

≤

200A/µs, V

DD

≤

V

(BR)DSS

, T

j

≤

T

JMAX  

Table 2.  

Symbol  

Thermal data  

Parameter  

Value  

Unit  

R

thj-case

Thermal resistance junction-case Max  

0.36  

50  

°C/W  

°C/W  

R

thj-a  

T

l  

Thermal resistance junction-ambient Max  

Maximum lead temperature for soldering  

purpose  

300  

°C  

Table 3.  

Symbol  

Avalanche characteristics  

Parameter  

Value  

Unit  

Avalanche current, repetitive or not-repetitive  

(pulse width limited by Tj Max)  

I

AR  

13  

A

Single pulse avalanche energy  

E

AS  

700  

mJ  

(starting Tj=25°C, Id=Iar, Vdd=50V)  

3/14  

Electrical ratings  

STW13NK100Z  

Table 4.  

Symbol  

Gate-source zener diode  

Parameter  

Test conditions  

Min. Typ. Max. Unit  

BV

GSO

Gate-source breakdown voltage

 

Igs= 1mA

 

(Open Drain)

 

30  

V

1.1  

Protection features of gate-to-source zener diodes  

The built-in back-to-back Zener diodes have specifically been designed to enhance not only  

the device’s ESD capability, but also to make them safely absorb possible voltage transients  

that may occasionally be applied from gate to source. In this respect the Zener voltage is  

appropriate to achieve an efficient and cost-effective intervention to protect the device’s  

integrity. These integrated Zener diodes thus avoid the usage of external components.  

4/14  

STW13NK100Z  

Electrical characteristics  

2

Electrical characteristics  

(T  

=25°C unless otherwise specified)  

CASE  

Table 5.  

Symbol  

On/off states  

Parameter  

Test conditions  

I

D

= 1mA, V

GS

= 0  

Min.  

Typ.  

Max.  

Unit  

Drain-source breakdown  

voltage  

V

(BR)DSS  

1000  

V

V

DS

= Max rating,  

V

DS

= Max rating,  

Tc = 125°C  

1

µA  

µA  

Zero gate voltage drain  

current (V

GS

= 0)  

I

DSS  

10  

Gate body leakage current  

(V

GS

= 0)  

I

GSS  

V

GS  

=

20V  

±

10  

4.5  

µA  

V

V

GS(th)

Gate threshold voltage  

V

DS

= V

GS

, I

D

= 150 µA  

V

GS

= 10

V

,

I

D

= 6.5 A  

3

3.75  

0.56  

Static drain-source on  

resistance  

R

DS(on)  

0.70  

Ω

Table 6.  

Dynamic  

Parameter  

Symbol  

Test conditions  

Min.  

Typ.  

Max.  

Unit  

(1)  

g

fs  

Forward transconductance

 

V

DS

=15

V

,

I

D

= 6.5 A  

Input capacitance  

14  

S

C

iss  

C

oss  

C

rss  

6000  

455  

pF  

pF  

pF  

Output capacitance  

V

DS

=25

V

,

f

=1 MHz, V

GS

=0  

Reverse transfer  

capacitance  

100  

Equivalent output  

V

GS

=0, V

DS

=0V to 800V  

capacitance  

(2)  

C

osseq  

227  

pF  

.

t

d(on)  

t

r  

t

d(off)  

t

f  

T

u

rn-on delay time  

V

DD

=500

V

,

I

D

= 7A,  

Rise time  

45  

35  

ns  

ns  

ns  

ns  

R

G

=4.7

Ω

,

V

GS

=10V  

Off-voltage rise time  

(see

)  

Fall time  

145  

45  

Q

g  

Q

gs  

Q

gd  

T

o

tal gate charge  

V

DD

=800

V

,

I

D

= 13A  

Gate-source charge  

V

GS

=10V  

190  

30  

266  

nC  

nC  

nC  

Gate-drain charge  

100  

1. Pulsed:

 

pulse duration=300µs, duty cycle 1.5%  

2. C

oss eq.

is defined as a constant equivalent capacitance giving the same charging time as C

oss

when V

DS  

increases from 0 to 80% V

DSS  

5/14  

Electrical characteristics  

STW13NK100Z  

Table 7.  

Symbol  

Source drain diode  

Parameter  

Test conditions  

Min Typ. Max Unit  

I

SD  

Source-drain current  

13  

52  

A

A

V

(1)  

I

SDM  

Source-drain current (pulsed)  

Forward on voltage  

(2)  

V

SD  

I

SD

=8.3A, V

GS

=0  

1.6  

I

SD

=13 A,  

t

rr  

Reverse recovery time  

Reverse recovery charge  

Reverse recovery current  

820  

12.7  

31  

ns  

µC  

A

di/dt = 100A/µs,  

V

DD

=100

V

,

T

j=25°C  

(see

)  

Q

rr  

I

RRM  

I

SD

=13 A,  

t

rr  

Reverse recovery time  

Reverse recovery charge  

Reverse recovery current  

1050  

17.8  

34  

ns  

µC  

A

di/dt = 100A/µs,  

V

DD

=100

V

,

T

j=150°C  

(see

)  

Q

rr  

I

RRM  

1. Pulse

 

width limited by safe operating area  

2. Pulsed:

 

pulse duration=300µs, duty cycle 1.5%  

6/14  

STW13NK100Z  

Electrical characteristics  

2.1  

Electrical characteristics (curves)  

Figure 1.

 

Safe operating area  

Figure 2.

 

Thermal impedance  

Figure 3.

 

Output characterisics  

Figure 4.

 

Transfer characteristics  

7/14  

Electrical characteristics  

STW13NK100Z  

Figure 5.

 

Transconductance  

Figure 6.

 

Static drain-source on resistance  

Figure 7.

 

Gate charge vs gate-source voltage

 

Figure 8.

 

Capacitance variations  

Figure 9.

 

Normalized gate threshold voltage

 

Figure 10.

 

Normalized on resistance vs  

vs temperature

 

temperature  

8/14  

STW13NK100Z  

Electrical characteristics  

Figure 11.

 

Source-drain diode forward  

characteristics  

Figure 12.

 

Normalized B  

vs temperature  

VDSS  

Figure 13.

 

Maximum avalanche  

energy vs temperature  

9/14  

Test circuit  

STW13NK100Z  

3

Test circuit  

Figure 14.

 

Unclamped Inductive load test  

circuit  

Figure 15.

 

Unclamped Inductive waveform  

Figure 16.

 

Switching times test circuit for  

resistive load  

Figure 17.

 

Gate charge test circuit  

Figure 18.

 

Test circuit for inductive load  

switching and diode recovery times  

10/14  

STW13NK100Z  

Package mechanical data  

4

Package mechanical data  

In order to meet environmental requirements, ST offers these devices in ECO

P

A

CK®  

packages. These packages have a Lead-free second level interconnect . The category of  

second level interconnect is marked on the package and on the inner box label, in  

compliance with JEDEC Standard JESD97. The maximum ratings related to soldering  

conditions are also marked on the inner box label. ECO

P

ACK is an ST trademark.  

ECO

P

ACK specifications are available at:

11/14  

Package mechanical data  

STW13NK100Z  

TO-247 MECHANICAL DATA  

mm.  

inch  

TYP.  

DIM.  

MIN.  

4.85  

2.20  

1.0  

TYP  

MAX.  

5.15  

MIN.  

0.19  

MAX.  

0.20  

A

A1  

b

2.60  

0.086  

0.039  

0.079  

0.118  

0.015  

0.781  

0.608  

0.102  

0.055  

0.094  

0.134  

0.03  

1.40  

b1  

b2  

c

2.0  

2.40  

3.0  

3.40  

0.40  

19.85  

15.45  

0.80  

D

20.15  

15.75  

0.793  

0.620  

E

e

5.45  

18.50  

5.50  

0.214  

0.728  

0.216  

L

14.20  

3.70  

14.80  

4.30  

0.560  

0.14  

0.582  

0.17  

L1  

L2  

øP  

øR  

S

3.55  

4.50  

3.65  

5.50  

0.140  

0.177  

0.143  

0.216  

12/14  

STW13NK100Z  

Revision history  

5

Revision history  

Table 8.  

Date  

Revision history  

Revision  

Changes  

22-Jun-2004  

09-Sep-2004  

28-Jan-2005  

18-Sep-2005  

01-Aug-2006  

1

2

3

4

5

T

a

rget document  

Preliminary document  

Complete version with curves  

changed  

New template, no content change  

13/14  

STW13NK100Z  

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