STMicroelectronics-STW45NM50
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STW45NM50
N-
channel 500 V, 0.08 Ω typ., 45 A MDmesh™
Power MOSFET in a TO-247 package
Datasheet – production data
Features
Order code
V
DS
R
DS(on)
max
I
D
STW45NM50
500 V
0.1 Ω
45 A
100% avalanche tested
High dv/dt and avalanche capabilities
Low input capacitance and gate charge
Low gate input resistance
3
2
1
Applications
TO-247
Switching applications
Description
Figure 1: Internal schematic diagram
This N-channel Power MOSFET is developed
using STMicroelectronics’ revolutionary
MDmesh™ technology, which associates the
multiple drain process with the company’s
PowerMESH™ horizontal layout. This
device
offer extremely low on-resistance, high dv/dt and
excellent avalanche characteristics. Utilizing ST’s
proprietary strip technique, this Power MOSFET
boasts an overall dynamic performance which is
superior to similar products on the market.
Table 1: Device summary
Order code
Marking
Package
Packaging
STW45NM50
W45NM50
TO-247
Tube
July 2016
DocID8477 Rev 6
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This is information on a product in full production.
Contents
STW45NM50
Contents
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STW45NM50
Electrical ratings
1
Electrical ratings
Table 2: Absolute maximum ratings
Symbol
Parameter
Value
±30
45
Unit
V
V
GS
I
D
Gate-source voltage
Drain current (continuous) at T
C
= 25 °C
Drain current (continuous) at T
C
= 100 °C
Drain current (pulsed)
A
I
D
28.4
180
390
15
A
I
DM
A
P
TOT
T
stg
Total dissipation at T
C
= 25 °C
Peak diode recovery voltage slope
Storage temperature range
W
V/ns
-55 to 150
°C
T
j
Operating junction temperature range
Notes:
(1)
Pulse width limited by safe operating area.
(2)
I
≤ 45 A, di/dt ≤ 400 A/µs, V
DS(peak)
≤ V
(BR)DSS,
V
DD
≤ 80% V
(BR)DSS
SD
Table 3: Thermal data
Symbol
R
thj-case
R
thj-amb
Parameter
Thermal resistance junction-case
Thermal resistance junction-ambient
Value
0.32
30
Unit
°C/W
°C/W
Table 4: Avalanche characteristics
Symbol
Parameter
Value
Unit
Avalanche current, repetitive or not-repetitive
I
AR
15
A
(pulse width limited by T
j max
)
Single pulse avalanche energy
E
AS
700
mJ
(starting T
J
=25 °C, I
D
=I
AR
, V
DD
=50 V)
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Electrical characteristics
STW45NM50
2
Electrical characteristics
(T
CASE
= 25 °C unless otherwise specified)
Table 5: On/off states
Symbol
Parameter
Drain-source
Test conditions
I
D
= 1 mA, V
GS
= 0 V
V
GS
= 0 V, V
DS
= 500 V
Min. Typ. Max. Unit
V
(BR)DSS
500
V
breakdown voltage
10
Zero gate voltage drain
current
I
DSS
µA
V
GS
= 0 V, V
DS
= 500 V,
100
I
GSS
Gate-body leakage current
Gate threshold voltage
V
DS
= 0 V, V
GS
= ±30 V
V
DS
= V
GS
, I
D
= 250 µA
±100
5
nA
V
V
GS(th)
3
4
Static drain-source on-
resistance
R
DS(on)
V
GS
= 10 V, I
D
= 22.5 A
0.08
0.1
Ω
Notes:
(1)
Defined by design, not subject to production test.
Table 6: Dynamic
Test conditions
Symbol
C
iss
Parameter
Input capacitance
Output capacitance
Min. Typ. Max. Unit
–
–
3290
865
–
–
pF
pF
V
DS
= 25 V, f = 1 MHz,
V
GS
= 0 V
C
oss
Reverse transfer
capacitance
C
rss
–
–
140
270
–
–
pF
pF
Equivalent output
capacitance
V
GS
= 0 V, V
DS
= 0 to 400 V
V
DD
= 400 V, I
D
= 45 A,
Q
g
Total gate charge
–
–
113
17
–
–
nC
nC
Q
gs
Gate-source charge
Q
gd
R
G
Gate-drain charge
–
–
82
–
–
nC
Gate input resistance
f = 1 MHz, I
D
= 0 A
1.7
Ω
Notes:
(1)
C
oss eq.
is defined as a constant equivalent capacitance giving the same charging time as C
oss
when V
DS
increases from 0 to 80% V
DS
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STW45NM50
Electrical characteristics
Min. Typ. Max. Unit
Table 7: Switching times
Test conditions
Symbol
t
d(on)
Parameter
Turn-on delay time
V
DD
= 250 V, I
D
= 22.5 A, R
G
= 4.7 Ω,
–
29.1
–
ns
t
r
Rise time
–
73.6
–
ns
Off-voltage rise
time
V
DD
= 400 V, I
D
= 45 A, R
G
= 4.7 Ω,
t
r(Voff)
–
20.8
–
ns
t
f
Fall time
–
–
58.3
67.6
–
–
ns
ns
t
c
Cross-over time
Table 8: Source-drain diode
Test conditions
Symbol
Parameter
Min.
Typ.
Max. Unit
45
A
A
I
SD
Source-drain current
–
Source-drain current
(pulsed)
–
180
1.5
Forward on voltage
I
SD
= 45 A, V
GS
= 0 V
–
–
V
t
rr
Reverse recovery time
454
ns
I
SD
= 45 A, di/dt = 100 A/µs
Reverse recovery
charge
Q
rr
–
9380
nC
Reverse recovery
current
I
RRM
t
rr
–
–
–
41.3
567
A
Reverse recovery time
ns
nC
I
SD
= 45 A, di/dt = 100 A/µs
Reverse recovery
charge
V
DD
= 100 V, T
j
= 150 °C (see
Q
rr
12700
Reverse recovery
current
I
RRM
–
44.8
A
Notes:
(1)
Pulse width limited by safe operating area.
(2)
Pulsed: pulse duration = 300 µs, duty cycle 1.5%
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Electrical characteristics
STW45NM50
2.1
Electrical characteristics (curves)
Figure 2: Safe operating area
Figure 3: Thermal impedance
d
Figure 4: Output characteristics
Figure 5: Transfer characteristics
Figure 6: Gate charge vs gate-source voltage
Figure 7: Static drain-source on resistance
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STW45NM50
Figure 8: Capacitance variations
Electrical characteristics
Figure 9: Normalized gate threshold voltage vs
temperature
Figure 10: Normalized on-resistance vs temperature
Figure 11: Normalized V(BR)DSS vs temperature
Figure 12: Source-drain diode forward characteristics
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Test circuits
STW45NM50
3
Test circuits
Figure 14: Test circuit for gate charge
Figure 13: Test circuit for resistive load
switching times
behavior
Figure 15: Test circuit for inductive load
switching and diode recovery times
Figure 16: Unclamped inductive load test
circuit
Figure 17: Unclamped inductive waveform
Figure 18: Switching time waveform
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STW45NM50
Package information
4
Package information
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK
®
packages, depending on their level of environmental compliance. ECOPACK
®
ECOPACK
®
is an ST trademark.
4.1
TO-247 package information
Figure 19: TO-247 package outline
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Package information
STW45NM50
Table 9: TO-247 package mechanical data
mm
Dim.
Min.
4.85
2.20
1.0
Typ.
Max.
5.15
2.60
1.40
2.40
3.40
0.80
20.15
15.75
5.60
14.80
4.30
A
A1
b
b1
b2
c
2.0
3.0
0.40
19.85
15.45
5.30
14.20
3.70
D
E
e
5.45
18.50
5.50
L
L1
L2
ØP
ØR
S
3.55
4.50
5.30
3.65
5.50
5.70
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STW45NM50
Revision history
5
Revision history
Table 10: Document revision history
Changes
Date
Revision
30-Mar-2005
23-Jul-2009
4
5
Modified value on
Source drain diode
Modified values on
Switching times
18-Jul-2016
6
DocID8477 Rev 6
11/12
STW45NM50
IMPORTANT NOTICE
–
PLEASE READ CAREFULLY
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der
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Information in this document supersedes and replaces information previously supplied in any prior versions of this document.
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–
All rights reserved
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