STMicroelectronics-STW70N65DM6-4

Part #STMicroelectronics-STW70N65DM6-4
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STMicroelectronics-STW70N65DM6-4
STW70N65DM6-4  
Datasheet  
N-channel 650
V
,
3
6 mΩ typ., 68 A MDmesh DM6 Power MOSFET  
in a TO247
‑
4 package  
Features  
V
R
DS(on)  
max.  
I
D
Order code  
DS  
STW70N65DM6-4  
650 V  
40 mΩ  
68 A  
•
•
•
•
•
•
•
Fast-recovery body diode  
Lower R

DS(on)

per area vs previous generation  
4
3
2
Low gate charge, input capacitance and resistance  
100% avalanche tested  
1
TO247-4  
Drain(1, TAB)  
Extremely high dv/dt ruggedness  
Zener-protected  
Excellent switching performance thanks to the extra driving source pin  
Applications  
Gate(4)  
•
Switching applications  
Driver  
source (3)  
Power  
source (2)  
Description  
AM10177v2Z  
This high-voltage N-channel Power MOSFET is part of the MDmesh DM6 fast-  
recovery diode series. Compared with the previous MDmesh fast generation, DM6  
combines very low recovery charge (Q

rr

), recovery time (t

rr

) and excellent  
improvement in R

DS(on)

per area with one of the most effective switching behaviors  
available in the market for the most demanding high-efficiency bridge topologies and  
ZVS phase-shift converters.  
Product status link  
Product summary  
Order code  
Marking  
STW70N65DM6-4  
70N65DM6  
TO247-4  
Package  
Packing  
Tube  
DS13144
–
Rev 2
–
June 2020  
For further information contact your local STMicroelectronics sales office.  

STW70N65DM6-4  
Electrical ratings  
1
Electrical ratings  
Table 1.
Absolute maximum ratings  
Parameter  
Symbol  
Value  
±25  
68  
Unit  
V
V
Gate-source voltage  
GS  
I
D
Drain current (continuous) at T
 
= 25 °C  
A
C
I
D
Drain current (continuous) at T
 
= 100 °C  
43  
A
C
I
Drain current (pulsed)  
260  
450  
100  
1000  
100  
A
DM  
P
T
o
tal power dissipation at T
 
= 25 °C  
W
TOT  
C
dv/dt

di/dt

Peak diode recovery voltage slope  
Peak diode recovery current slope  
MOSFET dv/dt ruggedness  
V/ns  
A/μs  
V/ns  
°C  
dv/dt

T
Storage temperature range  
STG  
-55 to 150  
T
Operating junction temperature range  
°C  
J
1. Pulse
 
width limited by safe operating area.  
2.  
3.  
I
≤ 68 A, V  
< V  
, V
 
= 400 V.  
(BR)DSS DD  
SD  
DS (peak)  
V
≤ 520 V.  
DS  
Table 2.
Thermal data  
Parameter  
Symbol  
Value  
0.28  
50  
Unit  
°C/W  
°C/W  
R
thj-case  
Thermal resistance junction-case  
Thermal resistance junction-ambient  
R
thj-amb  
Table 3.
Avalanche characteristics  
Symbol  
Parameter  
Value  
8
Unit  
A
I
Avalanche current, repetitive or not repetitive (t
 
limited by T
 
max)  
AR  
p
J
E
Single pulse avalanche energy (starting T
 
= 25 °C, I
 
= I
 
; V
 
= 50 V)  
J D
 
AR DD  
1.8  
J
AS  
DS13144
–
Rev 2  
page 2/12  
 
 
 
 
 

STW70N65DM6-4  
Electrical characteristics  
2
Electrical characteristics  
T

C

= 25 °C unless otherwise specified  
Table 4.
On/off states  
Symbol  
Parameter  
Test conditions  
Min.  
Typ. Max. Unit  
V
V
GS  
V
GS  
V
GS  
V
DS  
V
DS  
V
GS  
= 0
V
, I
 
= 1
m
A  
Drain-source breakdown voltage  
650  
V
(BR)DSS  
D
= 0
V
, V
 
=
6
50 V  
10  
μA  
DS  
I
Zero gate voltage drain current  
DSS  
= 0
V
, V
 
=
6
50 V, T
 
= 125 °C

100  
DS  
C
I
= 0
V
, V
 
=
±
25 V  
Gate-body leakage current  
Gate threshold voltage  
±5  
4.75  
40  
μA  
V
GSS  
GS  
V
= V
 
, I
 
= 250 μA  
3.25  
4
GS(th)  
DS(on)  
GS  
D
R
= 10
 
V
, I
 
=
3
4 A  
D
Static drain-source on resistance  
36  
mΩ  
1. Defined
 
by design, not subject to production test.  
Table 5.
Dynamic characteristics  
Test conditions  
Symbol  
Parameter  
Input capacitance  
Min.  
Typ. Max. Unit  
C
iss  
–
–
–
–
–
–
–
–
4900  
280  
3
–
–
–
–
–
–
–
–
C
oss  
V
= 100 V, f = 1 MHz, V
 
= 0 V  
Output capacitance  
DS  
GS  
pF  
C
rss  
Reverse transfer capacitance  
Equivalent output capacitance  
Intrinsic gate resistance  
T
o
tal gate charge  
V
= 0 to 520
V
, V
 
= 0 V  
C
oss eq  
.
859  
2.3  
125  
33  
DS  
GS  
R
G
f = 1 MHz, I
 
= 0 A  
D
Ω
Q
g
V
DD  
= 520
V
, I
 
=
6
8
 
A, V
 
= 0
 
to 10 V  
D GS  
Q
Gate-source charge  
nC  
gs  
Q
Gate-drain charge  
56  
gd  
1.  
C
oss eq  
is defined as a constant equivalent capacitance giving the same charging time as C  
when V
 
increases from 0  
oss DS  
to 80% V  
.
DSS  
Table 6.
Switching times  
Test conditions  
Symbol  
Parameter  
Min.  
Typ. Max. Unit  
t
Turn-on delay time  
Rise time  
–
–
–
–
TBD  
TBD  
TBD  
TBD  
–
–
–
–
ns  
ns  
ns  
ns  
V
= 325
V
, I
 
=
3
4 A,  
d(on)  
DD  
D
R
= 4.7 Ω , V
 
= 10 V  
t
r
G
GS  
t
Turn-off delay time  
Fall time  
d(off)  
t
f
DS13144
–
Rev 2  
page 3/12  
 
 
 

STW70N65DM6-4  
Electrical characteristics  
Table 7.
Source-drain diode  
Test conditions  
Symbol  
Parameter  
Source-drain current  
Min.  
Typ. Max. Unit  
I
–
–
–
–
–
–
–
–
–
68  
260  
1.6  
A
A
SD  
I
Source-drain current (pulsed)  
Forward on voltage  
SDM  
V
V
= 0
V
, I
 
=
6
8 A  
SD  
V
GS  
SD  
t
rr  
Reverse recovery time  
Reverse recovery charge  
Reverse recovery current  
Reverse recovery time  
Reverse recovery charge  
Reverse recovery current  
17  
ns  
µC  
A
I
= 68 A, di/dt = 100 A/μs, V
 
= 60 V  
DD  
SD  
Q
1.08  
12.7  
308  
4.16  
27  
rr  
I
RRM  
t
I
= 68 A, di/dt = 100 A/μs,  
= 60
V
, T
 
=
1
50 °C  
ns  
µC  
A
rr  
SD  
V
Q
DD  
J
rr  
I
RRM  
1. Pulse
 
width is limited by safe operating area.  
2. Pulsed:
 
pulse duration = 300 μs, duty cycle 1.5%.  
DS13144
–
Rev 2  
page 4/12  
 
 

STW70N65DM6-4  
Electrical characteristics (curves)  
2.1  
Electrical characteristics (curves)  
Figure 1.
Safe operating area  
Figure 2.
Maximum transient thermal impedance  
GADG280620190822ZTH  
Z

thj-c  

(°C/W)  
GADG280620190757SOA  
I

D  

(A)  
Operation in this area  
is limited by R

DS(on)  

I

DM  

duty = 0.5  
0.2  
0.3  
0.4  
s
t

p

= 1 µ  
10

2  

10

1  

10

-1  

s
t

p

= 10 µ  
V

(BR)DSS  

0.1  
R

DS(on)

max.  
10

-2  

10

-3  

s
t

p

= 100 µ  
0.05  
10

0  

T

C

= 25 °C, T

J

≤
150 °C  
single pulse  
single pulse  
t

p

= 1 ms  
V

DS

(V)  
10

-1  

t

p

(s)  
10

-6

10

-5

10

-4

10

-3

10

-2

10

-1  

10

-1  

10

0  

10

1  

10

2  

Figure 3.
Typical output characteristics  
Figure 4.
Typical transfer characteristics  
GADG060620191330OCH  
GADG060620191331TCH  
I

D  

I

D  

(A)  
(A)  
V

GS

= 9, 10 V  
240  
240  
200  
200  
V

GS

= 8 V  
V

DS

= 12 V  
160  
160  
120  
80  
120  
V

GS

= 7 V  
80  
V

GS

= 6 V  
40  
40  
0
0
0
2
4
6
8
10  
12  
V

DS

(V)  
4
5
6
7
8
9
V

GS

(V)  
Figure 5.
Typical gate charge characteristics  
Figure 6.
Typical drain-source on-resistance  
GADG060620191331QVG  
V

DD

= 520 V, I

D

= 68 A  
GADG060620191329RID  
V

DS  

(V)  
V

GS  

(V)  
R

DS(on)  

(mΩ)  
600  
500  
400  
300  
200  
12  
10  
8
39  
Q

g  

38  
37  
Q

gs  

Q

gd  

V

GS

=10 V  
6
36  
35  
4
100  
0
2
34  
33  
0
0
30  
60  
90  
120 150  
Q

g

(nC)  
0
10  
20  
30  
40  
50  
60  
I

D

(A)  
DS13144
–
Rev 2  
page 5/12  
 

STW70N65DM6-4  
Electrical characteristics (curves)  
Figure 7.
Typical capacitance characteristics  
Figure 8.
Typical output capacitance stored energy  
GADG060620191330CVR  
GADG060620191332EOS  
C
E

OSS  

(pF)  
(µJ)  
50  
10

4  

C

ISS  

40  
30  
20  
10

3  

C

OSS  

f = 1 MHz  
10

2  

C

RSS  

10

1  

10

0  

10  
0
10

-1  

10

0  

10

1  

10

2  

V

DS

(V)  
0
100 200 300 400 500 600
 
V

DS

(V)  
Figure 9.
Normalized gate threshold vs temperature  
Figure 10.
Normalized on-resistance vs. temperature  
GADG050620191111VTH  
GADG050620191125RON  
V

GS(th)  

R

DS(on)  

(norm.)  
(norm.)  
1.1  
2.5  
I

D

= 250 µA  
1.0  
2.0  
V

GS

= 10 V  
1.5  
0.9  
0.8  
1.0  
0.7  
0.6  
0.5  
0.0  
-75  
-25  
25  
75  
125  
T

J

(°C)  
-75  
-25  
25  
75  
125  
T

J

(°C)  
Figure 11.
Normalized breakdown voltage vs temperature  
Figure 12.
Typical reverse diode forward characteristics  
GADG060620191329VTH  
GADG060620191330SDF  
V

(BR)DSS  

V

SD  

(norm.)  
(V)  
1.1  
1.10  
T

J

= -50 °C  
I

D

= 1 mA  
1.05  
1.0  
0.9  
T

J

= 25 °C  
1.00  
0.95  
0.8  
T

J

= 150 °C  
0.7  
0.90  
0.85  
0.6  
0.5  
-75  
-25  
25  
75  
125  
T

J

(°C)  
0
10  
20  
30  
40  
50  
60  
I

SD

(A)  
DS13144
–
Rev 2  
page 6/12  

STW70N65DM6-4  
Test circuits  
3
Test circuits  
Figure 14.
Test circuit for gate charge behavior  
Figure 13.
Switching times test circuit for resistive load  
V

DD  

R
L
2200  
3.3  
µF  
R
L  
µF  
V
DD  
+
D.U.
T
.  
I

G

= CONST  
2.7 kΩ  
100 Ω  
V
D  
R
G  
V

GS  

V
GS  
pulse width  
+
D.U.
T
.  
V

G  

2200  
μF  
P
W  
47 kΩ  
GND1  
(driver signal)  
GND2  
(power)  
1 kΩ  
GND1  
GND2  
AM15855v1  
GADG180720181011SA  
Figure 15.
 
Test circuit for inductive load switching and  
diode recovery times  
Figure 16.
 
Unclamped inductive load test circuit  
A
A
A
L
D
S
FAST  
DIODE  
L=100µH  
G
D.U.
T
.  
B
V
D  
2200  
µF  
3.3  
µF  
3.3  
µF  
1000  
µF  
B
V
DD  
B
+
V
DD  
+
D
S
25Ω  
I
D  
G
R
G  
D.U.
T
.  
V
i  
D.U.
T
.  
P
w  
GND2  
GND1  
GND1  
GND2  
AM15858v1  
AM15857v1  
Figure 18.
Switching time waveform  
Figure 17.
Unclamped inductive waveform  
t

on  

t

d(on)  

t

off  

t

d(off)  

V
(BR)DSS  
t

r  

t

f  

V
D  
90%  
90%  
I
DM  
V

DS  

10%  
V

GS  

10%  
0
0
I
D  
V
DD  
V
DD  
90%  
10%  
AM01472v1  
AM01473v1  
DS13144
–
Rev 2  
page 7/12  
 
 
 
 
 

STW70N65DM6-4  
Package information  
4
Package information  
In order to meet environmental requirements, ST offers these devices in different grades of

packages,  
depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product  
status are available at:

. ECOPACK is an ST trademark.  
4.1  
TO247-4 package information  
Figure 19.
TO247-4 package outline  
8405626_2  
DS13144
–
Rev 2  
page 8/12  
 
 

STW70N65DM6-4  
TO247-4 package information  
Table 8.
TO247-4 mechanical data  
mm  
Dim.  
Min.  
4.90  
2.31  
1.90  
1.16  
1.15  
0
Typ.  
5.00  
2.41  
2.00  
Max.  
5.10  
2.51  
2.10  
1.29  
1.25  
0.20  
0.66  
0.62  
21.10  
16.85  
1.35  
25.27  
15.90  
13.50  
5.10  
2.60  
2.64  
5.18  
20.10  
3.70  
7.40  
2.60  
6.00  
A
A1  
A2  
b
b1  
b2  
c
1.20  
0.59  
0.58  
20.90  
16.25  
1.05  
24.97  
15.70  
13.10  
4.90  
2.40  
2.44  
4.98  
19.80  
3.50  
c1  
D
0.60  
21.00  
16.55  
1.20  
D1  
D2  
D3  
E
25.12  
15.80  
13.30  
5.00  
E1  
E2  
E3  
e
2.50  
2.54  
e1  
L
5.08  
19.92  
3.60  
P
P1  
P2  
Q
2.40  
5.60  
2.50  
6.15  
S
T
9.80  
6.00  
10.20  
6.40  
U
DS13144
–
Rev 2  
page 9/12  

STW70N65DM6-4  
Revision history  
Table 9.
Document revision history  
Date  
Version  
Changes  
25-Oct-2019  
29-Jun-2020  
1
2
First release.  
DS13144
–
Rev 2  
page 10/12  
 

STW70N65DM6-4  
Contents  
Contents  

Electrical ratings

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
.

Electrical characteristics

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
.

Electrical characteristics (curves)

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Test circuits

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
.

Package information

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
.

TO247-4 package information

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Revision history

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

DS13144
–
Rev 2  
page 11/12  

STW70N65DM6-4  
IMPORTANT NOTICE – PLEASE READ CAREFULLY  
STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST  
products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST  
products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement.  
Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of  
Purchasers’ products.  
No license, express or implied, to any intellectual property right is granted by ST herein.  
Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product.  
ST and the ST logo are trademarks of S
T
.
F
or additional information about ST trademarks, please refer to

. All other product or service  
names are the property of their respective owners.  
Information in this document supersedes and replaces information previously supplied in any prior versions of this document.  
© 2020 STMicroelectronics – All rights reserved  
DS13144
–
Rev 2  
page 12/12