STMicroelectronics-USBUF02W6
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USBUF
EMI filter and line termination for USB upstream ports
Datasheet
–
production data
•
Complies with the following standards IEC
61000-4-2, level 4
– ±
15 kV (air discharge)
– ±
8 kV (contact discharge)
– MIL
STD 883E, Method 3015-7
– Class
3 C = 100 pF; R = 1500
Ω
SOT323-6L
– 3
positive strikes and 3 negative strikes
(F = 1 Hz)
Application
Figure 1. Functional diagram
EMI Filter and line termination for USB upstream
ports on:
3.3 V
Rp
Rt
D1
D4
•
USB Hubs
Ct
•
PC peripherals
Grd
3.3 V
D3
Description
The USB specification requires upstream ports to
be terminated with pull-up resistors from the D+
and D- lines to Vbus. On the implementation of
USB systems, the radiated and conducted EMI
should be kept within the required levels as stated
by the FCC regulations. In addition to the
requirements of termination and EMC
Rt
D2
Ct
Features
compatibility, the computing devices are required
to be tested for ESD susceptibility.
•
Monolithic device with recommended line
termination for USB upstream ports
The USBUF provides the recommended line
termination while implementing a low pass filter to
limit EMI levels and providing ESD protection
which exceeds IEC 61000-4-2 level 4 standard.
The device is packaged in a SOT323-6L which is
the smallest available lead frame package (50%
smaller than the standard SOT23).
•
Integrated Rt series termination and Ct
bypassing capacitors.
•
Integrated ESD protection
•
Small package size
•
Benefits
– EMI
/ RFI noise suppression
Table 1. Device summary
– Required
line termination for USB
upstream ports
Order codes
Marking
– ESD
protection exceeding IEC 61000-4-2
level 4
USBUF01W6
USBUF02W6
UU1
UU2
– High
flexibility in the design of high density
boards
–
T
a
ilored
to meet USB 1.1 standard
August 2015
DocID7041 Rev 8
1/13
This is information on a product in full production.
Characteristics
USBUF
1
Characteristics
Table 2. Absolute ratings (T
amb
= 25° C)
Parameter
Symbol
Value
Unit
± 16
± 9
ESD discharge IEC 61000-4-2, air discharge
ESD discharge IEC 61000-4-2, contact discharge
ESD discharge – MIL STD 883E – Method 3015-7
V
PP
kV
± 25
T
j
T
stg
T
L
T
op
P
Maximum junction temperature
Storage temperature range
150
– 55 to + 150
260
°C
°C
Lead solder temperature (10 second duration)
Operating temperature range
Power rating per resistor
°C
-40 to 125
100
°C
mW
Table 3. Functional diagram
Rt
Rp
Ct
CODE 01
CODE 02
T
o
lerance
33 W
22 W
1.5 k
Ω
1.5 k
Ω
± 10%
47 pF
47 pF
± 20%
± 10%
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USBUF
Technical information
2
Technical information
Figure 2. USB standard requirements
3.3V
1.5k
Rt
Rt
Rt
D+
D-
D+
D-
Full-speed or
Low-speed USB
Transceiver
Full-speed USB
Transceiver
Ct
Ct
Ct
Ct
Twisted pair shielded
Rt
Zo = 90ohms
5m max
15k 15k
Hub 0 or
Host or
Full-speed function
Hub port
FULL SPEED CONNECTION
3.3V
1.5k
Rt
Rt
Rt
D+
D-
D+
D-
Full-speed or
Low-speed USB
Transceiver
Low-speed USB
Transceiver
Ct
Ct
Ct
Ct
Untwisted unshielded
3m max
Rt
15k 15k
Hub 0 or
Host or
Low-speed function
Hub port
LOW SPEED CONNECTION
DocID7041 Rev 8
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Technical information
USBUF
2.1
Application example
Figure 3. Implementation of ST solutions for USB ports
USBUF01W6
USBDF01W5
Upstream port
Downstream port
D+
Gnd
Ct
D2
D1
Rt
D+
CABLE
Ct
D+
D-
D+ in
Gnd
Rd
D+ out
D+
D-
Ct
Gnd
D-
Rt
Rt
3.3 V
Rd
Rt
Rp
Ct
D- in
D- out
D3
D4
D-
3.3V
FULL SPEED CONNECTION
USBUF01W6
Upstream port
Downstream port
USBDF01W5
D+
Gnd
D2
D1
Rt
D+
CABLE
D+
Ct
D+ in
Gnd
Rd
D+ out
D+
D-
Ct
Ct
Gnd
D-
Rt
Rt
3.3 V
Rd
Ct
Rp
D-
Rt
D- in
D- out
D3
D4
D-
3.3V
LOW SPEED CONNECTION
2.2
EMI filtering
Current FCC regulations requires that class B computing devices meet specified maximum
levels for both radiated and conducted EMI.
•
•
Radiated EMI covers the frequency range from 30 MHz to 1 GHz.
Conducted EMI covers the 450 kHz to 30 MHz range.
For the types of devices utilizing the USB, the most difficult test to pass is usually the
radiated EMI test. For this reason the USBUF device is aiming to minimize radiated EMI.
The differential signal (D+ and D-) of the USB does not contribute significantly to radiated or
conducted EMI because the magnetic field of both conductors cancels each other.
The inside of the PC environment is very noisy and designers must minimize noise coupling
from the different sources. D+ and D-must not be routed near high speed lines (clocks
spikes).
Induced common mode noise can be minimized by running pairs of USB signals parallel to
each other and running grounded guard trace on each side of the signal pair from the USB
controller to the USBUF device. If possible, locate the USBUF device physically near the
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USBUF
Technical information
USB connectors. Distance between the USB controller and the USB connector must be
minimized.
The 47 pF (C
t
) capacitors are used to bypass high frequency energy to ground and for edge
control, and are placed between the driver chip and the series termination resistors (Rt).
Both Ct and Rt should be placed as close to the driver chip as is practicable.
The USBUF ensures a filtering protection against Electromagnetic and Radio-frequency
Interferences thanks to its low-pass filter structure. This filter is characterized by the
following parameters:
•
•
•
cut-off frequency
Insertion loss
high frequency rejection.
Figure 4. USBUF typical attenuation
Figure 5. Measurement configuration
S21 (dB)
0
TEST BOARD
-10
-20
-30
50
Ω
50
Ω
Vg
1
10
100
1,000
Frequency (MHz)
2.3
ESD protection
In addition to the requirements of termination and EMC compatibility, computing devices are
required to be tested for ESD susceptibility. This test is described in the IEC 61000-4-2 and
is already in place in Europe. This test requires that a device tolerates ESD events and
remains operational without user intervention.
The USBUF is particularly optimized to perform ESD protection. ESD protection is based on
the use of device which clamps at:
V
cl
= V
BR
+ R
d
. I
PP
clamped by the first stage S1 and then its remaining overvoltage is applied to the second
stage through the resistor Rt. Such a configuration makes the output voltage very low at the
output.
DocID7041 Rev 8
5/13
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Technical information
USBUF
Figure 6. USBUF ESD clamping behavior
Rg
S1
S2
Rt
Rd
Rd
Vinput
Rload
V
PP
Voutput
V
BR
V
BR
Device
to be
ESD Surge
USBUF01W6
protected
Figure 7. Measurement board
ESD
SURGE
TEST BOARD
16kV
Air
Discharge
Vin
Vout
To
h
ave a good approximation of the remaining voltages at both Vin and Vout stages, we
give the typical dynamical resistance value Rd. By taking into account these following
hypothesis: R
t
> R
d
, R
g
> R
d
and R
load
> R
d
, it gives these formulas:
R
g
⋅
V
B
R
+
R
d
⋅
V
g
Vinput
=
–
——————————————–
–
–
R
g
R
t
⋅
V
BR
+
R
d
⋅
Vinput
V
ouput
=
–
—————————————————–
R
t
The results of the calculation done for V
g
= 8 k
V
, R
g
= 330
Ω
(IEC 61000-4-2 standard),
V
BR
= 7 V (typ.) and R
d
= 1
Ω
(typ.) give:
Vinput = 31.2 V
Voutput = 7.95 V
This confirms the very low remaining voltage across the device to be protected. It is also
important to note that in this approximation the parasitic inductance effect was not taken into
account. This could be few tenths of volts during few ns at the V
input
side. This parasitic
effect is not present at the V
output
side due the low current involved after the resistance R
t
.
The measurements done hereafter show very clearly (figure 8) the high efficiency of the
ESD protection:
•
•
no influence of the parasitic inductances on Voutput stage
Voutput clamping voltage very close to V
BR
(breakdown voltage) in the positive way
and – V
F
(forward voltage) in the negative way
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USBUF
Technical information
Figure 8. Remaining voltage at both stages S1 (Vinput) and S2 (Voutput) during ESD
surge
Vin
Vin
Vout
Vout
Positive surge
Negative surge
Please note that the USBUF is not only acting for positive ESD surges but also for negative
8.
(negative surge.
2.4
2.5
Latch-up phenomenon
The early aging and destruction of IC’s is often due to latch-up phenomenon which is mainly
induced by dV/dt. Thanks to its structure, the USBUF provides a high immunity to latch-up
phenomenon by smoothing very fast edges.
Crosstalk behavior
Figure 9. Crosstalk phenomenon
R
G1
Line 1
V
G1
R
L1
α
1
V
G1
+
β
1
V
G2
2
R
G2
Line 2
V
G2
R
L2
α
2
V
G2
+
β
2
V
G1
1
DRIVERS
RECEIVERS
The crosstalk phenomenon is due to the coupling between 2 lines. The coupling factor (
β
12
or
β
21
) increases when the gap across lines decreases, particularly in silicon dice. In the
example above the expected signal on load R
L2
is
α
2
V
G2
, in fact the real voltage at this
point has got an extra value
β
21
V
G1
. This part of the V
G1
signal represents the effect of the
crosstalk phenomenon of the line 1 on the line 2. This phenomenon has to be taken into
account when the drivers impose fast digital data or high frequency analog signals in the
disturbing line. The perturbed line will be more affected if it works with low voltage signal or
high load impedance (few k
Ω
).
DocID7041 Rev 8
7/13
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Technical information
USBUF
Figure 10. Analog crosstalk
Figure 11. Typical analog crosstalk
results
measurements
Analog crosstalk (dB)
0
TEST BOARD
UUx
-20
50
Ω
-40
50
Ω
Vg
-60
-80
-100
1
10
100
1,000
Frequency (MHz)
the curve shows the effect of the D+ cell on the D-cell. In usual frequency range of analog
signals (up to 100 MHz) the effect on disturbed line is less than -37 db.
Figure 12. Digital crosstalk measurements configuration
+5V
+5V
74HC04
74HC04
3.3 V
Rt
Ct
Rp
D+
D4
3.3 V
D3
D1
V
G1
Square
Pulse
Gnd
D2
+5V
D-
Rt
Ct
Generator
β
21
V
G1
Figure 12
shows the measurement circuit used to quantify the crosstalk effect in a classical
digital application.
Figure 13. Digital crosstalk results
V
G1
β
21
V
G1
Figure 13
shows, with a signal from 0 to 5 V and rise time of few ns, the impact on the
disturbed line is less than 250 mV peak to peak. No data disturbance was noted on the
other line.The measurements performed with falling edges gives an impact within the same
range.
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USBUF
Technical information
2.6
Transition times
This low pass filter has been designed in order to meet the USB 1.1 standard requirements
that implies the signal edges are maintained within the 4 -20 ns stipulated USB specification
limits.
T
o
v
erify this point, we have measured the rise time of VD+ voltage with and without
the USBUF device.
Figure 14. Typical rise and fall times:
measurement configuration
Figure 15. Typical rise times with and
without protection device
without
+5V
+5V
74HC04
74HC04
D+
USBDF
01W6
+5V
Square
Pulse
Generator
D-
with
15.
, we see the results of such measurements:
t
rise
= 3.8 ns driver alone
t
rise
= 7.8 ns with protection device
The adding of the protection device causes the rise time increase of roughly 4ns.
Note:
Rise time has been measured between 10% and 90% of the signal (resp. 90% and 10%)
DocID7041 Rev 8
9/13
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Packaging information
USBUF
3
Packaging information
Table 4. SOT323-6L Package mechanical data
DIMENSIONS
RE
F
.
Millimeters
Inches
A
E
Min.
Max.
Min.
0.031 0.043
0.004
Max.
A
A1
A2
b
0.8
0
1.1
0.1
1
e
e
0
b
D
0.8
0.15
0.1
1.8
1.15
0.031 0.039
0.006 0.012
0.004 0.007
0.071 0.086
0.045 0.053
0.025 Typ.
0.3
0.18
2.2
1.35
c
A1
D
A2
Q1
E
e
0.65 Typ.
c
L
HE
L
1.8
0.1
0.1
2.4
0.4
0.4
0.071 0.094
0.004 0.016
0.004 0.016
HE
Q1
Figure 16. Recommended footprint (dimensions in mm)
0.65
1.05
2.9
0.80
1.05
0.40
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USBUF
Packaging information
Table 5. Mechanical specifications
Description
Lead
Lead plating
Tin-lead
5 m min
25 m max
Lead plating thickness
Sn / Pb
(70% to 90%Sn)
Lead material
Lead coplanarity
Body material
Flammability
10 m max
Molded epoxy
UL94V-0
DocID7041 Rev 8
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Ordering information
USBUF
4
Ordering information
Table 6. Order code
Order code
Marking
Package
Weight
Base qty
Delivery mode
USBUF01W6
USBUF02W6
UU1
UU2
SOT323-6L
SOT323-6L
5.4 mg
5.4 mg
3000
3000
T
a
pe and reel
T
a
pe and reel
5
Revision history
Table 7. Document revision history
Revision Description
of Changes
Date
Mar-2002
Feb-2005
3A
4
Last update.
Layout update. No content change.
Operating temperature range updated to -40 to 70° C.
Layout updated to current standard.
28-Feb-2006
5
27-May-2009
14-Jan-2014
6
7
Reformatted to the current standard.
24-Aug-2015
8
Minor text changes.
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DocID7041 Rev 8
USBUF
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Y
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DocID7041 Rev 8
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