Texas-Instruments-CC1200RHBT
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SWRS123D
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CC1200 Low-Power, High-Performance RF Transceiver
1 Device
Overview
1.1 Features
1
• RF
Performance and Analog Features:
• Digital
Features:
– High-Performance,
Single-Chip Transceiver
– WaveMatch:
Advanced Digital Signal
Processing for Improved Sync Detect
Performance
– Security:
Hardware AES128 Accelerator
– Data
FIFOs: Separate 128-Byte RX and TX
– Includes
Functions for Antenna Diversity
Support
– Support
for Retransmission
– Support
for Auto-Acknowledge of Received
Packets
– Automatic
Clear Channel Assessment (CCA) for
Listen-Before-Talk (LBT) Systems
– Built-in
Coding Gain Support for Increased
Range and Robustness
– Digital
RSSI Measurement
•
Excellent Receiver Sensitivity:
–
–
–123 dBm at 1.2 kbps
–109 dBm at 50 kbps
•
•
Blocking Performance: 86 dB at 10 MHz
Adjacent Channel Selectivity: Up to 60 dB at
12.5-kHz Offset
•
Very Low Phase Noise: –114 dBc/Hz at
10-kHz Offset (169 MHz)
– Programmable
Output Power Up to +16 dBm
With 0.4-dB Step Size
– Automatic
Output Power Ramping
– Supported
Modulation Formats:
2-FSK, 2-GFSK, 4-FSK, 4-GFSK, MSK, OOK
– Supports
Data Rate Up to 1.25 Mbps in
Transmit and Receive
– Improved
OOK Shaping for Less Occupied
Bandwidth, Enabling Higher Output Power While
Meeting Regulatory Requirements
• Low
Current Consumption:
– Enhanced
Wake-On-Radio (eWOR)
Functionality for Automatic Low-Power Receive
Polling
• Dedicated
Packet Handling for 802.15.4g:
– CRC
16/32
– FEC,
Dual Sync Detection (FEC and non-FEC
Packets)
– Power
Down: 0.12
μ
A (0.5
μ
A With eWOR
Timer Active)
– Whitening
• General:
•
•
RX: 0.5 mA in RX Sniff Mode
RX: 19 mA Peak Current in Low-Power
Mode
RX: 23 mA Peak Current in High-
Performance Mode
– RoHS-Compliant
5-mm x 5-mm No-Lead QFN
32-Pin Package (RHB)
– Pin-Compatible
With the CC1120 Device
•
• Regulations
– Suitable for Systems Targeting
Compliance With
•
TX: 46 mA at +14 dBm
• Other:
–
Europe:
ETSI EN 300 220, EN 54-25
–
US:
FCC CFR47 Part 15, FCC CFR47 Part 90
–
Japan:
ARIB STD-T30, T67, T108
– Data
FIFOs: Separate 128-Byte RX and TX
– Support
for Seamless Integration With the
CC1190 Device for Increased Range Providing
up to 3-dB Improvement in RX Sensitivity and
up to +27 dBm TX Output Power
1.2 Applications
•
•
•
Low-Power, High-Performance, Wireless Systems
With Data Rate Up to 1250 kbps
•
•
•
•
•
•
•
Home and Building Automation
Wireless Alarm and Security Systems
Industrial Monitoring and Control
Wireless Healthcare Applications
Wireless Sensor Networks and Active RFID
IEEE 802.15.4g Applications
ISM/SRD Bands: 169, 433, 868, 915, and
920 MHz
Possible Support for Additional Frequency Bands:
137 to 158.3 MHz, 205 to 237.5 MHz, and 274 to
316.6 MHz
Wireless M-Bus, All Modes
•
Smart Metering (AMR/AMI)
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
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1.3 Description
The CC1200 device is a fully integrated single-chip radio transceiver designed for high performance at
very low-power and low-voltage operation in cost-effective wireless systems. All filters are integrated, thus
removing the need for costly external SAW and IF filters. The device is mainly intended for the ISM
(Industrial, Scientific, and Medical) and SRD (Short Range Device) frequency bands at 164–190 MHz,
410–475 MHz, and 820–950 MHz.
The CC1200 device provides extensive hardware support for packet handling, data buffering, burst
transmissions, clear channel assessment, link quality indication, and Wake-On-Radio. The main operating
parameters of the CC1200 device can be controlled through an SPI interface. In a typical system, the
CC1200 device will be used with a microcontroller and only a few external passive components.
The CC1200 and the CC1120 devices are both part of the high-performance transceiver family. The
CC1120 device is more optimized toward narrowband applications, while the CC1200 device is optimized
toward wideband applications but can also effectively cover narrowband down to 12.5-kHz channels.
Device Information
(1)
PART NUMBER
CC1200RHB
PACKAGE
BODY SIZE
VQFN (32)
5.00 mm x 5.00 mm
1.4 Functional
Block Diagram
Figure 1-1
shows the system block diagram of the CC120x family of devices.
CC120x
4 kbyte
ROM
MARC
SPI
Serial configuration
CSn (chip select)
SI (serial input)
Ultra low power 40 kHz
auto-calibrated RC oscillator
Main Radio Control unit
Ultra low power 16 bit
MCU
(optional 40 kHz
clock input)
Power on reset
and data interface
AES-128
accelerator
Interrupt and
IO handler
System bus
SO (serial output)
SCLK (serial clock)
(optional GPIO3/2/0)
256 byte
FIFO RAM
buffer
eWOR
Enhanced ultra low power
Wake On Radio timer
Packet handler
and FIFO control
Battery sensor /
temp sensor
Configuration and
status registers
RF and DSP frontend
Output power ramping and OOK / ASK modulation
(optional auto detected
external XOSC / TCXO)
I
+16 dBm high
efficiency PA
XOSC_Q1
XOSC_Q2
PA out
Fully integrated fractional-N
frequency synthesizer
Data interface with
signal chain access
XOSC
Q
90 dB dynamic
range ADC
IF amp
IF amp
LNA_P
LNA_N
(optional bit clock)
Highly flexible FSK / OOK
demodulator
High linearity
LNA
(optional low jitter serial
data output for legacy
protocols)
90 dB dynamic
range ADC
AGC
Automatic Gain Control, 60dB VGA range
RSSI measurements and carrier sense detection
(optional GPIO for
antenna diversity)
Figure 1-1. Functional Block Diagram
2
Device Overview
Copyright © 2013–2014, Texas Instruments Incorporated
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Table of Contents
1
2
3
5
4
4.3
Recommended Operating Conditions (General
Thermal Resistance Characteristics for RHB
4.4
6
7
8
Mechanical Packaging and Orderable
Copyright © 2013–2014, Texas Instruments Incorporated
Table of Contents
3
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2 Revision
History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
This data manual revision history highlights the changes made to the SWRS123C device-specific data
manual to make it an SWRS123D revision.
Changes from Revision C (June 2014) to Revision D
Page
•
•
4
Revision History
Copyright © 2013–2014, Texas Instruments Incorporated
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3 Terminal
Configuration and Functions
3.1 Pin
Diagram
Figure 3-1
shows pin names and locations for the CC1200 device.
VDD_GUARD
RESET_N
GPIO3
GPIO2
DVDD
1
2
3
4
5
6
7
8
24
23
LPF1
LPF0
22
AVDD_SYNTH1
21
DCPL_VCO
20
19
18
17
LNA_N
LNA_P
TRX_SW
PA
CC1200
DCPL
SI
GND
GROUND PAD
SCLK
Figure 3-1. Package 5-mm × 5-mm QFN
Copyright © 2013–2014, Texas Instruments Incorporated
Terminal Configuration and Functions
5
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3.2 Pin
Configuration
The following table lists the pin-out configuration for the CC1200 device.
PIN NO.
PIN NAME
VDD_GUARD
RESET_N
GPIO3
GPIO2
DVDD
TYPE / DIRECTION
DESCRIPTION
1
Power
2.0–3.6 V VDD
2
Digital input
Digital I/O
Digital I/O
Power
Asynchronous, active-low digital reset
General-purpose I/O
3
4
General-purpose I/O
5
2.0–3.6 VDD to internal digital regulator
Digital regulator output to external decoupling capacitor
Serial data in
6
DCPL
Power
7
SI
Digital input
Digital input
Digital I/O
Digital I/O
Digital input
Power
8
SCLK
Serial data clock
9
SO(GPIO1)
GPIO0
CSn
Serial data out (general-purpose I/O)
General-purpose I/O
10
11
12
13
14
15
16
17
Active-low chip select
DVDD
2.0–3.6 V VDD
AVDD_IF
RBIAS
AVDD_RF
N.C.
Power
2.0–3.6 V VDD
Analog
External high-precision resistor
2.0–3.6 V VDD
Power
Not connected
PA
Analog
Analog
Single-ended TX output (requires DC path to VDD)
TX and RX switch. Connected internally to GND in TX and floating (high-
impedance) in RX.
18
TRX_SW
19
20
21
22
23
24
25
26
27
28
29
LNA_P
Analog
Analog
Power
Power
Analog
Analog
Power
Power
Power
Power
Power
Differential RX input (requires DC path to ground)
Differential RX input (requires DC path to ground)
Pin for external decoupling of VCO supply regulator
2.0–3.6 V VDD
LNA_N
DCPL_VCO
AVDD_SYNTH1
LPF0
External loop filter components
LPF1
External loop filter components
AVDD_PFD_CHP
DCPL_PFD_CHP
AVDD_SYNTH2
AVDD_XOSC
DCPL_XOSC
2.0–3.6 V VDD
Pin for external decoupling of PFD and CHP regulator
2.0–3.6 V VDD
2.0–3.6 V VDD
Pin for external decoupling of XOSC supply regulator
Crystal oscillator pin 1 (must be grounded if a TCXO or other external clock
connected to EXT_XOSC is used)
30
31
XOSC_Q1
XOSC_Q2
Analog
Analog
Crystal oscillator pin 2 (must be left floating if a TCXO or other external clock
connected to EXT_XOSC is used)
Pin for external clock input (must be grounded if a regular crystal connected
to XOSC_Q1 and XOSC_Q2 is used)
32
–
EXT_XOSC
GND
Digital input
Ground pad
The ground pad must be connected to a solid ground plane.
6
Terminal Configuration and Functions
Copyright © 2013–2014, Texas Instruments Incorporated
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4 Specifications
All measurements performed on CC1200EM_868_930 rev.1.0.0, CC1200EM_420_470 rev.1.0.1, or
CC1200EM_169 rev.1.2.
4.1 Absolute
Maximum Ratings
(1
)
(
2)
over operating free-air temperature range (unless otherwise noted)
PARAMETER
MIN
MAX
3.9
UNIT
V
CONDITION
Supply voltage (VDD, AVDD_x)
Input RF level
–0.3
All supply pins must have the same voltage
+10
dBm
V
Voltage on any digital pin
–0.3
–0.3
VDD+0.3
max 3.9 V
Voltage on analog pins
(including DCPL pins)
2.0
V
(1) Stresses
beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under general characteristics is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All
voltage values are with respect to V
SS
, unless otherwise noted.
4.2 Handling
Ratings
MIN
–40
–2
MAX
125
2
UNIT
°C
T
stg
Storage temperature range
Electrostatic
Human body model (HBM), per ANSI/ESDA/JEDEC JS001
(1)
kV
V
ESD
discharge (ESD)
performance:
Charged device model (CDM), per JESD22-C101
(2)
All pins
–500
500
V
(1) JEDEC
document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC
document JEP157 states that 250-V HBM allows safe manufacturing with a standard ESD control process.
4.3 Recommended
Operating Conditions (General Characteristics)
PARAMETER
MIN
2.0
0
TYP
MAX
3.6
UNIT
V
CONDITION
Voltage supply range
Voltage on digital inputs
Temperature range
All supply pins must have the same voltage
Ambient
VDD
85
V
–40
°C
4.4 Thermal
Resistance Characteristics for RHB Package
°C/W
(1)
21.1
5.3
AIR FLOW (m/s)
(2)
R
θ
JC
R
θ
JB
R
θ
JA
Psi
JT
Psi
JB
R
θ
JC
Junction-to-case (top)
Junction-to-board
0.00
0.00
0.00
0.00
0.00
0.00
Junction-to-free air
31.3
0.2
Junction-to-package top
Junction-to-board
5.3
Junction-to-case (bottom)
0.8
(1) These
values are based on a JEDEC-defined 2S2P system (with the exception of the Theta JC [R
Θ
JC
] value, which is based on a
JEDEC-defined 1S0P system) and will change based on environment as well as application. For more information, see these
EIA/JEDEC standards:
•
•
•
•
JESD51-2,
Integrated Circuits Thermal Test Method Environmental Conditions – Natural Convection (Still Air)
JESD51-3,
Low Effective Thermal Conductivity Test Board for Leaded Surface Mount Packages
JESD51-7,
High Effective Thermal Conductivity Test Board for Leaded Surface Mount Packages
JESD51-9,
Test Boards for Area Array Surface Mount Package Thermal Measurements
Power dissipation of 40 mW and an ambient temperature of 25ºC is assumed.
(2) m/s
= meters per second
Copyright © 2013–2014, Texas Instruments Incorporated
Specifications
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4.5 RF
Characteristics
PARAMETER
MIN
820
TYP
MAX
950
UNIT
MHz
MHz
MHz
MHz
MHz
MHz
Hz
CONDITION
410
475
164
190
Frequency bands
(274)
(205)
(137)
(316.6)
(237.5)
(158.3)
Contact TI for more information about the use of
these frequency bands.
30
15
6
In 820–950 MHz band
In 410–475 MHz band
In 164–190 MHz band
Packet mode
Frequency resolution
Data rate
Hz
Hz
0
0
1250
625
kbps
kbps
Transparent mode
4.6 Regulatory
Standards
PERFORMANCE MODE
FREQUENCY BAND
SUITABLE FOR COMPLIANCE WITH
COMMENTS
ARIB STD-T108
ETSI EN 300 220 receiver,
categories 2 and 3
FCC Part 15.247
Performance also suitable
for systems targeting
maximum allowed output
power in the respective
bands, using a range
extender such as the
CC1190 device
820–950 MHz
FCC Part 15.249
FCC Part 90 Mask G
FCC Part 90 Mask J
ARIB STD-T67
ARIB RCR STD-T30
ETSI EN 300 220 receiver,
categories 2 and 3
Performance also suitable
for systems targeting
maximum allowed output
power in the respective
bands, using a range
extender
High-performance mode
410–475 MHz
FCC Part 90 Mask D
FCC Part 90 Mask G
ETSI EN 300 220 receiver, category 1
Performance also suitable
FCC Part 90 Mask D
for systems targeting
maximum allowed output
power in the respective
bands, using a range
extender
164–190 MHz
820–950 MHz
ETSI EN 300 220 receiver,
categories 2 and 3
FCC Part 15.247
FCC Part 15.249
Low-power mode
ETSI EN 300 220 receiver,
categories 2 and 3
410–475 MHz
164–190 MHz
ETSI EN 300 220
8
Specifications
Copyright © 2013–2014, Texas Instruments Incorporated
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4.7 Current
Consumption, Static Modes
T
A
= 25°C, VDD = 3.0 V if nothing else stated
PARAMETER
MIN
TYP
0.12
0.5
MAX
UNIT
µA
CONDITION
1
Power down with retention
µA
Low-power RC oscillator running
XOFF mode
IDLE mode
180
1.5
µA
Crystal oscillator / TCXO disabled
mA
Clock running, system waiting with no radio activity
4.8 Current
Consumption, Transmit Modes
4.8.1 868-,
915-, and 920-MHz Bands (High-Performance Mode)
T
A
= 25°C, VDD = 3.0 V if nothing else stated
PARAMETER
MIN
TYP
46
MAX
UNIT
mA
CONDITION
TX current consumption +14 dBm
TX current consumption +10 dBm
36
mA
4.8.2 433-MHz
Band (High-Performance Mode)
T
A
= 25°C, VDD = 3.0 V if nothing else stated
PARAMETER
MIN
TYP
49
MAX
UNIT
mA
CONDITION
TX current consumption +15 dBm
TX current consumption +14 dBm
TX current consumption +10 dBm
46
mA
35
mA
4.8.3 169-MHz
Band (High-Performance Mode)
T
A
= 25°C, VDD = 3.0 V if nothing else stated
PARAMETER
MIN
TYP
54
MAX
UNIT
mA
CONDITION
TX current consumption +15 dBm
TX current consumption +14 dBm
TX current consumption +10 dBm
50
mA
39
mA
4.8.4 Low-Power
Mode
T
A
= 25°C, VDD = 3.0 V, f
c
= 869.5 MHz if nothing else stated
PARAMETER
MIN
TYP
MAX
UNIT
CONDITION
TX current consumption +10 dBm
33.6
mA
Copyright © 2013–2014, Texas Instruments Incorporated
Specifications
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4.9 Current
Consumption, Receive Modes
4.9.1 High-Performance
Mode
T
A
= 25°C, VDD = 3.0 V, f
c
= 869.5 MHz if nothing else stated
PARAMETER
MIN
TYP
MAX
UNIT
CONDITION
RX Wait for sync
Using RX sniff mode, where the receiver wakes
up at regular intervals looking for an incoming
packet.
Sniff mode configured to terminate on Carrier
Sense, and is measured using RSSI_VALID
_COUNT = 1 (0 for 1.2 kbps with 50 kHz Channel
Filter Bandwidth), AGC_WIN_SIZE = 0, and
SETTLE_WAIT = 1.
(1)
1.2 kbps, 4-byte preamble (50 kHz
Channel Filter Bandwidth)
0.5
3.1
mA
mA
1.2 kbps, 3-byte preamble (11 kHz
Channel Filter Bandwidth)
38.4 kbps, 12-byte preamble
50 kbps, 24-byte preamble
RX Peak Current
3.4
2.1
mA
mA
Peak current consumption during packet reception
1.2kbps
23.5
8
mA
µA
Average current consumption
Check for data packet every 1 second
using Wake on Radio
50 kbps, 5-byte preamble, 40-kHz RC oscillator
used as sleep timer
4.9.2 Low-Power
Mode
T
A
= 25°C, VDD = 3.0 V, f
c
= 869.5 MHz if nothing else stated
PARAMETER
MIN
TYP
MAX
UNIT
CONDITION
RX Peak Current Low-power RX mode
1.2 kbps
Peak current consumption during packet reception
at the sensitivity limit
19
mA
4.10 Receive
Parameters
All RX measurements made at the antenna connector, to a bit error rate (BER) limit of 1%. Selectivity and
blocking is measured with the desired signal 3 dB greater than the sensitivity level.
4.10.1 General
Receive Parameters (High-Performance Mode)
T
A
= 25°C, VDD = 3.0 V, f
c
= 869.5 MHz if nothing else stated
PARAMETER
MIN
TYP
MAX
UNIT
CONDITION
Saturation
+10
dBm
Digital channel filter programmable
bandwidth
9.5
1600
kHz
IIP3
–14
±14
dBm
%
At maximum gain
With carrier sense detection enabled
With carrier sense detection disabled
Data rate offset tolerance
±1600
ppm
Spurious emissions
Radiated emissions measured according to ETSI
EN 300 220, f
c
= 869.5 MHz
1–13 GHz (VCO leakage at 3.5 GHz)
30 MHz to 1 GHz
< –56
< –57
dBm
dBm
Optimum source impedance
868-, 915-, and 920-MHz bands
433-MHz band
60 + j60 / 30 + j30
100 + j60 / 50+ j30
140 + j40 / 70 + j20
Ω
Ω
Ω
(Differential or single-ended RX configurations)
169-MHz band
10
Specifications
Copyright © 2013–2014, Texas Instruments Incorporated
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4.10.2 RX
Performance in 868-, 915-, and 920-MHz Bands (High-Performance Mode)
T
A
= 25°C, VDD = 3.0 V if nothing else stated
PARAMETER
MIN
TYP
–122
–113
MAX
UNIT
dBm
dBm
CONDITION
1.2 kbps 2-FSK, DEV=4 kHz CHF=11 kHz
(1)
4.8 kbps OOK
32.768 kbps 2-GFSK, DEV=50 kHz CHF=208
kHz
(1)
–108
dBm
–110
–109
-107
–97
dBm
dBm
dBm
dBm
38.4 kbps 2-GFSK, DEV=20 kHz CHF=104 kH
z
(1)
50 kbps 2-GFSK, DEV=25 kHz, CHF=104 kHz
(1)
100-kbps 2-GFSK, DEV=50 kHz, CHF=208 kHz
(1)
500 kbps 2-GMSK, CHF=833 kHz
(1)
Sensitivity
1 Mbps 4-GFSK, DEV=400 kHz, CHF=1.66
MHz
(1)
–97
dBm
54
55
77
82
38
46
66
70
44
44
64
72
41
46
65
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
± 12.5 kHz (adjacent channel)
± 25 kHz (alternate channel)
± 2 MHz
Blocking and Selectivity
1.2-kbps 2-FSK, 12.5-kHz channel
separation, 4-kHz deviation, 11-kHz
channel filter
± 10 MHz
± 200 kHz
Blocking and Selectivity
± 400 kHz
32.768-kbps 2-GFSK, 200-kHz channel
separation, 50-kHz deviation, 208-kHz
channel filter
± 2 MHz
± 10 MHz
+ 100 kHz (adjacent channel)
± 200 kHz (alternate channel)
± 2 MHz
Blocking and Selectivity
38.4-kbps 2-GFSK, 100-kHz channel
separation, 20-kHz deviation, 104-kHz
channel filter
± 10 MHz
Blocking and Selectivity
± 200 kHz (adjacent channel)
± 400 kHz (alternate channel)
± 2 MHz
50-kbps 2-GFSK, 200-kHz channel
separation, 25-kHz deviation, 104-kHz
channel filter
(Same modulation format as 802.15.4g
Mandatory Mode)
± 10 MHz
71
dB
45
54
63
68
42
42
57
46
52
59
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
± 400 kHz (adjacent channel)
± 800 kHz (alternate channel)
± 2 MHz
Blocking and Selectivity
100-kbps 2-GFSK, 50-kHz deviation,
208-kHz channel filter
± 10 MHz
+ 1 MHz (adjacent channel)
± 2 MHz (alternate channel)
± 10 MHz
Blocking and Selectivity
500-kbps GMSK, 833-kHz channel filter
± 2 MHz (adjacent channel)
± 4 MHz (alternate channel)
± 10 MHz
Blocking and Selectivity
1-Mbps 4-GFSK, 400-kHz deviation,
1.6-MHz channel filter
Image rejection
(Image compensation enabled)
1.2 kbps, DEV=4 kHz, CHF=10 kHz, image at
–125 kHz
56
dB
(1) DEV
is short for deviation, CHF is short for Channel Filter Bandwidth
Copyright © 2013–2014, Texas Instruments Incorporated
Specifications
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4.10.3 RX
Performance in 433-MHz Band (High-Performance Mode)
T
A
= 25°C, VDD = 3.0 V if nothing else stated
PARAMETER
MIN
TYP
MAX
UNIT
CONDITION
1.2 kbps 2-FSK, DEV=4 kHz
CHF=11 kHz
(1)
–123
dBm
Sensitivity
–111
60
dBm
dB
dB
dB
dB
dB
dB
dB
dB
38.4 kbps 2-GFSK, DEV=20 kHz CHF=104 kH
z
(1)
± 12.5 kHz (adjacent channel)
± 25 kHz (alternate channel)
± 2 MHz
Blocking and Selectivity
61
1.2-kbps 2-FSK, 12.5-kHz channel
separation, 4-kHz deviation, 11-kHz
channel filter
82
85
± 10 MHz
49
+ 100 kHz (adjacent channel)
± 200 kHz (alternate channel)
± 2 MHz
Blocking and Selectivity
48
38.4-kbps 2-GFSK, 100-kHz channel
separation, 20-kHz deviation, 104-kHz
channel filter
66
74
± 10 MHz
(1) DEV
is short for deviation, CHF is short for Channel Filter Bandwidth
4.10.4 RX
Performance in 169-MHz Band (High-Performance Mode)
T
A
= 25°C, VDD = 3.0 V if nothing else stated
PARAMETER
MIN
TYP
–122
59
MAX
UNIT
dBm
dB
CONDITION
Sensitivity
1.2 kbps 2-FSK, DEV=4 kHz CHF=11 kHz
(1)
± 12.5 kHz (adjacent channel)
± 25 kHz (alternate channel)
± 2 MHz
Blocking and Selectivity
64
dB
1.2 kbps 2-FSK, 12.5-kHz channel
separation, 4-kHz deviation, 11-kHz
channel filter
84
dB
86
dB
± 10 MHz
Spurious response rejection
1.2 kbps 2-FSK, 12.5-kHz channel
separation, 4-kHz deviation, 11-kHz
channel filter
68
dB
dB
Spurious at ± 40 MHz from carrier
Image rejection
(Image compensation enabled)
1.2 kbps, DEV=4 kHz, CHF=10 kHz, image at
–125 kHz
68
(1) DEV
is short for deviation, CHF is short for Channel Filter Bandwidth
4.10.5 RX
Performance in Low-Power Mode
T
A
= 25°C, VDD = 3.0 V, f
c
= 869.5 MHz if nothing else stated
PARAMETER
MIN
TYP
MAX
UNIT
CONDITION
1.2 kbps 2-FSK, DEV=4 kHz
CHF=11 kHz
(1)
–110
dBm
Sensitivity
–96
41
dBm
dB
50 kbps 2-GFSK, DEV=25 kHz, CHF=119 kHz
(1)
+ 200 kHz (adjacent channel)
+ 400 kHz (alternate channel)
± 2 MHz
Blocking and Selectivity
50 kbps 2-GFSK, 200-kHz channel
separation, 25-kHz deviation, 104-kHz
channel filter
45
dB
62
dB
(Same modulation format as 802.15.4g
Mandatory Mode)
± 10 MHz
60
dB
Saturation
+10
dBm
(1) DEV
is short for deviation, CHF is short for Channel Filter Bandwidth
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4.11 Transmit
Parameters
T
A
= 25°C, VDD = 3.0 V, f
c
= 869.5 MHz if nothing else stated
PARAMETER
MIN
TYP
+14
+15
+15
+16
+15
+16
+15
+16
–12
–38
0.4
MAX
UNIT
dBm
dBm
dBm
dBm
dBm
dBm
dBm
dBm
dBm
dBm
dB
CONDITION
At 915- and 920-MHz
At 915- and 920-MHz with VDD = 3.6 V
At 868 MHz
At 868 MHz with VDD = 3.6 V
At 433 MHz
Max output power
At 433 MHz with VDD = 3.6 V
At 169 MHz
At 169 MHz with VDD = 3.6 V
Within fine step size range
Within coarse step size range
Within fine step size range
Min output power
Output power step size
Adjacent channel power
4-GFSK 9.6 kbps in 12.5-kHz channel, measured
in 8.75-kHz bandwidth (ETSI 300 220 compliant)
–60
dBc
Spurious emissions
Transmission at +14 dBm
(Excluding harmonics)
Suitable for systems targeting compliance with
ETSI EN 300 220, ETSI EN 54-25, FCC Part 15,
FCC Part 90, ARIB STD-T108, ARIB STD-T67,
ARIB RCR STD-30
30 MHz–1 GHz
1–12.75 GHz
< –57
< –50
dBm
dBm
Measured in 1-MHz bandwidth
Harmonics
Second Harm, 169 MHz (ETSI)
Third Harm, 169 MHz (ETSI)
Fourth Harm, 169 MHz (ETSI)
–43
–57
–63
dBm
dBm
dBm
Second Harm, 433 MHz (ETSI)
Third Harm, 433 MHz (ETSI)
Fourth Harm, 433 MHz (ETSI)
–59
–51
–63
dBm
dBm
dBm
Transmission at +14 dBm (or maximum allowed
in applicable band where this is less than +14
dBm) using TI reference design
Second Harm, 868 MHz (ETSI)
Third Harm, 868 MHz (ETSI)
Fourth Harm, 868 MHz (ETSI)
–50
–44
–56
dBm
dBm
dBm
Suitable for systems targeting compliance with
ETSI EN 300-220, ETSI EN 54-25, FCC Part 15,
FCC Part 90, ARIB STD-T108, ARIB STD-T67,
ARIB RCR STD-30
Second Harm, 915 MHz (FCC)
Third Harm, 915 MHz (FCC)
Fourth Harm, 915 MHz (FCC)
–58
–46
–62
dBm
dBm
dBm
Second Harm, 920 MHz (ARIB)
Third Harm, 920 MHz (ARIB)
Optimum load impedance
868-, 915-, and 920-MHz bands
433-MHz band
–65
–60
dBm
dBm
35 + j35
55 + j25
80 + j0
Ω
Ω
Ω
169-MHz band
Copyright © 2013–2014, Texas Instruments Incorporated
Specifications
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4.12 PLL
Parameters
4.12.1 High-Performance
Mode
T
A
= 25°C, VDD = 3.0 V if nothing else stated
PARAMETER
MIN
TYP
–94
MAX
UNIT
CONDITION
dBc/Hz ±
10 kHz offset
dBc/Hz ±
100 kHz offset
dBc/Hz ±
1 MHz offset
dBc/Hz ±
10 MHz offset
dBc/Hz ±
10 kHz offset
dBc/Hz ±
100 kHz offset
dBc/Hz ±
1 MHz offset
dBc/Hz ±
10 MHz offset
dBc/Hz ±
10 kHz offset
dBc/Hz ±
100 kHz offset
dBc/Hz ±
1 MHz offset
dBc/Hz ±
10 MHz offset
dBc/Hz ±
10 kHz offset
dBc/Hz ±
100 kHz offset
dBc/Hz ±
1 MHz offset
dBc/Hz ±
10 MHz offset
dBc/Hz ±
10 kHz offset
dBc/Hz ±
100 kHz offset
dBc/Hz ±
1 MHz offset
dBc/Hz ±
10 MHz offset
dBc/Hz ±
10 kHz offset
dBc/Hz ±
100 kHz offset
dBc/Hz ±
1 MHz offset
dBc/Hz ±
10 MHz offset
Phase noise in 868-, 915-, and 920-MHz
bands
200-kHz loop bandwidth setting
–96
–123
–137
–100
–102
–121
–136
–103
–104
–119
–133
–104
–106
–116
–130
–106
–107
–127
–141
–114
–114
–132
–142
Phase noise in 868-, 915-, and 920-MHz
bands
300-kHz loop bandwidth setting
Phase noise in 868-, 915-, and 920-MHz
bands
400-kHz loop bandwidth setting
Phase noise in 868-, 915-, and 920-MHz
bands
500-kHz loop bandwidth setting
Phase noise in 433-MHz band
300-kHz loop bandwidth setting
Phase noise in 169-MHz band
300-kHz loop bandwidth setting
4.12.2 Low-Power
Mode
T
A
= 25°C, VDD = 3.0 V if nothing else stated
PARAMETER
MIN
TYP
–99
MAX
UNIT
CONDITION
dBc/Hz ±
10 kHz offset
dBc/Hz ±
100 kHz offset
dBc/Hz ±
1 MHz offset
dBc/Hz ±
10 MHz offset
Phase noise in 868-, 915-, and 920-MHz
bands
200-kHz loop bandwidth setting
–101
–121
–135
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4.13 Wake-up
and Timing
T
A
= 25°C, VDD = 3.0 V, f
c
= 869.5 MHz if nothing else stated
The turnaround behavior to and from RX and/or TX is highly configurable, and the time it takes will depend on
PARAMETER
MIN
TYP
0.24
133
369
43
MAX
UNIT
ms
µs
CONDITION
Powerdown to IDLE
Depends on crystal
Calibration disabled
Calibration enabled
IDLE to RX/TX
µs
RX/TX turnaround
RX-to-RX turnaround
µs
369
0
µs
With PLL calibration
µs
Without PLL calibration
369
0
µs
With PLL calibration
TX-to-TX turnaround
µs
Without PLL calibration
237
0
µs
Calibrate when leaving RX/TX enabled
Calibrate when leaving RX/TX disabled
When using SCAL strobe
RX/TX to IDLE time
µs
Frequency synthesizer calibration
314
µs
Required for RF front-end gain settling only.
Digital demodulation does not require preamble
for settling.
Minimum required number of preamble
bytes
0.5
bytes
Time from start RX until valid RSSI
(1)
Including gain settling (function of channel
bandwidth. Programmable for trade-off
between speed and accuracy)
4.2
ms
ms
12.5-kHz channels
0.25
120-kHz channels
(1) See
the design note on RSSI and response time. It is written for the CC112X devices, but the same principles apply for the CC1200
device.
4.14 40-MHz
Crystal Oscillator
T
A
= 25°C, VDD = 3.0 V if nothing else stated
PARAMETER
MIN
TYP
MAX
UNIT
CONDITION
It is expected that there will be degraded
sensitivity at multiples of XOSC/2 in RX, and an
increase in spurious emissions when the RF
channel is close to multiples of XOSC in TX. We
recommend that the RF channel is kept RX_BW/2
away from XOSC/2 in RX, and that the level of
spurious emissions be evaluated if the RF channel
is closer than 1 MHz to multiples of XOSC in TX.
Crystal frequency
38.4
40
MHz
Load capacitance (C
L
)
ESR
10
pF
Ω
60
Simulated over operating conditions
Depends on crystal
Start-up time
0.24
ms
4.15 40-MHz
Clock Input (TCXO)
T
A
= 25°C, VDD = 3.0 V if nothing else stated
PARAMETER
MIN
TYP
MAX
UNIT
CONDITION
Clock frequency
38.4
40
MHz
TCXO with CMOS output
High input voltage
Low input voltage
Rise / Fall time
TCXO with CMOS output directly
coupled to pin EXT_OSC
1.4
0
VDD
0.6
2
V
V
ns
Clipped sine output
TCXO clipped sine output connected
to pin EXT_OSC through series
capacitor
0.8
1.5
V
Clock input amplitude (peak-to-peak)
Copyright © 2013–2014, Texas Instruments Incorporated
Specifications
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4.16 32-kHz
Clock Input
T
A
= 25°C, VDD = 3.0 V if nothing else stated
PARAMETER
MIN
TYP
MAX
UNIT
kHz
V
CONDITION
Clock frequency
32
32-kHz clock input pin input high voltage
32-kHz clock input pin input low voltage
0.8 x VDD
0.2 x VDD
V
4.17 40-kHz
RC Oscillator
T
A
= 25°C, VDD = 3.0 V if nothing else stated
PARAMETER
MIN
TYP
MAX
UNIT
CONDITION
After calibration (frequency calibrated against the
40-MHz crystal or TCXO)
Frequency
40
kHz
Relative to frequency reference (that is, 40-MHz
crystal or TCXO)
Frequency accuracy after calibration
Initial calibration time
±0.1
1.32
%
ms
4.18 I/O
and Reset
T
A
= 25°C, VDD = 3.0 V if nothing else stated
PARAMETER
MIN
TYP
MAX
UNIT
CONDITION
Logic input high voltage
Logic input low voltage
Logic output high voltage
Logic output low voltage
Power-on reset threshold
0.8 x VDD
V
V
V
V
V
0.2 x VDD
0.2 x VDD
0.8 x VDD
At 4-mA output load or less
Voltage on DVDD pin
1.3
4.19 Temperature
Sensor
T
A
= 25°C, VDD = 3.0 V if nothing else stated
PARAMETER
MIN
TYP
MAX
UNIT
CONDITION
Temperature sensor range
–40
85
°C
Change in sensor output voltage versus change in
temperature
Temperature coefficient
Typical output voltage
VDD coefficient
2.66
794
mV / °C
mV
Typical sensor output voltage at TA = 25°C, VDD
= 3.0 V
Change in sensor output voltage versus change in
VDD
1.17
mV / V
The CC1200 device can be configured to provide a voltage proportional to temperature on GPIO1. The
temperature can be estimated by measuring this voltage (see
Section 4.19
,
Temperature Sensor
). For more
16
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4.20 Typical
Characteristics
T
A
= 25°C, VDD = 3.0 V, f
c
= 869.5 MHz if nothing else stated
-120
-121
-122
-123
-124
-125
-120
-121
-122
-123
-124
-40
0
40
T
e
mperature (ºC)
80
2
2.5
3
3.5
Supply Voltage (V)
1.2 kbps, 4-kHz Deviation, 11-kHz Channel Filter Bandwidth
1.2 kbps, 4-kHz Deviation, 11-kHz Channel Filter Bandwidth
Figure 4-1. Sensitivity vs Temperature (434 MHz)
Figure 4-2. Sensitivity vs Temperature (434 MHz)
80
70
60
50
40
30
20
10
0
80
60
40
20
0
-20
-10
-20
-40
–
1
1
0
-90
-70
-50
-30
-10
-2
-1
0
1
2
Input Level (dBm)
Offset Frequency (MHz)
50 kbps GFSK, 25-kHz Deviation, 104-kHz Channel Filter Bandwidth
50 kbps, 25-kHz Deviation, 104-kHz Channel Filter Bandwidth; Image
Frequency at –0.28-MHz Offset (Compensation Enabled)
Figure 4-4. Selectivity vs Offset Frequency (100-kHz Channels)
Figure 4-3. RSSI vs Input Level
70
60
50
40
24.5
24
30
IQ compensation disabled
23.5
23
IQ compensation enabled
20
10
0
-10
-20
22.5
-0.5
-0.3
-0.1
0.1
0.3
0.5
-130
–
1
1
0
-90
-70
-50
-30
-10
Offset Frequency (MHz)
Input Level (dBm)
1.2 kbps, 4-kHz Deviation, 11-kHz Channel Filter Bandwidth; Image
Frequency at –0.21-MHz Offset
Figure 4-5. Selectivity vs Offset Frequency (12.5-kHz Channels)
1.2 kbps FSK, 4-kHz Deviation, 11-kHz Channel Filter Bandwidth
Figure 4-6. RX Current vs Input Level
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Specifications
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Typical Characteristics
(continued)
16
15
14
13
12
16
15
14
13
12
11
10
-40
0
40
T
e
mperature (ºC)
80
2
2.5
3
3.5
Supply Voltage (V)
Maximum Power Setting (0x7F)
Figure 4-8. Output Power vs Temperature
Maximum Output Power Setting (0x7F)
Figure 4-7. Output Power vs Supply Voltage
20
10
60
50
40
30
20
10
0
0
-10
-20
-30
-40
-50
PA power setting
PA power setting
Figure 4-9. Output Power at 868 MHz
PA Power Setting
Figure 4-10. TX Current at 868 MHz
vs PA Power Setting
1 Mbps 4-GFSK, 400-kHz Deviation, 500-kHz Loop Bandwidth
1 Mbps 4-GFSK, 400-kHz Deviation, 300-kHz Loop Bandwidth
Figure 4-11. Eye Diagram
Figure 4-12. Eye Diagram
18
Specifications
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Typical Characteristics
(continued)
3.1
2.9
2.7
2.5
2.3
2.1
1.9
1.7
1.5
1.4
1.2
1
0.8
0.6
0.4
0.2
0
Output High Voltage
Output Low Voltage
0
5
10
15
20
25
30
Current (mA)
50 kbps GFSK, 25-kHz Deviation, 200-kHz Loop Bandwidth
Figure 4-14. GPIO Output High and Low Voltage
vs Current Being Sourced and Sinked
Figure 4-13. Eye Diagram
200-kHz Loop Bandwidth
300-kHz Loop Bandwidth
Figure 4-15. Phase Noise 869.5 MHz (10-kHz to 100-MHz Offset)
Figure 4-16. Phase Noise 869.5 MHz (10-kHz to 100-MHz Offset)
500-kHz Loop Bandwidth
Figure 4-18. Phase Noise 869.5 MHz (10-kHz to 100-MHz Offset)
400-kHz Loop Bandwidth
Figure 4-17. Phase Noise 869.5 MHz (10-kHz to 100-MHz Offset)
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Specifications
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5 Detailed
Description
5.1 Block
Diagram
Figure 5-1
shows the system block diagram of the CC120x family of devices.
CC120x
4 kbyte
ROM
MARC
SPI
Serial configuration
CSn (chip select)
SI (serial input)
Ultra low power 40 kHz
auto-calibrated RC oscillator
Main Radio Control unit
Ultra low power 16 bit
MCU
(optional 40 kHz
clock input)
Power on reset
and data interface
AES-128
accelerator
Interrupt and
IO handler
System bus
SO (serial output)
SCLK (serial clock)
(optional GPIO3/2/0)
256 byte
FIFO RAM
buffer
eWOR
Enhanced ultra low power
Wake On Radio timer
Packet handler
and FIFO control
Battery sensor /
temp sensor
Configuration and
status registers
RF and DSP frontend
Output power ramping and OOK / ASK modulation
(optional auto detected
external XOSC / TCXO)
I
+16 dBm high
efficiency PA
XOSC_Q1
XOSC_Q2
PA out
Fully integrated fractional-N
frequency synthesizer
Data interface with
signal chain access
XOSC
Q
90 dB dynamic
range ADC
IF amp
IF amp
LNA_P
LNA_N
(optional bit clock)
Highly flexible FSK / OOK
demodulator
High linearity
LNA
(optional low jitter serial
data output for legacy
protocols)
90 dB dynamic
range ADC
AGC
Automatic Gain Control, 60dB VGA range
RSSI measurements and carrier sense detection
(optional GPIO for
antenna diversity)
Figure 5-1. System Block Diagram
5.2 Frequency
Synthesizer
At the center of the CC1200 device there is a fully integrated, fractional-N, ultra-high-performance
frequency synthesizer. The frequency synthesizer is designed for excellent phase noise performance,
providing very high selectivity and blocking performance. The system is designed to comply with the most
stringent regulatory spectral masks at maximum transmit power.
Either a crystal can be connected to XOSC_Q1 and XOSC_Q2, or a TCXO can be connected to the
EXT_XOSC input. The oscillator generates the reference frequency for the synthesizer, as well as clocks
for the analog-to-digital converter (ADC) and the digital part. To reduce system cost, the CC1200 device
has high-accuracy frequency estimation and compensation registers to measure and compensate for
crystal inaccuracies. This compensation enables the use of lower cost crystals. If a TCXO is used, the
CC1200 device automatically turns on and off the TCXO when needed to support low-power modes and
Wake-On-Radio operation.
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Detailed Description
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5.3 Receiver
The CC1200 device features a highly flexible receiver. The received RF signal is amplified by the low-
noise amplifier (LNA) and is down-converted in quadrature (I/Q) to the intermediate frequency (IF). At IF,
the I/Q signals are digitized by the high dynamic-range ADCs.
An advanced automatic gain control (AGC) unit adjusts the front-end gain, and enables the CC1200
device to receive strong and weak signals, even in the presence of strong interferers. High-attenuation
channels and data filtering enable reception with strong neighbor channel interferers. The I/Q signal is
converted to a phase and magnitude signal to support the FSK and OOK modulation schemes.
NOTE
A unique I/Q compensation algorithm removes any problem of I/Q mismatch, thus avoiding
time-consuming and costly I/Q image calibration steps.
5.4 Transmitter
The CC1200 transmitter is based on direct synthesis of the RF frequency (in-loop modulation). To use the
spectrum effectively, the CC1200 device has extensive data filtering and shaping in TX mode to support
high throughput data communication in narrowband channels. The modulator also controls power ramping
to remove issues such as spectral splattering when driving external high-power RF amplifiers.
5.5 Radio
Control and User Interface
The CC1200 digital control system is built around the main radio control (MARC), which is implemented
using an internal high-performance, 16-bit ultra-low-power processor. MARC handles power modes, radio
sequencing, and protocol timing.
A 4-wire SPI serial interface is used for configuration and data buffer access. The digital baseband
includes support for channel configuration, packet handling, and data buffering. The host MCU can stay in
power-down mode until a valid RF packet is received. This greatly reduces power consumption. When the
host MCU receives a valid RF packet, it burst-reads the data. This reduces the required computing power.
The CC1200 radio control and user interface are based on the widely used CC1101 transceiver. This
relationship enables an easy transition between the two platforms. The command strobes and the main
radio states are the same for the two platforms.
For legacy formats, the CC1200 device also supports two serial modes.
•
Synchronous serial mode: The CC1200 device performs bit synchronization and provides the MCU
with a bit clock with associated data.
•
Transparent mode: The CC1200 device outputs the digital baseband signal using a digital interpolation
filter to eliminate jitter introduced by digital filtering and demodulation.
5.6 Enhanced
Wake-On-Radio (eWOR)
eWOR, using a flexible integrated sleep timer, enables automatic receiver polling with no intervention from
the MCU. When the CC1200 device enters RX mode, it listens and then returns to sleep if a valid RF
packet is not received. The sleep interval and duty cycle can be configured to make a trade-off between
network latency and power consumption. Incoming messages are time-stamped to simplify timer re-
synchronization.
The eWOR timer runs off an ultra-low-power RC oscillator. To improve timing accuracy, the RC oscillator
can be automatically calibrated to the RF crystal in configurable intervals.
Copyright © 2013–2014, Texas Instruments Incorporated
Detailed Description
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5.7 RX
Sniff Mode
The CC1200 device supports quick start up times, and requires few preamble bits. RX Sniff Mode uses
these conditions to dramatically reduce the current consumption while the receiver is waiting for data.
Because the CC1200 device can wake up and settle much faster than the duration of most preambles, it
is not required to be in RX mode continuously while waiting for a packet to arrive. Instead, the enhanced
Wake-On-Radio feature can be used to put the device into sleep mode periodically. By setting an
appropriate sleep time, the CC1200 device can wake up and receive the packet when it arrives with no
performance loss. This sequence removes the need for accurate timing synchronization between
transmitter and receiver, and lets the user trade off current consumption between the transmitter and
receiver.
5.8 Antenna
Diversity
Antenna diversity can increase performance in a multipath environment. An external antenna switch is
required. The CC1200 device uses one of the GPIO pins to automatically control the switch. This device
also supports differential output control signals typically used in RF switches.
If antenna diversity is enabled, the GPIO alternates between high and low states until a valid RF input
signal is detected. An optional acknowledge packet can be transmitted without changing the state of the
GPIO.
An incoming RF signal can be validated by received signal strength or by using the automatic preamble
detector. Using the automatic preamble detector ensures a more robust system and avoids the need to
set a defined signal strength threshold (such a threshold sets the sensitivity limit of the system).
22
Detailed Description
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5.9 WaveMatch
Advanced capture logic locks onto the synchronization word and does not require preamble settling bytes.
Therefore, receiver settling time is reduced to the settling time of the AGC, typically 4 bits.
The WaveMatch feature also greatly reduces false sync triggering on noise, further reducing the power
consumption and improving sensitivity and reliability. The same logic can also be used as a high-
performance preamble detector to reliably detect a valid preamble in the channel.
Figure 5-2. Receiver Configurator in SmartRF™ Studio
Copyright © 2013–2014, Texas Instruments Incorporated
Detailed Description
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6 Typical
Application Circuit
NOTE
This section is intended only as an introduction.
typical application circuit. The board layout will greatly influence the RF performance of the CC1200
Optional
40 MHz
crystal
XOSC/
TCXO
(optional control pin
from CC1200)
1
2
3
4
5
6
7
8
24
23
22
21
20
19
18
17
LPF1
LPF0
VDD
VDD_GUARD
RESET_N
GPIO3
GPIO2
DVDD
DCPL
SI
AVDD_SYNTH1
DCPL_VCO
LNA_N
VDD
VDD
CC1200
LNA_P
TRX_SW
PA
SCLK
MCU connection
SPI interface and
optional gpio pins
Figure 6-1. Typical Application Circuit
Documentation Support
.
24
Typical Application Circuit
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7 Device
and Documentation Support
7.1 Device
Support
7.1.1 Development
Support
7.1.1.1 Configuration
Software
Studio software is highly recommended for obtaining optimum register settings, and for evaluating
performance and functionality.
7.1.2 Device
and Development-Support Tool Nomenclature
To designate the stages in the product development cycle, TI assigns prefixes to the part numbers of all
microprocessors (MPUs) and support tools. Each device has one of three prefixes: X, P, or null (no prefix)
(for example, CC1200). Texas Instruments recommends two of three possible prefix designators for its
support tools: TMDX and TMDS. These prefixes represent evolutionary stages of product development
from engineering prototypes (TMDX) through fully qualified production devices and tools (TMDS).
Device development evolutionary flow:
X
Experimental device that is not necessarily representative of the final device’s electrical
specifications and may not use production assembly flow.
P
Prototype device that is not necessarily the final silicon die and may not necessarily meet
final electrical specifications.
null
Production version of the silicon die that is fully qualified.
Support tool development evolutionary flow:
TMDX
Development-support product that has not yet completed Texas Instruments internal
qualification testing.
TMDS
Fully qualified development-support product.
X and P devices and TMDX development-support tools are shipped against the following disclaimer:
“Developmental product is intended for internal evaluation purposes.”
Production devices and TMDS development-support tools have been characterized fully, and the quality
and reliability of the device have been demonstrated fully. TI’s standard warranty applies.
Predictions show that prototype devices (X or P) have a greater failure rate than the standard production
devices. Texas Instruments recommends that these devices not be used in any production system
because their expected end-use failure rate still is undefined. Only qualified production devices are to be
used.
TI device nomenclature also includes a suffix with the device family name. This suffix indicates the
package type (for example, RHB) and the temperature range (for example, blank is the default commercial
temperature range) provides a legend for reading the complete device name for any CC1200 device.
For orderable part numbers of CC1200 devices in the QFN package types, see the Package Option
Copyright © 2013–2014, Texas Instruments Incorporated
Device and Documentation Support
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7.2 Documentation
Support
The following documents supplement the CC1200 processor. Copies of these documents are available on
SWRR106
CC112x IPC 868- and 915-MHz 2-layer Reference Design
SWRR107
CC112x IPC 868- and 915-MHz 4-layer Reference Design
SWRR122
CC1200EM 420- to 470-MHz Reference Design
SWRR121
CC1200EM 868- to 930-MHz Reference Design
SWRC046
SmartRF Studio Software
SWRA428
CC112x/CC120x Sniff Mode Application Note
7.3 Community
Resources
The following links connect to TI community resources. Linked contents are provided “AS IS” by the
respective contributors. They do not constitute TI specifications and do not necessarily reflect TI’s views;
collaboration among engineers. At e2e.ti.com, you can ask questions, share knowledge,
explore ideas and help solve problems with fellow engineers.
developers get started with Embedded Processors from Texas Instruments and to foster
innovation and growth of general knowledge about the hardware and software surrounding
these devices.
7.4 Trademarks
SmartRF, E2E are trademarks of Texas Instruments.
All other trademarks are the property of their respective owners.
7.5 Electrostatic
Discharge Caution
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
7.6 Glossary
This glossary lists and explains terms, acronyms, and definitions.
26
Device and Documentation Support
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8 Mechanical
Packaging and Orderable Information
The following pages include mechanical packaging and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and
revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
Copyright © 2013–2014, Texas Instruments Incorporated
Mechanical Packaging and Orderable Information
27
PACKAGE OPTION ADDENDUM
27-Oct-2017
PACKAGING INFORMATION
Orderable Device
CC1200RHBR
CC1200RHBT
Status Package
Type Package Pins Package
Eco Plan
Lead/Ball Finish
MSL Peak Temp
Op Temp (°C)
-40 to 85
Device Marking
Samples
Drawing
Qty
(1)
(2)
(6)
(3)
(4/5)
ACTIVE
VQFN
VQFN
RHB
32
32
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU | Call TI
Level-3-260C-168 HR
CC1200
CC1200
ACTIVE
RHB
250
Green (RoHS
& no Sb/Br)
CU NIPDAU | Call TI
Level-3-260C-168 HR
-40 to 85
(1)
The marketing status values are defined as follows:
ACTIVE:
Product device recommended for new designs.
LIFEBUY:
TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND:
Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW:
Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE:
TI has discontinued the production of the device.
(2)
RoHS:
TI defines “RoHS” to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, “RoHS” products are suitable for use in specified lead-free processes. TI may
reference these types of products as “Pb-Free”.
RoHS Exempt:
TI defines “RoHS Exempt” to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green:
TI defines “Green” to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3)
MSL, Peak Temp. – The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a “~” will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead/Ball Finish – Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Important Information and Disclaimer:
The information provided on this page represents TI’s knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI’s liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 1
IMPORTANT NOTICE
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TI’s published terms of sale for semiconductor products (
http://www.ti.com/sc/docs/stdterms.htm
) apply to the sale of packaged integrated
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Designers agree that it has the necessary expertise to select the product with the appropriate qualification designation for their applications
and that proper product selection is at Designers’ own risk. Designers are solely responsible for compliance with all legal and regulatory
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Designer will fully indemnify TI and its representatives against any damages, costs, losses, and/or liabilities arising out of Designer’s non-
compliance with the terms and provisions of this Notice.
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