Texas-Instruments-CSD17307Q5A
| Part # | Texas-Instruments-CSD17307Q5A |
Download  | Texas-Instruments-CSD17307Q5A |
SLPS252A
–
F
EBRUARY 201
0
–
R
EVISED JULY 2010
30V, N-Channel NexFET™
Power MOSFETs
1
FEATURES
PRODUCT SUMMARY
2
•
•
•
•
•
•
•
•
Optimized for 5V Gate Drive
V
DS
Q
g
Drain to Source Voltage
Gate Charge Total (4.5V)
Gate Charge Gate to Drain
30
4
V
Ultralow Q
g
and Q
gd
nC
nC
m
Ω
m
Ω
m
Ω
V
Low Thermal Resistance
Avalanche Rated
Q
gd
1
V
GS
= 3V
12.8
9.7
R
DS(on)
Drain to Source On Resistance
V
GS
= 4.5V
V
GS
= 8V
Pb Free Terminal Plating
RoHS Compliant
8.4
V
GS(th)
Threshold Voltage
1.3
Halogen Free
SON 5-mm × 6-mm Plastic Package
ORDERING INFORMATION
Device
CSD17307Q5A
Package
Media
Qty
Ship
APPLICATIONS
SON 5-mm × 6-mm
Plastic Package
13-Inch
Reel
Tape and
Reel
2500
•
Notebook Point of Load
•
Point-of-Load Synchronous Buck in
Networking, Telecom and Computing Systems
ABSOLUTE MAXIMUM RATINGS
T
A
= 25°C unless otherwise stated
VALUE
UNIT
V
DESCRIPTION
V
DS
V
GS
Drain to Source Voltage
30
+10 / –8
73
Gate to Source Voltage
V
The NexFET™ power MOSFET has been designed
to minimize losses in power conversion applications,
and optimized for 5V gate drive applications.
Continuous Drain Current, T
C
= 25°C
A
I
D
14
A
I
DM
P
D
T
J
,
92
A
Top View
3
W
Operating Junction and Storage
–55 to 150
54
°C
S
S
S
G
1
2
3
4
8
7
6
5
D
D
D
T
STG
Temperature Range
Avalanche Energy, Single Pulse
I
D
= 33A, L = 0.1mH, R
G
= 25
Ω
E
AS
mJ
(1) Typical
R
q
JA
=
41°C/W on
a
1-inch
2
(6.45-cm
2
),
2-oz. (0.071-mm thick) Cu pad on a 0.06-inch (1.52-mm) thick
FR4 PCB.
D
(2) Pulse
duration
≤
300
m
s, duty cycle
≤
2%
D
P0093-01
R
DS(on)
vs V
GS
GATE CHARGE
30
25
20
15
10
5
8
I
D
= 11A
I
D
= 11A
V
DS
= 15V
7
6
5
4
3
2
1
0
T
C
= 125
°
C
T
C
= 25
°
C
0
0
1
2
3
4
5
6
7
8
9
10
0
1
2
3
4
5
6
7
V
GS
– Gate-to-Source Voltage – V
Q
g
– Gate Charge – nC
G006
G003
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
NexFET is a trademark of Texas Instruments.
2
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2010, Texas Instruments Incorporated
SLPS252A
–
F
EBRUARY 201
0
–
R
EVISED JULY 2010
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
ELECTRICAL CHARACTERISTICS
(T
A
= 25°C unless otherwise stated)
PARAMETER
Static Characteristics
TEST CONDITIONS
MIN
TYP
MAX UNIT
BV
DSS
I
DSS
Drain to Source Voltage
V
GS
= 0V, I
D
= 250
m
A
30
V
Drain to Source Leakage Current
Gate to Source Leakage Current
Gate to Source Threshold Voltage
V
GS
= 0V, V
DS
= 24V
V
DS
= 0V, V
GS
= +10 / –8V
V
DS
= V
GS
, I
D
= 250
m
A
V
GS
= 3V, I
D
= 11A
1
100
1.8
m
A
nA
V
I
GSS
V
GS(th)
0.9
1.3
12.8
9.7
17.3
12.1
10.5
m
Ω
m
Ω
m
Ω
S
R
DS(on)
Drain to Source On Resistance
Transconductance
V
GS
= 4.5V, I
D
= 11A
V
GS
= 8V, I
D
= 11A
8.4
g
fs
V
DS
= 15V, I
D
= 11A
66
Dynamic Characteristics
C
iss
C
oss
C
rss
R
G
Input Capacitance
535
290
28
700
375
36
pF
pF
pF
Ω
Output Capacitance
Reverse Transfer Capacitance
Series Gate Resistance
Gate Charge Total (4.5V)
Gate Charge Gate to Drain
Gate Charge Gate to Source
Gate Charge at Vth
Output Charge
V
GS
= 0V, V
DS
= 15V, f = 1MHz
0.9
4
1.8
5.2
Q
g
nC
nC
nC
nC
nC
ns
ns
ns
ns
Q
gd
Q
gs
Q
g(th)
Q
oss
t
d(on)
t
r
1
V
DS
= 15V, I
D
= 11A
1.3
0.65
7.3
4.6
6.7
9.3
2.6
V
DS
= 13V, V
GS
= 0V
Turn On Delay Time
Rise Time
V
DS
= 15V, V
GS
= 4.5V, I
DS
= 11A, R
G
= 2
Ω
t
d(off)
t
f
Turn Off Delay Time
Fall Time
Diode Characteristics
V
SD
Q
rr
t
rr
Diode Forward Voltage
I
SD
= 11A, V
GS
= 0V
0.85
13
1
V
Reverse Recovery Charge
Reverse Recovery Time
nC
ns
V
DD
= 13V, I
F
= 11A, di/dt = 300A/
m
s
16
THERMAL CHARACTERISTICS
(T
A
= 25°C unless otherwise stated)
PARAMETER
Thermal Resistance Junction to Case
(1)
Thermal Resistance Junction to Ambient
(1
)
(
2)
MIN
TYP
MAX
UNIT
°C/W
°C/W
R
q
JC
R
q
JA
1.9
52
(1)
R
q
JC
is determined with the device mounted on a 1-inch
2
(6.45-cm
2
), 2-oz. (0.071-mm thick) Cu pad on a 1.5-inch × 1.5-inch (3.81-cm ×
3.81-cm), 0.06-inch (1.52-mm) thick FR4 PCB. R
q
JC
is specified by design, whereas R
q
JA
is determined by the user’s board design.
(2) Device
mounted on FR4 material with 1-inch
2
(6.45-cm
2
), 2-oz. (0.071-mm thick) Cu.
2
Copyright © 2010, Texas Instruments Incorporated
SLPS252A
–
F
EBRUARY 201
0
–
R
EVISED JULY 2010
GATE
Source
GATE
Source
Max R
q
JA
= 52°C/W
when mounted on
1 inch
2
(6.45 cm
2
) of
2-oz. (0.071-mm thick)
Cu.
Max R
q
JA
= 121°C/W
when mounted on a
minimum pad area of
2-oz. (0.071-mm thick)
Cu.
DRAIN
DRAIN
M0137-02
M0137-01
TYPICAL MOSFET CHARACTERISTICS
(T
A
= 25°C unless otherwise stated)
10
1
0.5
0.3
Duty Cycle = t
1
/t
2
0.1
0.1
0.05
P
0.02
0.01
t
1
0.01
t
2
Typical R
q
JA
= 97
°
C/W (min Cu)
T
J
= P
´
Z
q
JA
´
R
q
JA
Single Pulse
0.001
0.0001
0.001
0.01
0.1
1
10
100
1k
t
p
– Pulse Duration – s
G012
Figure 1.
Transient Thermal Impedance
Copyright © 2010, Texas Instruments Incorporated
3
SLPS252A
–
F
EBRUARY 201
0
–
R
EVISED JULY 2010
TYPICAL MOSFET CHARACTERISTICS (continued)
(T
A
= 25°C unless otherwise stated)
TEXT ADDED FOR SPACING
TEXT ADDED FOR SPACING
30
25
20
15
10
5
30
25
20
15
10
5
V
DS
= 5V
V
GS
= 8V
T
C
= 125
°
C
V
GS
= 2.5V
T
C
= 25
°
C
T
C
= -55
°
C
V
GS
= 4.5V
V
GS
= 3.5V
V
GS
= 3V
0
0
0
0.2
0.4
0.6
0.8
1
1.2
1.4
1.6
0
0.5
1
1.5
2
2.5
3
V
DS
– Drain-to-Source Voltage – V
V
GS
– Gate-to-Source Voltage – V
G001
G002
Figure 2. Saturation Characteristics
TEXT ADDED FOR SPACING
Figure 3. Transfer Characteristics
TEXT ADDED FOR SPACING
8
7
6
5
4
3
2
1
0
1.4
1.2
1
I
D
= 11A
V
DS
= 15V
f = 1MHz
V
GS
= 0V
C
oss
= C
ds
+ C
gd
C
iss
= C
gd
+ C
gs
0.8
0.6
0.4
0.2
0
C
rss
= C
gd
0
1
2
3
4
5
6
7
0
5
10
15
20
25
30
Q
g
– Gate Charge – nC
V
DS
– Drain-to-Source Voltage – V
G003
G004
Figure 4. Gate Charge
TEXT ADDED FOR SPACING
Figure 5. Capacitance
TEXT ADDED FOR SPACING
1.8
30
25
20
15
10
5
I
D
= 250
µ
A
I
D
= 11A
1.6
1.4
1.2
1
T
C
= 125
°
C
0.8
0.6
0.4
0.2
0
T
C
= 25
°
C
0
-75
-25
25
75
125
175
0
1
2
3
4
5
6
7
8
9
10
T
C
– Case Temperature –
°
C
V
GS
– Gate-to-Source Voltage – V
G005
G006
Figure 6. Threshold Voltage vs. Temperature
Figure 7. On-State Resistance vs. Gate-to-Source Voltage
4
Copyright © 2010, Texas Instruments Incorporated
SLPS252A
–
F
EBRUARY 201
0
–
R
EVISED JULY 2010
TYPICAL MOSFET CHARACTERISTICS (continued)
(T
A
= 25°C unless otherwise stated)
TEXT ADDED FOR SPACING
TEXT ADDED FOR SPACING
1.6
1.4
1.2
1
100
10
I
D
= 11A
V
GS
= 4.5V
T
C
= 125
°
C
1
0.1
T
C
= 25
°
C
0.8
0.6
0.4
0.2
0.01
0.001
0.0001
-75
-25
25
75
125
175
0
0.2
0.4
0.6
0.8
1
1.2
T
C
– Case Temperature –
°
C
V
SD
– Source-to-Drain Voltage – V
G007
G008
Figure 8. Normalized On-State Resistance vs. Temperature
Figure 9. Typical Diode Forward Voltage
TEXT ADDED FOR SPACING
TEXT ADDED FOR SPACING
1k
100
10
1
100
1
0
1
0
1
ꢀ
1
s
0
T
C
= 25
°
C
10
1ms
10ms
T
C
= 125
°
C
1
1
1
0
1
0
1
m
0
s
Area Limited
by R
DS(on)
1s
0.1
Single Pulse
Typical R
θ
JA
= 97
°
C/W (min Cu)
DC
0.01
0.01
0.1
1
10
100
0.01
0.1
1
10
V
DS
– Drain-to-Source Voltage – V
t
(AV)
– Time in Avalanche – ms
G009
G010
Figure 10. Maximum Safe Operating Area
Figure 11. Single Pulse Unclamped Inductive Switching
TEXT ADDED FOR SPACING
100
90
80
70
60
50
40
30
20
10
0
-50
-25
0
25
50
75
100 125 150 175
T
C
– Case Temperature –
°
C
G011
Figure 12.
Maximum Drain Current vs. Temperature
Copyright © 2010, Texas Instruments Incorporated
5
SLPS252A
–
F
EBRUARY 201
0
–
R
EVISED JULY 2010
MECHANICAL DATA
Q5A Package Dimensions
E2
L
H
K
q
L1
Top View
Side View
Bottom View
q
E1
E
Front View
M0135-01
MILLIMETERS
NOM
1.00
DIM
MIN
0.90
0.33
0.20
4.80
3.61
5.90
5.70
3.38
1.17
0.41
1.10
0.51
0.06
0°
MAX
1.10
0.51
0.34
5.00
4.02
6.10
5.80
3.78
1.37
0.71
A
b
0.41
c
0.25
D1
D2
E
4.90
3.81
6.00
E1
E2
e
5.75
3.58
1.27
H
0.56
K
L
0.61
0.13
0.71
0.20
12°
L1
q
6
Copyright © 2010, Texas Instruments Incorporated
SLPS252A
–
F
EBRUARY 201
0
–
R
EVISED JULY 2010
MILLIMETERS
INCHES
DIM
Recommended PCB Pattern
MIN
MAX
6.305
4.56
4.56
0.7
MIN
MAX
0.248
0.18
F1
F1
F2
6.205
4.46
4.46
0.65
0.62
0.63
0.7
0.244
0.176
0.176
0.026
0.024
0.025
0.028
0.026
0.024
0.193
0.176
F7
F6
F3
0.18
F4
0.028
0.026
0.027
0.031
0.028
0.026
0.197
0.18
F5
0.67
0.68
0.8
F6
F7
F8
0.65
0.62
4.9
0.7
F9
0.67
5
F10
F11
4.46
4.56
F10
M0139-01
For recommended circuit layout for PCB designs, see application note
SLPA005
–
Reducing Ringing Through
PCB Layout Techniques
.
Q5A Tape and Reel Information
K0
4.00 0.10
ꢀ(SS ꢁNoS 1ꢂ
0.30 0.05
2.00 0.05
+0.10
–0.00
Ø 1.50
B0
A0
8.00 0.10
R 0.30 MAX
Ø 1.50 MIꢁ
R 0.30 TYP
A0 = 6.50
0.10
B0 = 5.30
0.10
K0 = 1.40
0.10
M0138-01
Notes:
1. 10-sprocket
hole-pitch cumulative tolerance ±0.2
2. Camber
not to exceed 1mm in 100mm, noncumulative over 250mm
3. Material:
black static-dissipative polystyrene
4. All
dimensions are in mm (unless otherwise specified)
5. A0
and B0 measured on a plane 0.3mm above the bottom of the pocket
Copyright © 2010, Texas Instruments Incorporated
7
SLPS252A
–
F
EBRUARY 201
0
–
R
EVISED JULY 2010
REVISION HISTORY
Changes from Original (February 2010) to Revision A
Page
•
•
•
Updated the Q5A Package Dimensions table. DIM c MAX was 0.30, DIM D2 MAX was 3.96, DIM e MIN was blank
Deleted Note 6 from the Q5A Tape and Reel Information – “MSL1 260°C (IR and convection) PbF reflow
8
Copyright © 2010, Texas Instruments Incorporated
PACKAGE OPTION ADDENDUM
7-Jan-2016
PACKAGING INFORMATION
Orderable Device
Status Package
Type Package Pins Package
Eco Plan
Lead/Ball Finish
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(6)
(3)
(4/5)
CSD17307Q5A
ACTIVE
VSONP
DQJ
8
2500 Pb-Free
(RoHS
Exempt)
CU SN
Level-1-260C-UNLIM
-55 to 150
CSD17307
(1)
The marketing status values are defined as follows:
ACTIVE:
Product device recommended for new designs.
LIFEBUY:
TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND:
Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW:
Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE:
TI has discontinued the production of the device.
(2)
Eco Plan – The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) – please check
http://www.ti.com/productcontent
for the latest availability
information and additional product content details.
TBD:
The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS):
TI’s terms “Lead-Free” or “Pb-Free” mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt):
This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based
die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br):
TI defines “Green” to mean Pb-Free (RoHS compatible), and free of Bromine (Br)
and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3)
MSL, Peak Temp. – The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a “~” will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead/Ball Finish – Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Important Information and Disclaimer:
The information provided on this page represents TI’s knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI’s liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 1
IMPORTANT NOTICE
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other
changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest
issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and
complete. All semiconductor products (also referred to herein as “components”) are sold subject to TI’s terms and conditions of sale
supplied at the time of order acknowledgment.
TI warrants performance of its components to the specifications applicable at the time of sale, in accordance with the warranty in TI’s terms
and conditions of sale of semiconductor products. Testing and other quality control techniques are used to the extent TI deems necessary
to support this warranty. Except where mandated by applicable law, testing of all parameters of each component is not necessarily
performed.
TI assumes no liability for applications assistance or the design of Buyers’ products. Buyers are responsible for their products and
applications using TI components. To minimize the risks associated with Buyers’ products and applications, Buyers should provide
adequate design and operating safeguards.
TI does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or
other intellectual property right relating to any combination, machine, or process in which TI components or services are used. Information
published by TI regarding third-party products or services does not constitute a license to use such products or services or a warranty or
endorsement thereof. Use of such information may require a license from a third party under the patents or other intellectual property of the
third party, or a license from TI under the patents or other intellectual property of TI.
Reproduction of significant portions of TI information in TI data books or data sheets is permissible only if reproduction is without alteration
and is accompanied by all associated warranties, conditions, limitations, and notices. TI is not responsible or liable for such altered
documentation. Information of third parties may be subject to additional restrictions.
Resale of TI components or services with statements different from or beyond the parameters stated by TI for that component or service
voids all express and any implied warranties for the associated TI component or service and is an unfair and deceptive business practice.
TI is not responsible or liable for any such statements.
Buyer acknowledges and agrees that it is solely responsible for compliance with all legal, regulatory and safety-related requirements
concerning its products, and any use of TI components in its applications, notwithstanding any applications-related information or support
that may be provided by TI. Buyer represents and agrees that it has all the necessary expertise to create and implement safeguards which
anticipate dangerous consequences of failures, monitor failures and their consequences, lessen the likelihood of failures that might cause
harm and take appropriate remedial actions. Buyer will fully indemnify TI and its representatives against any damages arising out of the use
of any TI components in safety-critical applications.
In some cases, TI components may be promoted specifically to facilitate safety-related applications. With such components, TI’s goal is to
help enable customers to design and create their own end-product solutions that meet applicable functional safety standards and
requirements. Nonetheless, such components are subject to these terms.
No TI components are authorized for use in FDA Class III (or similar life-critical medical equipment) unless authorized officers of the parties
have executed a special agreement specifically governing such use.
Only those TI components which TI has specifically designated as military grade or “enhanced plastic” are designed and intended for use in
military/aerospace applications or environments. Buyer acknowledges and agrees that any military or aerospace use of TI components
which have
not
been so designated is solely at the Buyer’s risk, and that Buyer is solely responsible for compliance with all legal and
regulatory requirements in connection with such use.
TI has specifically designated certain components as meeting ISO/TS16949 requirements, mainly for automotive use. In any case of use of
non-designated products, TI will not be responsible for any failure to meet ISO/TS16949.
Products
Applications
Audio
Amplifiers
Data Converters
DLP® Products
DSP
Computers and Peripherals
Consumer Electronics
Energy and Lighting
Industrial
Clocks and Timers
Interface
Medical
Logic
Security
Power Mgmt
Microcontrollers
RFID
Space, Avionics and Defense
Video and Imaging
OMAP Applications Processors
Wireless Connectivity
TI E2E Community
Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265
Copyright © 2016, Texas Instruments Incorporated
