Texas-Instruments-CSD86311W1723
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Download  | Texas-Instruments-CSD86311W1723 |
SLPS251
–
M
AY 2010
Dual N-Channel NexFET™
Power MOSFET
PRODUCT SUMMARY
Drain to Source Voltage
1
FEATURES
V
DS
Q
g
25
3.1
V
•
•
•
•
•
•
•
Dual N-Ch MOSFETs
Common Source Configuration
Small Footprint 1.7 mm × 2.3 mm
Ultra Low Q
g
and Q
gd
Pb Free
Gate Charge Total (4.5V)
Gate Charge Gate to Drain
nC
nC
m
Ω
m
Ω
m
Ω
V
Q
gd
0.33
V
GS
= 2.5V
37
31
29
R
DS(on)
Drain to Source On Resistance
V
GS
= 4.5V
V
GS
= 8V
V
GS(th)
Threshold Voltage
1
RoHS Compliant
Halogen Free
Text Added for Spacing
ORDERING INFORMATION
APPLICATIONS
Device
Package
Media
Qty
Ship
•
•
•
Battery Management
Battery Protection
DC-DC Converters
1.7-mm × 2.3-mm
Wafer Level
Package
Tape and
Reel
CSD86311W1723
7-inch reel
3000
Text Added for Spacing
ABSOLUTE MAXIMUM RATINGS
DESCRIPTION
The device has been designed to deliver the lowest
on resistance and gate charge in the smallest outline
possible with thermal characteristics in an ultra low
profile. Low on resistance and gate charge coupled
with the small footprint and low profile make the
device ideal for battery operated space constrained
application in load management as well as DC-DC
converter applications
T
A
= 25°C unless otherwise stated
VALUE
UNIT
V
V
DS
V
GS
Drain to Source Voltage
25
Gate to Source Voltage
+10 / -8
V
I
D
4.5
A
I
G
6
A
P
D
T
J
,
1.5
W
Top View
Operating Junction and Storage
T
STG
Temperature Range
–55 to 150
°C
G1
S
D1
S
D1
S
D1
S
(1) May
be limited by Max source current
(2) Based
on Min Cu footprint
(3) Per
MOSFET
G2
D2
D2
D2
(4) Total
for device
P0115-01
R
DS(on)
vs V
GS
R
D1D2(on)
vs V
GS
50
45
40
35
30
25
20
100
90
I
D
= 2A
I
D
= 2A
80
T
C
= 125
°
C
70
T
C
= 125
°
C
60
50
40
T
C
= 25
°
C
30
T
C
= 25
°
C
20
0
1
2
3
4
5
6
7
8
9
10
0
1
2
3
4
5
6
7
8
9
10
V
GS
– Gate-to-Source Voltage – V
V
GS
– Gate-to-Source Voltage – V
G006
G013
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2010, Texas Instruments Incorporated
SLPS251
–
M
AY 2010
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
ELECTRICAL CHARACTERISTICS
(T
A
= 25°C unless otherwise stated)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX UNIT
Static Characteristics
BV
DSS
I
DSS
Drain to Source Voltage
V
GS
= 0V, I
D
= 250
m
A
25
V
Drain to Source Leakage Current
Gate to Source Leakage Current
Gate to Source Threshold Voltage
V
GS
= 0V, V
DS
= 20V
V
DS
= 0V, V
GS
= +10 / -8V
V
DS
= V
GS
, I
D
= 250
m
A
V
GS
= 2.5V, I
DS
= 2A
V
GS
= 4.5V, I
DS
= 2A
V
GS
= 8V, I
DS
= 2A
1
±100
1.4
51
m
A
nA
I
GSS
V
GS(th)
0.85
1
37
31
29
52
41
38
6.4
V
m
Ω
m
Ω
m
Ω
m
Ω
m
Ω
m
Ω
S
R
DS(on)
Drain to Source On Resistance
42
39
V
GS
= 2.5V, I
D
= 2A
V
GS
= 4.5V, I
DS
= 2A
V
GS
= 8V, I
DS
= 2A
75
R
DD(on)
Drain to Drain On Resistance
Transconductance
55
50
g
fs
V
DS
= 10V, I
D
= 2A
Dynamic Characteristics
C
ISS
C
OSS
C
RSS
R
G
Input Capacitance
450
250
10
585
325
13
pF
pF
pF
Ω
V
GS
= 0V,
V
DS
= 12.5V,
f = 1MHz
Output Capacitance
Reverse Transfer Capacitance
Seried Gate Resistance
Gate Charge Total (4.5V)
Gate Charge Gate to Drain
Gate Charge Gate to Source
Gate Charge at Vth
Output Charge
1.4
2.8
4
Q
g
3.1
nC
nC
nC
nC
nC
ns
ns
ns
ns
Q
gd
Q
gs
Q
g(th)
Q
OSS
t
d(on)
t
r
0.33
0.85
0.48
4.5
V
DS
= 12.5V,
I
D
= 2A
V
DS
= 12.2V, V
GS
= 0V
Turn On Delay Time
Rise Time
5.4
4.3
V
DS
= 12.5V, V
GS
= 4.5V,
I
D
= 2A, R
G
= 2
Ω
t
d(off)
t
f
Turn Off Delay Time
Fall Time
13.2
2.9
Diode Characteristics
V
SD
Q
rr
t
rr
Diode Forward Voltage
I
S
= 2A, V
GS
= 0V
0.78
4.2
1
V
Reverse Recovery Charge
Reverse Recovery Time
nC
ns
V
dd
= 12.2V, I
F
= 2A,
di/dt = 300A/
m
s
13.4
THERMAL CHARACTERISTICS
(T
A
= 25°C unless otherwise stated)
PARAMETER
MIN
TYP
MAX UNIT
165 °C/W
68 °C/W
(1) (2)
R
q
JA
R
q
JA
Thermal Resistance Junction to Ambient (Minimum Cu area)
Thermal Resistance Junction to Ambient (1 in
2
Cu area)
(2) (3)
(1) Device
mounted on FR4 material with minimum Cu mounting area.
(2) Measured
with both devices biased in a parallel condition.
(3) Device
mounted on FR4 material with 1 in
2
of 2oz. Cu.
2
Copyright © 2010, Texas Instruments Incorporated
SLPS251
–
M
AY 2010
CSD75211W1723 TTA MIN Rev
CSD86311W1723
0
CSD75211W1723 TTA MIN Rev
CSD86311W1723
0
Max R
q
JA
= 165°C/W
when mounted on
minimum pad area of 2
oz. Cu.
Max R
q
JA
= 68°C/W
when mounted on
1inch
2
of 2 oz. Cu.
G1 S G2 D2
D1
G1 S G2 D2
D1
M0182-01
M0183-01
TYPICAL MOSFET CHARACTERISTICS
(T
A
= 25°C unless otherwise stated)
10
1
0.5
0.3
0.1
0.01
0.1
0.05
Duty Cycle = t
1
/t
2
0.02
0.01
P
t
1
Single Pulse
t
2
0.001
Typical R
q
JA
= 132
°
C/W (min Cu)
T
J
= P
´
Z
q
JA
´
R
q
JA
0.0001
0.0001
0.001
0.01
0.1
1
10
100
1k
t
p
– Pulse Duration – s
G012
Figure 1.
Transient Thermal Impedance
Copyright © 2010, Texas Instruments Incorporated
3
SLPS251
–
M
AY 2010
TYPICAL MOSFET CHARACTERISTICS (continued)
(T
A
= 25°C unless otherwise stated)
20
18
16
14
12
10
8
20
18
16
14
V
DS
= 5V
T
C
= 25
°
C
T
C
= 125
°
C
V
GS
= 2.5V
12
V
GS
= 3V
10
V
GS
= 3.5V
V
GS
= 4.5V
V
GS
= 8V
8
6
4
2
0
6
T
C
= -55
°
C
4
2
0
0
0.5
1
1.5
2
2.5
3
1
1.5
2
2.5
3
V
DS
– Drain-to-Source Voltage – V
V
GS
– Gate-to-Source Voltage – V
G001
G002
Figure 2. Saturation Characteristics
Figure 3. Transfer Characteristics
6
1k
100
10
I
D
= 2A
V
DS
= 12.5V
5
4
3
2
1
0
C
iss
= C
gd
+ C
gs
C
oss
= C
ds
+ C
gd
C
rss
= C
Ggd
f = 1MHz
V
GS
= 0V
1
0
0.5
1
1.5
2
2.5
3
3.5
4
0
5
10
15
20
25
Q
g
– Gate Charge – nC
V
DS
– Drain-to-Source Voltage – V
G003
G004
Figure 4. Gate Charge
Figure 5. Capacitance
1.4
1.2
1
50
45
40
35
30
25
I
D
= 250
µ
A
I
D
= 2A
T
C
= 125
°
C
0.8
0.6
0.4
0.2
0
T
C
= 25
°
C
20
0
-75
-25
25
75
125
175
1
2
3
4
5
6
7
8
9
10
T
C
– Case Temperature –
°
C
G005
V
GS
– Gate-to-Source Voltage – V
G006
Figure 6. Threshold Voltage vs. Temperature
Figure 7. R
DS(on)
vs. Gate-to-Source Voltage
4
Copyright © 2010, Texas Instruments Incorporated
SLPS251
–
M
AY 2010
TYPICAL MOSFET CHARACTERISTICS (continued)
(T
A
= 25°C unless otherwise stated)
1.6
1.4
1.2
1
100
90
I
D
= 2A
V
GS
= 8V
I
D
= 2A
80
70
T
C
= 125
°
C
0.8
0.6
0.4
0.2
0
60
50
40
30
20
T
C
= 25
°
C
-75
-25
25
75
125
175
0
1
2
3
4
5
6
7
8
9
10
T
C
– Case Temperature –
°
C
G007
V
GS
– Gate-to-Source Voltage – V
G013
Figure 8. R
D1D2(on)
vs. Gate-to-Source Voltage
Figure 9. On Resistance vs. Temperature
10
1
10
1
1ms
T
C
= 125
°
C
0.1
10ms
T
C
= 25
°
C
0.01
0.001
0.0001
0.1
0.01
Area May be
Limited by R
DS(on)
1
1
0
1
0
1
m
0
s
1s
Single Pulse
Typical R
θ
JA
= 132
°
C/W (min Cu)
DC
0
0.2
0.4
0.6
0.8
1
1.2
0.01
0.1
1
10
100
V
SD
– Source-to-Drain Voltage – V
V
DS
– Drain-to-Source Voltage – V
G008
G009
Figure 10. Typical Diode Forward Voltage
Figure 11. Maximum Safe Operating Area
5
4.5
4
3.5
3
2.5
2
1.5
1
0.5
0
-50
-25
0
25
50
75
100 125 150 175
T
J
– Junction Temperature –
°
C
Figure 12.
Maximum Drain Current vs. Temperat
u
G
r
0
e
11
Copyright © 2010, Texas Instruments Incorporated
5
SLPS251
–
M
AY 2010
MECHANICAL DATA
CSD86311W1723 Package Dimensions
Pin A1 Mark
1
2
3
4
A
B
C
+0.00
–0.08
2.32
0.62 Max
Top View
Side View
0.35 0.10
Seating Plate
Front View
1.50
0.50
Solder Ball
Ø 0.31
0.015
0.50
0.50
C
B
A
Pinout
Position
A2, A3, A4
C2, C3, C4
A1
Designation
Drain 1
Drain 2
Gate 1
Gate 2
Source
C1
B1, B2, B3, B4
1
2
3
4
Pin A1 Mark
(Hidden)
Bottom View
M0184-01
NOTE: All
dimensions are in mm (unless otherwise specified)
6
Copyright © 2010, Texas Instruments Incorporated
SLPS251
–
M
AY 2010
Land Pattern Recommendation
1.50
0.50
0.50
0.50
Ø 0.25
A
B
C
1
2
3
4
M0185-01
NOTE: All
dimensions are in mm (unless otherwise specified)
Text Added for Spacing
Text Added for Spacing
Tape and Reel Information
4.00 0.10
2.00 0.0ꢀ
Ø 1.ꢀ0
0.10
4ꢀ° Max
4.00 0.10
Pin A1 Mark
0.30
0.80 0.0ꢀ
0.2ꢀ4 0.02
4ꢀ° Max
2.4ꢀ 0.0ꢀ
M0186-01
NOTE: All
dimensions are in mm (unless otherwise specified)
Copyright © 2010, Texas Instruments Incorporated
7
PACKAGE MATERIALS INFORMATION
9-Aug-2022
TAPE AND REEL INFORMATION
REEL DIMENSIONS
TAPE DIMENSIONS
K0
P1
W
B0
Reel
Diameter
Cavity
A0
A0 Dimension
designed to accommodate the component width
B0 Dimension
designed to accommodate the component length
K0 Dimension
designed to accommodate the component thickness
Overall width of the carrier tape
W
P1 Pitch
between successive cavity centers
Reel Width (W1)
QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE
Sprocket Holes
Q1 Q2
Q3 Q4
Q1 Q2
Q3 Q4
User Direction of Feed
Pocket Quadrants
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width
(mm) (mm) (mm) (mm) (mm)
Quadrant
(mm) W1
(mm)
CSD86311W1723
CSD86311W1723
DSBGA
DSBGA
YZG
YZG
12
12
3000
3000
180.0
179.0
8.4
2.38
2.45
1.8
1.9
0.69
0.8
4.0
4.0
8.0
8.0
Q2
Q1
14.4
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
9-Aug-2022
TAPE AND REEL BOX DIMENSIONS
Width (mm)
H
W
L
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
CSD86311W1723
CSD86311W1723
DSBGA
DSBGA
YZG
YZG
12
12
3000
3000
182.0
199.0
182.0
211.0
20.0
35.0
Pack Materials-Page 2
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,
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o
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e
xas Instruments, Post Office Box 655303, Dallas,
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e
xas Instruments Incorporated
