TOSHIBA-TPH2R608NH-L1Q-M

Part #TOSHIBA-TPH2R608NH-L1Q-M
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TOSHIBA-TPH2R608NH-L1Q-M
TPH2R608NH  
MOSFETs Silicon
 
N-channel MOS (U-MOS
-H)  
TPH2R608NH  
1. Applications  
•
High-Efficiency DC-DC Converters  
•
Switching Voltage Regulators  
2. Features  
(1) High-speed
 
switching  
(2) Small
 
gate charge: Q
SW
= 28 nC (typ.)  
(3) Low
 
drain-source on-resistance: R
DS(ON)
= 2.1 m
Ω
(typ.) (V
GS
= 10 V)  
(4) Low
 
leakage current: I
DSS
= 10
µ
A (max) (V
DS
= 75 V)  
(5) Enhancement
 
mode: V
th
= 2.0 to 4.0 V (V
DS
= 10 V, I
D
= 1.0 mA)  
3. Packaging
 
and Internal Circuit  
1, 2, 3: Source  
4: Gate  
5, 6, 7, 8: Drain  
SOP Advance  
4. Absolute
 
Maximum Ratings (Note) (T
a
= 25
unless otherwise specified)  
Characteristics  
Symbol  
Rating  
Unit  
V
Drain-source voltage  
Gate-source voltage  
Drain current (DC)  
Drain current (DC)  
Drain current (pulsed)  
Power dissipation  
Power dissipation  
Power dissipation  
V
DSS  
V
GSS  
I
D  
75  
±
20  
(Note 1)  
(Note 1), (Note 2)  
(Note 1)  
150  
A
A
(Silicon limit)  
(t = 100
µ
s)  
(T
c
= 25
)  
I
D  
168  
I
DP  
P
D  
500  
A
142  
W
W
W
mJ  
A
(Note 3)  
(Note 4)  
(Note 5)  
(Note 5)  
P
D  
2.5  
P
D  
0.8  
Single-pulse avalanche energy  
Single-pulse avalanche current  
Channel temperature  
E
AS  
I
AS  
149  
120  
T
ch  
T
stg  
150  
Storage temperature  
-55 to 150  
Note: Using
 
continuously under heavy loads (e.g. the application of high temperature/current/voltage and the  
significant change in temperature, etc.) may cause this product to decrease in the reliability significantly even  
if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute maximum  
ratings.  
Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook  
(“Handling Precautions”/”Derating Concept and Methods”) and individual reliability data (i.e. reliability test  
report and estimated failure rate, etc).  
Start of commercial production  
2014-12  
©2019  
Toshiba Electronic Devices & Storage Corporation  
2019-10-18  
Rev.3.0  
1

TPH2R608NH  
5. Thermal
 
Characteristics  
Characteristics  
Symbol  
Max  
Unit  
Channel-to-case thermal resistance  
Channel-to-ambient thermal resistance  
Channel-to-ambient thermal resistance  
(T
c
= 25
)  
(T
a
= 25
)  
(T
a
= 25
)  
R
th(ch-c)  
R
th(ch-a)  
R
th(ch-a)  
0.88  
50  
/W  
(Note 3)  
(Note 4)  
156  
Note 1: Ensure that the channel temperature does not exceed 150
.  
Note 2: Limited by package limit. Silicon chip capability is 168 A. (T
c
= 25
)  
Note 3: Device mounted on a glass-epoxy board (a), Figure 5.1  
Note 4: Device mounted on a glass-epoxy board (b), Figure 5.2  
Note 5: V
DD
= 60 V, T
ch
= 25
(initial), L = 0.008 mH, I
AS
= 120 A  
Fig. 5.1
 
Device Mounted on a Glass-Epoxy  
Board (a)  
Fig. 5.2
 
Device Mounted on a Glass-Epoxy  
Board (b)  
Note: This
 
transistor is sensitive to electrostatic discharge and should be handled with care.  
©2019  
Toshiba Electronic Devices & Storage Corporation  
2019-10-18  
Rev.3.0  
2

TPH2R608NH  
6. Electrical
 
Characteristics  
6.1. Static
 
Characteristics (T
a
= 25
unless otherwise specified)  
Characteristics  
Symbol  
Test Condition  
Min  
Typ.  
Max  
Unit  
Gate leakage current  
I
GSS  
I
DSS  
V
GS
=
±
20 V, V
DS
= 0 V  
2.1  
±
0.1  
10  
µ
A  
Drain cut-off current  
V
DS
= 75 V, V
GS
= 0 V  
Drain-source breakdown voltage  
V
(BR)DSS
I
D
= 10 mA, V
GS
= 0 V  
V
(BR)DSX
I
D
= 10 mA, V
GS
= -20 V  
75  
55  
2.0  
V
Gate threshold voltage  
V
th  
V
DS
= 10 V, I
D
= 1.0 mA  
V
GS
= 10 V, I
D
= 50 A  
4.0  
2.6  
Drain-source on-resistance  
R
DS(ON)  
m
Ω  
6.2. Dynamic
 
Characteristics (T
a
= 25
unless otherwise specified)  
Characteristics  
Input capacitance  
Symbol  
Test Condition  
Min  
Typ.  
Max  
Unit  
pF  
C
iss  
C
rss  
C
oss  
r
g  
V
DS
= 37.5 V, V
GS
= 0 V, f = 1 MHz  
4600  
50  
6000  
95  
Reverse transfer capacitance  
Output capacitance  
1100  
1.0  
11  
Gate resistance  
1.5  
Ω
Switching time (rise time)  
Switching time (turn-on time)  
Switching time (fall time)  
Switching time (turn-off time)  
t
r  
See Fig. 6.2.1  
ns  
t
on  
t
f  
30  
15  
t
off  
56  
V
DD
≈
37.5 V  
V
GS
= 0 V/ 10 V  
I
D
= 50 A  
R
L
= 0.75
Ω  
R
GG
= 4.7
Ω  
R
GS
= 4.7
Ω  
Duty
≤
1 %, t
w
= 10
µ
s  
Fig. 6.2.1
 
Switching Time Test Circuit  
6.3. Gate
 
Charge Characteristics (T
a
= 25
unless otherwise specified)  
Characteristics  
Symbol  
Q
g  
Test Condition  
Min  
Typ.  
72  
Max  
Unit  
nC  
Total gate charge (gate-source plus  
gate-drain)  
V
DD
≈
37.5 V, V
GS
= 10 V, I
D
= 50 A  
Gate-source charge 1  
Gate-drain charge  
Gate switch charge  
Q
gs1  
Q
gd  
24  
18  
28  
Q
SW  
6.4. Source-Drain
 
Characteristics (T
a
= 25
unless otherwise specified)  
Characteristics  
Symbol  
Test Condition  
Min  
Typ.  
Max  
500  
Unit  
A
Reverse drain current (pulsed)  
(Note 6)  
I
DRP  
(t = 100
µ
s)  
Diode forward voltage  
V
DSF  
I
DR
= 150 A, V
GS
= 0 V  
-1.2  
V
Note 6: Ensure that the channel temperature does not exceed 150
.  
©2019  
Toshiba Electronic Devices & Storage Corporation  
2019-10-18  
Rev.3.0  
3

TPH2R608NH  
7. Marking  
Fig. 7.1
 
Marking  
©2019  
2019-10-18  
Rev.3.0  
4
Toshiba Electronic Devices & Storage Corporation  

TPH2R608NH  
8. Characteristics
 
Curves (Note)  
Fig. 8.1
 
I
D
– V
DS  
Fig. 8.2
 
I
D
– V
DS  
Fig. 8.3
 
I
D
– V
GS  
Fig. 8.4
 
V
DS
– V
GS  
Fig. 8.5
 
R
DS(ON)
– I
D  
Fig. 8.6
 
R
DS(ON)
– T
a  
©2019  
2019-10-18  
Rev.3.0  
5
Toshiba Electronic Devices & Storage Corporation  

TPH2R608NH  
Fig. 8.7
 
I
DR
– V
DS  
Fig. 8.8
 
Capacitance – V
DS  
Fig. 8.9
 
V
th
– T
a  
Fig. 8.10
 
Dynamic Input/Output Characteristics  
Fig. 8.11
 
P
D
– T
a  
Fig. 8.12
 
P
D
– T
c  
(Guaranteed Maximum)  
(Guaranteed Maximum)  
©2019  
Toshiba Electronic Devices & Storage Corporation  
2019-10-18  
Rev.3.0  
6

TPH2R608NH  
Fig. 8.13
 
r
th
– t
w  
(Guaranteed Maximum)  
Fig. 8.14
 
Safe Operating Area  
(Guaranteed Maximum)  
Note: The
 
above characteristics curves are presented for reference only and not guaranteed by production test,  
unless otherwise noted.  
©2019  
Toshiba Electronic Devices & Storage Corporation  
2019-10-18  
Rev.3.0  
7

TPH2R608NH  
Package Dimensions  
Unit: mm  
Weight: 0.087 g (typ.)  
Package Name(s)  
TOSHIBA: 2-5Q1S  
Nickname: SOP Advance  
©2019  
Toshiba Electronic Devices & Storage Corporation  
2019-10-18  
Rev.3.0  
8

TPH2R608NH  
RESTRICTIONS ON PRODUCT USE  
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Hardware, software and systems described in this document are collectively referred to as “Product”.  
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This document and any information herein may not be reproduced without prior written permission from TOSHIBA. Even with TOSHIBA’s  
written permission, reproduction is permissible only if reproduction is without alteration/omission.  
•
Thoug
h
T
OSHIB
A
w
ork
s
c
ontinuall
y
t
o
i
mprov
e
P
roduct’
s
q
ualit
y
a
n
d
r
eliability
,
P
roduc
t
c
a
n
m
alfunctio
n
o
r
f
ail
.
C
ustomer
s
a
r
e
r
esponsible  
for complying with safety standards and for providing adequate designs and safeguards for their hardware, software and systems which  
minimize risk and avoid situations in which a malfunction or failure of Product could cause loss of human life, bodily injury or damage  
to property, including data loss or corruption. Before customers use the Product, create designs including the Product, or incorporate  
the Product into their own applications, customers must also refer to and comply with (a) the latest versions of all relevant TOSHIBA  
information, including without limitation, this document, the specifications, the data sheets and application notes for Product and the  
precautions and conditions set forth in the “TOSHIBA Semiconductor Reliability Handbook” and (b) the instructions for the application  
with which the Product will be used with or for. Customers are solely responsible for all aspects of their own product design or applications,  
including but not limited to (a) determining the appropriateness of the use of this Product in such design or applications; (b) evaluating  
and determining the applicability of any information contained in this document, or in charts, diagrams, programs, algorithms, sample  
application circuits, or any other referenced documents; and (c) validating all operating parameters for such designs and applications.  
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PRODUCT IS NEITHER INTENDED NOR WARRANTED FOR USE IN EQUIPMENTS OR SYSTEMS THAT REQUIRE  
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AS A RESULT OF NONCOMPLIANCE WITH APPLICABLE LAWS AND REGULATIONS.  
©2019  
2019-10-18  
Rev.3.0  
9
Toshiba Electronic Devices & Storage Corporation