Truesemi-TSU5N60M
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TSD5N60M/TSU5N60M
600V N-Channel MOSFET
General Description
Features
This Power MOSFET is produced using
Truesemi‘s
advanced planar stripe DMOS technology.
• 4.5A,600V,Max.R
DS(on)
=2.5 Ω @ V
GS
=10V
• Low gate charge(typical
12nC)
• High ruggedness
• Fast switching
• 100% avalanche tested
• Improved dv/dt capability
This advanced technology has been especially tailored to
minimize on-state resistance, provide superior switching
performance, and withstand
high energy pulse in
the
avalanche and commutation mode. These devices are well
suited for high efficiency switched mode power supplies,
active power factor correction based on
half bridge
topology.
Absolute Maximum Ratings
T
C
=25
℃
unless otherwise specified
Symbol
V
DSS
Parameter
Value
600
Units
V
Drain-Source Voltage
Gate-Source Voltage
V
GS
V
± 30
4.5
T
C
= 25
℃
T
C
= 100
℃
(Note 1)
(Note 2)
(Note 1)
(Note 3)
A
I
D
Drain Current
A
2.7
I
DM
E
AS
Pulsed Drain Current
A
18.0
210
Single Pulsed Avalanche Energy
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt
mJ
mJ
V/ns
W
E
AR
4.8
dv/dt
4.5
48
Power Dissipation (T
C
= 25
℃
)
-Derate above 25
℃
P
D
T
J
, T
STG
T
L
W/
℃
℃
0.38
-55 to +150
Operating and Storage Temperature Range
Maximum lead temperature for soldering purposes,
1/8” from case for 5 seconds
℃
300
* Drain current limited by maximum junction temperature.
Thermal Resistance
Characteristics
Symbol
Parameter
Max
2.6
Units
R
θJC
Thermal Resistance,Junction-to-Case
℃
/W
Thermal Resistance,Junction-to-Ambient*
Thermal Resistance,Junction-to-Ambient
50
℃
/W
℃
/W
R
θJA
R
θJA
110
© 201
8
Truesemi Semiconductor
Corporation
Ver.C1
Electrical Characteristics
T
C
=25
℃
unless otherwise specified
Symbol
Parameter
Test Conditions
Min
Typ
Max Units
On Characteristics
V
GS
V
DS
= V
GS
, I
D
= 250 uA
㎂
Gate Threshold Voltage
3.0
—
—
5.0
2.5
V
Static Drain-Source
On-Resistance
R
DS(ON)
V
GS
= 10 V, I
D
=2.25A
2.0
Ω
Off Characteristics
BV
DSS
V
GS
= 0 V, I
D
= 250 uA
㎂
Drain-Source Breakdown Voltage
600
—
—
—
—
V
Breakdown Voltage Temperature
Coefficient
△
BVDSS
/
△
TJ
ID = 250 uA, Referenced to 25
℃
0.6
V/
℃
V
DS
= 600 V, V
GS
= 0 V
V
DS
= 480 V, T
J
= 125
℃
V
GS
= 30 V, V
DS
= 0 V
V
GS
=- 30 V, V
DS
= 0 V
—
—
—
—
—
—
—
—
1
uA
I
DSS
Zero Gate Voltage Drain Current
10
uA
I
GSSF
I
GSSR
Gate-Body Leakage Current,Forward
Gate-Body Leakage Current,Reverse
100
-100
nA
㎁
nA
㎁
Dynamic Characteristics
C
iss
C
oss
C
rss
Input Capacitance
—
—
—
560
55
7
—
—
—
pF
㎊
pF
㎊
pF
V
DS
= 25 V, V
GS
= 0 V,
f = 1.0 MHz
Output Capacitance
Reverse Transfer Capacitance
Switching Characteristics
t
d(on)
t
r
t
d(off)
t
f
Turn-On Time
—
—
—
—
—
—
—
10
40
40
50
12
2.0
6.0
—
—
—
—
—
—
—
ns
V
DS
= 300 V, I
D
= 4.5A,
R
G
= 25 Ω
Turn-On Rise Time
Turn-Off Delay Time
Turn-Off Fall Time
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
ns
㎱
ns
㎱
ns
㎱
nC
(Note 4,5)
Q
g
Q
gs
Q
gd
V
DS
= 480 V,
I
D
= 4.5A,
V
GS
= 10 V
nC
(Note 4,5)
nC
Source-Drain Diode Maximum Ratings and Characteristics
I
S
I
SM
V
SD
t
rr
Continuous Source-Drain Diode Forward Current
Pulsed Source-Drain Diode Forward Current
—
—
—
—
—
—
4.5
18.0
1.4
—
A
I
S
=4.5A, V
GS
= 0 V
Source-Drain Diode Forward Voltage
Reverse Recovery Time
—
V
300
ns
㎱
I
S
=4.5A, V
GS
= 0 V
di
F
/dt = 100 A/
μ
s
(Note 4)
Reverse Recovery Charge
—
2.0
—
uC
Q
rr
NOTES:
1. Repetitive Rating: Pulse width limited by maximum junction temperature
2. L=19mH,I
AS
=4.5A, V
DD
=50V, R
G
=25
Ω,
Starting TJ=25
℃
3. I
SD
≤4.5A, di/dt ≤ 200A/us, V
DD
≤ BV
DSS
, Starting TJ = 25
℃
4. Pulse Test: Pulse width ≤ 300us, Duty Cycle ≤ 2%
5. Essentially Independent of Operating Temperature Typical Characteristics
© 201
8
Truesemi Semiconductor
Corporation
Ver.C1
Typical Characteristics
Figure 2. Transfer Characteristics
Figure 1. On-Region Characteristics
Figure 4. Body Diode Forward Voltage
Variation with Source Current
and Temperature
Figure 3. On-Resistance Variation vs
Drain Current and Gate Voltage
Figure 6. Gate Charge Characteristics
Figure 5. Capacitance Characteristics
© 201
8
Truesemi Semiconductor
Corporation
Ver.C1
Typical Characteristics
Figure 8. On-Resistance Variation
vs Temperature
Figure 7. Breakdown Voltage Variation
vs Temperature
Figure 9. Maximum Safe Operating Area
Figure 10. Maximum Drain Current
vs Case Temperature
Figure 11. Transient Thermal Response Curve
© 201
8
Truesemi Semiconductor
Corporation
Ver.C1
Fig 12.
Gate Charge Test Circuit
& Waveform
V
GS
Same Type
50K
Ω
as DUT
Q
g
12V
200nF
10V
300nF
V
DS
V
GS
Q
gs
Q
gd
DUT
3mA
Charge
Fig 13.
Resistive Switching Test Circuit
& Waveforms
R
L
V
DS
90%
V
DS
V
DD
R
G
( 0.5 rated V
DS
)
10%
V
in
DUT
10V
t
d(on)
t
r
t
d(off)
t
f
t
on
t
off
Fig 14.
Unclamped Inductive Switching Test Circuit
& Waveforms
L
1
2
2
—-
E
AS
=
L
L
I
AS
V
DS
V
DD
BV
DSS
I
AS
I
D
R
G
I
D
(t)
DUT
V
DD
V
DS
(t)
10V
t
p
Time
© 201
8
Truesemi Semiconductor
Corporation
Ver.C1
Fig 15.
Peak Diode Recovery dv/dt Test Circuit
& Waveforms
DUT
+
V
DS
_
I
S
L
Driver
R
G
Same Type
as DUT
V
DD
V
GS
• dv/dt controlled by
R
G
• I
S
controlled by pulse period
Gate Pulse Width
————————–
V
GS
D =
Gate Pulse Period
10V
( Driver )
I
FM
, Body Diode Forward Current
I
S
di/dt
( DUT )
I
RM
Body Diode Reverse Current
Body Diode Recovery dv/dt
V
f
V
DS
( DUT )
V
DD
Body Diode
Forward Voltage Drop
© 201
8
Truesemi Semiconductor
Corporation
Ver.C1
