UMW-Youtai-Semiconductor-Co—Ltd–AOD4185-UMW

Part #UMW-Youtai-Semiconductor-Co—Ltd–AOD4185-UMW
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UMW-Youtai-Semiconductor-Co—Ltd–AOD4185-UMW
R
UMW  
AOD4185  
P-Channel MOSFET  
●
V
DS (V)
=-40V  
●
I
D
= -40A  
●
R
DS(ON)
<
15m
Ω
(V
GS
=-10V)  
●
R
DS(ON)
<
20m
Ω
(V
GS
=-4.5V)  
General Description  
The AOD4185 uses advanced trench technology to  
provide excellent R

DS(ON)

and low gate charge. With the  
excellent thermal resistance of the DPAK/IPAK  
package, this device is well suited for high current  
applications.  
D
G
S
Absolute Maximum Ratings
 
T

C

=25
°
C
u
nless otherwise noted  
P
P
a
a
r
r
a
a
m
m
e
e
t
t
e
e
r
r
S
S
y
y
m
m
b
b
o
o
l
l
M
M
a
a
x
x
i
i
m
m
u
u
m
m
Units  
Units  
Drain-Source Voltage  
Gate-Source Voltage  
Continuous Drain  
Current

B,H  

Pulsed Drain Current

C  

Avalanche Current

C  

V

DS  

V

GS  

-40  
±20  
-40  
-31  
V
V
T

C

=25
°
C  
T

C

=100
°
C  
I

D  

A
I

DM  

I

AR  

E

AR  

-115  
-42  
88  
Repetitive avalanche energy L=0.1mH

C  

mJ  
W
T

C

=25
°
C  
62.5  
31  
P

D  

Power Dissipation

B  

T

C

=100
°
C  
T

A

=25
°
C  
2.5  
1.6  
P

DSM  

T

J

, T

STG  

Power Dissipation

A  

T

A

=70
°
C  
Junction and Storage Temperature Range  
-55 to 175  
°C  
Thermal Characteristics  
Parameter  
Symbol  
Typ  
15  
41  
2
Max  
Units  
°
C
/W  
°
C
/W  
°
C
/W  
Maximum Junction-to-Ambient

A,G  

t
≤
10s  
20  
50  
2.4  
R

θ
JA  

Maximum Junction-to-Ambient

A,G  

Maximum Junction-to-Case

D,F  

Steady-State  
Steady-State  
R

θ
JC  

1
UTD Semiconductor Co.,Limited  

R
UMW  
AOD4185  
P-Channel MOSFET  
Electrical Characteristics (T

J

=25
°
C
u
nless otherwise noted)  
Symbol  
Parameter  
Conditions  
Min  
Typ  
Max  
Units  

STATIC PARAM

ETERS  
I

D

=-250
µ
A, V

GS

=0V  

BV

DSS  

Drain

-Source Breakdown Voltage  
-40  
V
V

DS

=-40V, V

GS

=0V  
-1  
-5  
I

DSS  

Zero Gate Voltage Drain Current  
µ
A
 
T

J

=55
°
C  
V

DS

=0V, V

GS

= ±20V  
V

DS

=V

GS

I

D

=-250
µ
A  
V

GS

=-10V, V

DS

=-5V  
I

GSS  

Gate-Body leakage current  
Gate Threshold Voltage  
On state drain current  
±100  
-3  
nA  
V
V

GS(th)  

I

D(ON)  

-1.7  
-1.9  
-115  
A
V

GS

=-10V, I

D

=-20A  
12.5  
15  
20  
R

DS(ON)  

Static Drain-Source On-Resistance  
m
Ω  
V

GS

=-4.5V, I

D

=-15A  
V

DS

=-5V, I

D

=-20A  
I

S

=-1A,V

GS

=0V  
16  
50  
g

FS  

V

SD  

I

S  

Forward Transconductance  
Diode Forward Voltage  
S
V
A
-0.72  
-1  
Maximum Body-Diode Continuous Current  
-20  
DYNAMIC PARAMETERS  
C

iss  

C

oss  

C

rss  

R

g  

Input Capacitance  
2550  
280  
190  
4
pF  
pF  
pF  
Ω
V

GS

=0V, V

DS

=-20V, f=1MHz  

GS

=0V, V

DS

=0V, f=1MHz  
Output Capacitance  
Reverse Transfer Capacitance  
Gate resistance  
V
2.5  
6
SWITCHING PARAMETERS  
Q

g

(-10V) Total
 
Gate Charge  
Q

g

(-4.5V) Total Gate Charge  
42  
18.6  
7
55  
nC  
V

GS

=-10V, V

DS

=-20V,  
I

D

=-20A  
Q

gs  

Q

gd  

Gate Source Charge  
Gate Drain Charge  
nC  
nC  
8.6  
t

r  

Turn-On Rise Time  
Turn-Off DelayTime  
Turn-Off Fall Time  
V

GS

=-10V, V

DS

=-20V, R

L

=1
Ω
,  
20  
55  
30  
38  
47  
ns  
ns  
ns  
R

GEN

=3
Ω  
t

D(off)  

t

f  

t

rr  

I

F

=-20A, dI/dt=100A/
µ
s  
I

F

=-20A, dI/dt=100A/
µ
s  
49  
Body Diode Reverse Recovery Time  
Body Diode Reverse Recovery Charge  
ns  
Q

rr  

nC  
A: The value of R

θ
JA

is measured with the device in a still air environment with T

A

=25
°
C. The power dissipation P

DSM

and current rating I

DSM

are  
based on T

J(MAX)

=150
°
C, using steady state junction-to-ambient thermal resistance.  
B. The power dissipation P

D

is based on T

J(MAX)

=175
°
C, using junction-to-case thermal resistance, and is more useful in setting the upper  
dissipation limit for cases where additional heatsinking is used.  
C: Repetitive rating, pulse width limited by junction temperature T

J(MAX)

=175
°
C.  
D. The R

θ
JA

is the sum of the thermal impedence from junction to case R

θ
JC

and case to ambient.  
E. The static characteristics in Figures 1 to 6 are obtained using <300
µ
s pulses, duty cycle 0.5% max.  
F. These curves are based on the junction-to-case thermal impedence which is measured with the device mounted to a large heatsink, assuming a  
maximum junction temperature of T

J(MAX)

=175
°
C. The SOA curve provides a single pulse rating.  
G. These tests are performed with the device mounted on 1 in

2

FR-4 board with 2oz. Copper, in a still air environment with T

A

=25
°
C.  
H. The
 
maximum current rating is limited by bond-wires.  
2
UTD Semiconductor Co.,Limited  

R
UMW  
AOD4185  
P-Channel MOSFET  
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS  
120  
80  
60  
40  
20  
0
100  
V

DS

=-5V  
-6.0V  
-10V  
-4.5V  
-4.0V  
80  
60  
40  
20  
0
`
125
°
C  
V

GS

=-3.5V  
25
°
 
0
1
2
3
4
5
1.5  
2
2.5  
3
3.5  
4
4.5  
5
-V

DS

(Volts)  
-V

GS

(Volts)  
Figure 1: On-Region Characteristics  
Figure 2: Transfer Characteristics  
24  
2
1.8  
1.6  
1.4  
1.2  
1
22  
20  
18  
16  
14  
12  
1
0  
V

GS

=-10V  
I

D

=-20A  
V

GS

=-4.5V  
V

GS

=-10V  
V

GS

=-4.5V  
I

D

=-15A  
0.8  
0
.
6  
0  
1
0  
2
0  
3
0  
4
0
5
0
6
0
–
50 75
 
100
1
2
5
1
5
0
1
7
5
2
0
0
-I

D

(A)  
Temperature (
°
C
)  
Figure 4: On-Resistance vs. Junction Temperature  
Figure 3: On-Resistance vs. Drain Current and  
Gate Voltage  
100  
45  
40  
35  
30  
25  
20  
15  
10  
I

D

=-20A  
10  
1
0.1  
125
°
C  
125
°
C  
25
°
C  
0.01  
25
°
C  
0.001  
0.0001  
0.00001  
3
4
5
6
7
8
9
10  
0.0  
0.2  
0.4  
-V

SD

(Volts)  
Figure 6: Body-Diode Characteristics  
0.6  
0.8  
1.0  
1.2  
-V

GS

(Volts)  
Figure 5: On-Resistance vs. Gate-Source Voltage  
3
UTD Semiconductor Co.,Limited  

R
UMW  
AOD4185  
P-Channel MOSFET  
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS  
3500  
10  

V

=-
20V  

I

=-20
A  
3000  
2500  
2000  
1500  
1000  
500  
C

iss  

6
4
C

rss  

2
C

oss  

0
0
0
5
10  
15  
-V

DS

(Volts)  
Figure 8: Capacitance Characteristics  
20  
25  
30  
35  
40  
0
5
10  
15  
20  
Q

g

(nC)  
Figure 7: Gate-Charge Characteristics  
25  
30  
35  
40  
45  
10000  
1000  
100  
1000  
100  
10  
T

J(Max)

=175
°
 
C
10
µ
s  
R

DS(ON)  

limited  
100
µ
s  
1ms  
10ms  
1
DC  
T

J(Max)

=175
°
C  
T

C

=
2
5
°
C  
0
.
1  
1
0  
0
.
1  
1  
1
0  
1
0
0  
0.00001 0.0001  
0
.
0
0
1
0
.
0
1
0
.
1
1
-V

DS

(Volts)  
Pulse Width (s)  
Figure 10: Single Pulse Power Rating Junction-to-  
Case (Note F)  
Figure 9: Maximum Forward Biased  
Safe Operating Area (Note F)  
10  
D=T

on

/T  
T

J,PK

=T

c

+P

DM

.Z

θ
JC

.R

θ
JC  

In descending order  
D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse  
R

θ
JC

=2.4
°
C/W  
1
0.1  
P

D  

T

on  

T
Single Pulse  
0.01  
0.00001  
0.0001  
0.001  
Pulse Width (s)  
Figure 11: Normalized Maximum Transient Thermal Impedance (Note F)  
0.01  
0.1  
1
4
UTD Semiconductor Co.,Limited  

R
UMW  
AOD4185  
P-Channel MOSFET  
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS  
70  
50  
40  
30  
20  
10  
0
50  
40  
30  
20  
10  
0
0
25  
50  
75  
T

CASE

(
°
C)  
Figure 12: Power De-rating (Note B)  
100  
125  
150  
175  
0
25  
50  
75  
100  
125  
150  
175  
T

CASE

(
°
C)  
Figure 13: Current De-rating (Note B)  
10000  
T

J(Max)

=150
°  
C
1000  
100  
10  
1  
0.0001  
0.001  
0.01  
0.1  
Pulse Width (s)  
1
10  
100  
1000  
Figure 14: Single Pulse Power Rating Junction-to-Ambient (Note G)  
10  
1
D=T

on

/T  
T

J,PK

=T

A

+P

DM

.Z

θ
JA

.R

θ
JA  

θ
JA

=50
°
C/W  
In descending order  
D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse  
R
0.1  
P

D  

0.01  
T

on  

T
Single Pulse  
0.001  
0.00001  
0.0001  
0.001  
0.01  
Pulse Width (s)  
Figure 15: Normalized Maximum Transient Thermal Impedance (Note G)  
0.1  
1
10  
100  
1000  
5
UTD Semiconductor Co.,Limited  

R
UMW  
AOD4185  
P-Channel MOSFET  
Gate Charge Test Circuit & Waveform  
Vgs  
Qg  
–
-10V  
–
VDC  
Qgs  
Qgd  
+
Vds  
VDC  
+
DUT  
Vgs  
Ig  
Charge  
Resistive Switching Test Circuit & Waveforms  
RL  
Vds  
t

off  

t

on  

t
t

d(off)  

t

d(on)  

t
r
f
Vgs  
–
90%  
10%  
DUT  
Vdd  
Vgs  
VDC  
+
Rg  
Vgs  
Vds  
Unclamped Inductive Switching (UIS) Test Circuit & Waveforms  
E

A

A

= 1/2
L
L
I

A  

I

2

2  

R
R
R  
L
V
Vds  
Vds  
Id  
Vgs  
–
BV

DSS  

Vgs  
Vdd  
VDC  
+
Id  
Rg  
I

AR  

DUT  
Vgs  
Vgs  
Diode Recovery Test Circuit & Waveforms  
Q

rr

= –
 
Idt  
Vds +  
DUT  
Vgs  
t

rr  

Vds –  
L
-Isd  
-I

F  

Isd  
Vgs  
dI/dt  
-I

RM  

+
Vdd  
VDC  
Vdd  
–
-Vds  
Ig  
6
UTD Semiconductor Co.,Limited  

R
UMW  
AOD4185  
P-Channel MOSFET  

Package M

echanical Data  
TO-252  
E
A
B2  
Dimensions  
C2  
V 1  
Ref.  
Millimeters  
Typ.  
Inches  
Typ.  
Min.  
2.10  
0
Max.  
Min.  
0.083  
0
Max.  
0.098  
0.004  
0.034  
0.216  
0.024  
0.023  
0.248  
2.50  
0.10  
0.86  
5.48  
0.60  
0.58  
6.30  
A
A2  
B
0.66  
5.18  
0.40  
0.44  
5.90  
0.026  
0.202  
0.016  
0.017  
0.232  
B2  
C
C2  
D
C
B
G
5.30REF  
0.209REF  
D1  
E
DETAIL A  
6.40  
4.63  
4.47  
9.50  
1.09  
1.35  
6.80  
0.252  
0.182  
0.176  
0.374  
0.043  
0.053  
0.268  
V1  
E1  
G
4.67  
10.70  
1.21  
0.184  
0.421  
0.048  
0.065  
V 2  
H
L
V1  
1.65  
L2  
V1  
V2  
E1  
L2  
7°  
7°  
DETAIL A  
0°  
6°  
0°  
6°  
Marking  
Ordering information  
Package  
TO-252  
Deliverymode  
reel  
Baseqty  
2500  
Order code  
Tape and  
UMW AOD4185  
7
UTD Semiconductor Co.,Limited