VBsemi-Elec-2SK3667-VB
| Part # | VBsemi-Elec-2SK3667-VB |
Download  | VBsemi-Elec-2SK3667-VB |
2SK3667
/ꢀ$IBOOFMꢁꢂꢃꢄ7ꢁꢅ%ꢀ4ꢆ
Power MOSFET
FEATURES
• Low figure-of-merit (FOM) R
on
x Q
g
• Low input capacitance (C
iss
• Reduced switching and conduction losses
• Ultra low gate charge (Q
g
)
PRODUCT SUMMARY
V
DS
(V) at T
J
max.
R
DS(on)
max. at 25 °C (
Ω
)
Q
g
max. (nC)
ꢁꢂ
0
)
V
GS
= 10 V
0
.
82
57
4.0
Q
gs
(nC)
• Avalanche energy rated (UIS)
Q
gd
(nC)
5.4
Configuration
Single
APPLICATIONS
• Server and telecom power supplies
• Switch mode power supplies (SMPS)
• Power factor correction power supplies (PFC)
• Lighting
– High-intensity discharge (HID)
– Fluorescent ballast lighting
• Industrial
D
TO-220 FULLPAK
G
S
S
D
G
N-Channel MOSFET
Top
V
ie
w
ABSOLUTE MAXIMUM RATINGS
(T
C
= 25 °C, unless otherwise noted)
PARAMETER
SYMBOL
LIMIT
650
30
UNIT
Drain-Source Voltage
Gate-Source Voltage
V
DS
V
V
GS
T
C
= 25 °C
1
0
8
Continuous Drain Current (T
J
= 150 °C)
V
GS
at 10 V
I
D
T
C
= 100 °C
A
Pulsed Drain Current
a
I
DM
35
ꢀꢃꢁꢄꢅꢀꢃꢂꢅꢆꢃꢇ
Linear Derating Factor
Single Pulse Avalanche Energy
b
W/°C
mJ
W
E
AS
P
D
ꢈꢁ
Maximum Power Dissipation
178/156/53
-55 to +150
ꢂꢆ
Operating Junction and Storage Temperature Range
Drain-Source Voltage Slope
Reverse Diode dV/dt
d
T
J
, T
stg
°C
T
J
= 125 °C
for 10 s
dV/dt
V/ns
°C
ꢉꢃꢂ
Soldering Recommendations (Peak Temperature)
c
300
Notes
a. Repetitive
rating; pulse width limited by maximum junction temperature.
b. V
DD
= 50 V, starting T
J
= 25 °C, L = 28.2 mH, R
g
= 25
Ω
, I
AS
= 3.5 A.
c. 1.6
mm from case.
d. I
SD
≤
I
D
, dI/dt = 100 A/μs, starting T
J
= 25 °C.
服务热线：400-655-8788
ꢀ
2SK3667
THERMAL RESISTANCE RATINGS
PARAMETER
SYMBOL
TYP.
MAX.
63
UNIT
Maximum Junction-to-Ambient
Maximum Junction-to-Case (Drain)
R
thJA
R
thJC
–
–
°C/W
0.6
SPECIFICATIONS
(T
J
= 25 °C, unless otherwise noted)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN.
TYP.
MAX. UNIT
Static
Drain-Source Breakdown Voltage
V
DS
Temperature Coefficient
Gate-Source Threshold Voltage (N)
V
DS
V
GS
= 0 V, I
D
= 250 μA
Reference to 25 °C, I
D
= 1 mA
V
DS
= V
GS
, I
D
= 250 μA
650
–
–
–
V
V/°C
V
Δ
V
DS
/T
J
V
GS(th)
–
2
–
–
–
–
–
–
0.65
–
4
V
GS
V
GS
=
=
20 V
30 V
–
–
100
1
nA
μA
Gate-Source Leakage
I
GSS
V
DS
= 650 V, V
GS
= 0 V
DS
= 520 V, V
GS
= 0 V, T
J
= 125 °C
V
GS
= 10 V
I
D
= 4 A
V
DS
= 30 V, I
D
= 4 A
–
1
Zero Gate Voltage Drain Current
I
DSS
μA
V
–
10
–
Drain-Source On-State Resistance
Forward Transconductance
R
DS(on)
g
fs
Ω
0.
82
ꢀꢁ
–
S
Dynamic
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
C
iss
C
oss
C
rss
–
–
–
–
–
–
1900
V
GS
= 0 V,
V
DS
= 100 V,
f = 1 MHz
0
40
240
pF
nC
Effective Output Capacitance, Energy
Related
a
45
C
o(er)
C
o(tr)
–
–
–
–
V
DS
= 0 V to 520 V, V
GS
= 0 V
Effective Output Capacitance, Time
Related
b
62
40
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
Turn-On Delay Time
Rise Time
Q
g
Q
gs
Q
gd
t
d(on)
t
r
–
–
–
–
–
–
–
–
57
–
V
GS
= 10 V
I
D
=
4
A, V
DS
= 520 V
0
4.
5.4
–
–
2
5
55
–
V
DD
= 520 V, I
D
= 4 A,
V
GS
= 10 V, R
g
= 9.1
Ω
ns
–
Turn-Off Delay Time
Fall Time
t
d(off)
t
f
70
40
–
Gate Input Resistance
R
g
f = 1 MHz, open drain
3.5
–
Ω
Drain-Source Body Diode Characteristics
MOSFET symbol
showing the
integral reverse
p – n junction diode
D
Continuous Source-Drain Diode Current
I
S
–
–
–
–
7
A
G
Pulsed Diode Forward Current
I
SM
S
18
Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
Reverse Recovery Current
V
SD
t
rr
T
J
= 25 °C, I
S
= 4 A, V
GS
= 0 V
–
–
–
–
–
1.5
V
ns
μC
A
190
2.3
–
–
–
T
J
= 25 °C, I
F
= I
S
= 4 A,
dI/dt = 100 A/μs, V
R
= 400 V
Q
rr
I
RRM
10
Notes
a. C
oss(er)
is a fixed capacitance that gives the same energy as C
oss
while V
DS
is rising from 0 % to 80 % V
DSS
.
b. C
oss(tr)
is a fixed capacitance that gives the same charging time as C
oss
while V
DS
is rising from 0 % to 80 % V
DSS
.
服务热线：400-655-8788
ꢊ
2SK3667
TYPICAL CHARACTERISTICS
(25 °C, unless otherwise noted)
3
2.5
2
50
TOP
15 V
14 V
13 V
12 V
11 V
10 V
9 V
8 V
7 V
6 V
I
D
= 4 A
T
J
= 25 °C
40
30
20
10
0
BOTTOM 5
V
1.5
1
V
GS
= 10 V
0.5
0
– 60 – 40 – 20
0
20 40 60 80
100 120 140 160
0
5
10
15
20
25
30
T
J
, Junction
T
e
mperature (°C)
V
DS
, Drain-to-Source Voltage (V)
Fig. 1 – Typical Output Characteristics
Fig. 4 – Normalized On-Resistance vs. Temperature
30
25
20
15
10
5
1
000
TOP
15 V
14 V
13 V
12 V
11 V
10 V
9 V
T
J
= 150 °C
C
iss
3
00
V
GS
= 0
V
, f = 1
M
Hz
C
iss
= C
gs
+ C
gd
, C
ds
Shorted
C
rss
= C
gd
8 V
7 V
BOTTOM 6
V
C
oss
200
C
oss
= C
ds
+ C
gd
ġ
C
rss
10
1
ġ
5 V
0
0
5
10
15
20
25
30
0
100
200
300
400
500
600
V
DS
, Drain-to-Source Voltage (V)
V
DS
, Drain-to-Source Voltage (V)
Fig. 2 – Typical Output Characteristics
Fig. 5 – Typical Capacitance vs. Drain-to-Source Voltage
48
40
32
16
8
24
V
DS
= 520 V
V
DS
= 325 V
DS
= 130 V
20
V
16
12
8
T
J
= 25 °C
4
T
J
= 150 °C
V
DS
= 30.8 V
0
0
0
5
10
15
20
25
0
20
40
60
80
100
V
GS
, Gate-to-Source Voltage (V)
Q
g
,
T
o
tal Gate Charge (nC)
Fig. 3 – Typical Transfer Characteristics
Fig. 6 – Typical Gate Charge vs. Gate-to-Source Voltage
服务热线：400-655-8788
ꢇ
2SK3667
20
15
10
5
100
10
1
T
J
= 150 °C
T
J
= 25 °C
V
GS
= 0 V
0
0.1
25
50
75
100
125
150
0.2
0.4
0.6
0.8
1
1.2
1.4
1.6
V
SD
, Source-Drain Voltage (V)
T
J
, Case
T
e
mperature (°C)
Fig. 7 – Typical Source-Drain Diode Forward Voltage
Fig. 9 – Maximum Drain Current vs. Case Temperature
800
775
750
725
700
1000
Operation in this Area
Limited by R
DS(on)
I
DM
= Limited
100
10
100 μs
Limited by R
DS(on)
*
1
675
650
625
600
1 ms
10 ms
0.1
T
T
= 25 °C
= 150 °C
C
J
BVDSS Limited
100
Single Pulse
0.01
1
10
1000
– 60 – 40 – 20
0
20 40 60 80
100 120 140 160
V
D
S
– Drai
n
–
t
o
-Source Voltage (V)
*
V
GS
> minimum V
GS
at which R
DS(on)
is specified
T
J
, Junction
T
e
mperature (°C)
Fig. 8 – Maximum Safe Operating Area
Fig. 10 – Temperature vs. Drain-to-Source Voltage
1
Duty Cycle = 0.5
0.2
0.1
0.1
0.05
0.02
Single Pulse
0.01
0.0001
0.001
0.01
0.1
1
Pulse Time (s)
Fig. 11 – Normalized Thermal Transient Impedance, Junction-to-Case
服务热线：400-655-8788
4
2SK3667
R
D
V
DS
Q
G
10 V
V
GS
D.U.T.
Q
GS
Q
GD
R
G
+
–
V
DD
V
G
10 V
Pulse width
≤
1 μs
Duty factor
≤
0.1 %
Charge
Fig. 12 – Switching Time Test Circuit
Fig. 16 –
Basic Gate Charge Waveform
Current regulator
Same type as D.U.T.
V
DS
90 %
50 k
Ω
12 V
0.2 μF
0.3 μF
+
–
V
DS
10 %
V
GS
D.U.T.
t
d(on)
t
r
t
d(off)
t
f
V
GS
3 mA
Fig. 13 – Switching Time Waveforms
I
G
I
D
Current sampling resistors
L
Fig. 17 – Gate Charge Test Circuit
V
DS
Vary t
p
to obtain
required I
AS
D.U.T
I
AS
R
G
+
–
V
DD
10 V
0.01
Ω
t
p
Fig. 14 – Unclamped Inductive Test Circuit
V
DS
t
p
V
DD
V
DS
I
AS
Fig. 15 – Unclamped Inductive Waveforms
服务热线：400-655-8788
ꢂ
2SK3667
Peak Diode Recovery dV/dt Test Circuit
+
Circuit layout considerations
•
Low stray inductance
•
Ground plane
D.U.T.
•
Low leakage inductance
current transformer
–
+
–
–
+
R
g
•
dV/dt controlled by R
g
•
Driver same type as D.U.T.
•
I
SD
controlled by duty factor “D”
•
D.U.T. – device under test
+
–
V
DD
Driver gate drive
P.W.
P.W.
D =
Period
Period
V
GS
= 10 V
a
D.U.T. l
SD
waveform
D.U.T. V
DS
waveform
Reverse
recovery
current
Body diode forward
current
dI/dt
Diode recovery
dV/dt
V
DD
Re-applied
voltage
Body diode forward drop
Inductor current
I
SD
Ripple
≤
5 %
Note
a. V
GS
= 5 V for logic level devices
Fig. 18 – For N-Channel
服务热线：400-655-8788
ꢁ
2SK3667
TO-220 FULLPAK (HIGH VOLTAGE)
A
E
A1
Ø P
n
d1
d3
D
u
L1
V
L
b
3
A2
b
2
c
b
e
MILLIMETERS
INCHES
DIM.
A
MIN.
4.570
2.570
2.510
0.622
1.229
1.229
0.440
8.650
15.88
12.300
10.360
MAX.
4.830
2.830
2.850
0.890
1.400
1.400
0.629
9.800
16.120
12.920
10.630
MIN.
0.180
0.101
0.099
0.024
0.048
0.048
0.017
0.341
0.622
0.484
0.408
MAX.
0.190
0.111
0.112
0.035
0.055
0.055
0.025
0.386
0.635
0.509
0.419
A1
A2
b
b2
b3
c
D
d1
d3
E
e
2.54 BSC
0.100 BSC
L
13.200
3.100
6.050
3.050
2.400
0.400
13.730
3.500
6.150
3.450
2.500
0.500
0.520
0.122
0.238
0.120
0.094
0.016
0.541
0.138
0.242
0.136
0.098
0.020
L1
n
Ø P
u
v
ECN: X09-0126-Rev. B, 26-Oct-09
DWG: 5972
Notes
1. To be used only for process drawing.
2. These dimensions apply to all TO-220, FULLPAK leadframe versions 3 leads.
3. All critical dimensions should C meet C
pk
> 1.33.
4. All dimensions include burrs and plating thickness.
5. No chipping or package damage.
服务热线：400-655-8788
7
2SK3667
Disclaimer
All products due to improve reliability, function or design or for other reasons, product specifications and
data are subject to change without notice.
Taiwan VBsemi Electronics Co., Ltd., branches, agents, employees, and all persons acting on its or their
representatives (collectively, the “
T
aiwan VBsemi”), assumes no responsibility for any errors, inaccuracies or
incomplete data contained in the table or any other any disclosure of any information related to the
Taiwan VBsemi makes no guarantee, representation or warranty on the product for any particular purpose of
any goods or continuous production.
T
o
t
he maximum extent permitted by applicable law on
T
aiwan VBsemi
relinquished: (1) any application and all liability arising out of or use of any products; (2) any and all liability,
including but not limited to special, consequential damages or incidental ; (3) any and all implied warranties,
including a particular purpose, non-infringement and merchantability guarantee.
Statement on certain types of applications are based on knowledge of the product is often used in a typical
application of the general product VBsemi
T
aiwan demand that the Taiwan VBsemi of. Statement on whether the
product is suitable for a particular application is non-binding. It is the customer’s responsibility to verify specific
product features in the products described in the specification is appropriate for use in a particular application.
Parameter data sheets and technical specifications can be provided may vary depending on the application and
performance over time. All operating parameters, including typical parameters must be made by customer’s
technical experts validated for each customer application. Product specifications do not expand or modify
T
aiwan
VBsemi purchasing terms and conditions, including but not limited to warranty herein.
Unless expressly stated in writing,
T
aiwan VBsemi products are not intended for use in medical, life saving,
or life sustaining applications or any other application. Wherein VBsemi product failure could lead to personal
injury or death, use or sale of products used in
T
aiwan VBsemi such applications using client did not express their
own risk. Contact your authorized
T
aiwan VBsemi people who are related to product design applications and
other terms and conditions in writing.
The information provided in this document and the company’s products without a license, express or implied,
by estoppel or otherwise, to any intellectual property rights granted to the VBsemi act or document. Product
names and trademarks referred to herein are trademarks of their respective representatives will be all.
Material Category Policy
Taiwan VBsemi Electronics Co., Ltd., hereby certify that all of the products are determined to be
RoHS compliant and meets the definition of restrictions under Directive of the European Parliament
2011/65 / EU, 2011 Nian. 6. 8 Ri Yue restrict the use of certain hazardous substances in electrical and
electronic equipment (EEE) – modification, unless otherwise specified as
inconsistent.(www.VBsemi.com)
Please note that some documents may still refer to Taiwan VBsemi RoHS Directive 2002/95 / EC. We
confirm that all products identified as consistent with the Directive 2002/95 / EC European Directive
2011/65 /.
Taiwan VBsemi Electronics Co., Ltd. hereby certify that all of its products comply identified as
halogen-free halogen-free standards required by the JEDEC JS709A. Please note that some Taiwanese
VBsemi documents still refer to the definition of IEC 61249-2-21, and we are sure that all products
conform to confirm compliance with IEC 61249-2-21 standard level JS709A.
