VBsemi-Elec-IRFB20N50K-VB
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IRFB20N50K
N-Channel
65
0 V (D-S)
Super Junction
MOSFET
FEATURES
• Reduced t
rr
, Q
rr
, and I
RRM
• Low figure-of-merit (FOM) R
on
x Q
g
• Low input capacitance (C
iss
• Low switching losses due to reduced Q
rr
• Ultra low gate charge (Q
g
)
PRODUCT SUMMARY
V
DS
(V) at T
J
max.
R
DS(on)
max. (
) at 25 °C
Q
g
max. (nC)
65
0
V
GS
= 10 V
0.1
9
)
106
14
Q
gs
(nC)
Q
gd
(nC)
33
• Avalanche energy rated (UIS)
Configuration
Single
APPLICATIONS
• Telecommunications
– Server and telecom power supplies
• Lighting
– High-intensity discharge (HID)
– Fluorescent ballast lighting
• Consumer and computing
– ATX power supplies
• Industrial
TO-220AB
D
– Welding
– Battery chargers
• Renewable energy
– Solar (PV inverters)
• Switch mode power supplies (SMPS)
G
S
G D
S
N-Channel MO
S
FET
Top View
ABSOLUTE MAXIMUM RATINGS
(T
C
= 25 °C, unless otherwise noted)
PARAMETER
SYMBOL
LIMIT
UNIT
Drain-Source Voltage
Gate-Source Voltage
V
DS
650
V
V
GS
30
T
C
= 25 °C
2
0
13
Continuous Drain Current (T
J
= 150 °C)
V
GS
at 10 V
I
D
T
C
= 100 °C
A
Pulsed Drain Current
a
I
DM
60
Linear Derating Factor
Single Pulse Avalanche Energy
b
1.7
W/°C
mJ
W
E
AS
P
D
367
Maximum Power Dissipation
208
Operating Junction and Storage Temperature Range
Drain-Source Voltage Slope
Reverse Diode dV/dt
d
T
J
, T
stg
-55 to +150
37
°C
T
J
= 125 °C
for 10 s
dV/dt
V/ns
°C
31
Soldering Recommendations (Peak Temperature)
c
300
Notes
a. Repetitive
rating; pulse width limited by maximum junction temperature.
b. V
DD
= 50 V, starting T
J
= 25 °C, L = 28.2 mH, R
g
= 25
, I
AS
= 5.1 A.
c. 1.6
mm from case.
d. I
SD
I
D
, dI/dt = 100 A/μs, starting T
J
= 25 °C.
服务热线：400-655-8788
1
IRFB20N50K
THERMAL RESISTANCE RATINGS
PARAMETER
SYMBOL
TYP.
MAX.
UNIT
Maximum Junction-to-Ambient
R
thJA
R
thJC
–
–
62
°C/W
Maximum Junction-to-Case (Drain)
0.5
SPECIFICATIONS
(T
J
= 25 °C, unless otherwise noted)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN.
TYP.
MAX. UNIT
Static
Drain-Source Breakdown Voltage
V
DS
Temperature Coefficient
Gate-Source Threshold Voltage (N)
V
DS
V
GS
= 0 V, I
D
= 250 μA
Reference to 25 °C, I
D
= 1 mA
V
DS
= V
GS
, I
D
= 250 μA
650
–
–
V
V/°C
V
V
DS
/T
J
V
GS(th)
–
2
–
–
–
–
–
–
0.67
–
–
4
V
GS
V
GS
=
=
20 V
30 V
–
–
100
1
nA
μA
Gate-Source Leakage
I
GSS
I
DSS
V
DS
= 520 V, V
GS
= 0 V
DS
= 520 V, V
GS
= 0 V, T
J
= 125 °C
V
GS
= 10 V
I
D
= 11 A
–
1
Zero Gate Voltage Drain Current
μA
V
–
500
Drain-Source On-State Resistance
Forward Transconductance
Dynamic
R
DS(on)
g
fs
0.1
9
7.0
–
–
V
DS
= 30 V, I
D
= 11 A
S
Input Capacitance
C
iss
C
oss
C
rss
–
–
–
2322
105
4
–
–
–
V
GS
= 0 V,
V
DS
= 100 V,
f = 1 MHz
Output Capacitance
Reverse Transfer Capacitance
pF
nC
Effective Output Capacitance, Energy
Related
a
C
o(er)
C
o(tr)
–
–
84
–
–
V
DS
= 0 V to 520 V, V
GS
= 0 V
Effective Output Capacitance, Time
Related
b
293
Total Gate Charge
Q
g
Q
gs
Q
gd
t
d(on)
t
r
–
–
–
–
–
–
–
–
71
14
106
–
Gate-Source Charge
Gate-Drain Charge
Turn-On Delay Time
Rise Time
V
GS
= 10 V
I
D
= 11 A, V
DS
= 520 V
33
–
22
44
68
102
84
–
34
V
DD
= 520 V, I
D
= 11 A,
GS
= 10 V, R
g
= 9.1
ns
V
Turn-Off Delay Time
Fall Time
t
d(off)
t
f
68
42
Gate Input Resistance
Drain-Source Body Diode Characteristics
R
g
f = 1 MHz, open drain
0.78
MOSFET symbol
showing the
integral reverse
p – n junction diode
D
Continuous Source-Drain Diode Current
Pulsed Diode Forward Current
I
S
–
–
–
–
21
53
A
G
I
SM
S
Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
Reverse Recovery Current
V
SD
t
rr
T
J
= 25 °C, I
S
= 11 A, V
GS
= 0 V
–
–
–
–
0.9
160
1.2
14
1.2
V
ns
μC
A
–
–
–
T
J
= 25 °C, I
F
= I
S
= 11 A,
dI/dt = 100 A/μs, V
R
= 25 V
Q
rr
I
RRM
Notes
a. C
oss(er)
is a fixed capacitance that gives the same energy as C
oss
while V
DS
is rising from 0 % to 80 % V
DSS
.
b. C
oss(tr)
is a fixed capacitance that gives the same charging time as C
oss
while V
DS
is rising from 0 % to 80 % V
DSS
.
服务热线：400-655-8788
2
IRFB20N50K
TYPICAL CHARACTERISTICS
(25 °C, unless otherwise noted)
60
3
2.5
2
TOP 15 V
T
J
= 25 °C
14 V
I
D
= 11 A
13 V
12 V
50
11 V
10 V
9 V
8 V
7 V
40
6 V
5 V
1.5
1
30
20
V
GS
= 10 V
0.5
10
0
0
0
5
10
15
20
25
30
– 60 – 40 – 20
0
20 40 60 80
100 120 140 160
T
J
, Junction
T
e
mperature (°C)
V
DS
, Drain-to-Source Voltage (V)
Fig. 1 – Typical Output Characteristics
Fig. 4 – Normalized On-Resistance vs. Temperature
40
30
20
10
0
10 000
TOP 15 V
14 V
T
J
= 150 °C
C
i
ss
13 V
12 V
11 V
10 V
9 V
ġ
ġ
V
GS
= 0
V
, f = 1
M
Hz
i
ss
= C
g
s
+ C
gd
, C
d
s
S
horted
C
r
ss
= C
gd
1000
100
10
8 V
C
7 V
6 V
5 V
C
o
ss
= C
d
s
+ C
gd
C
o
ss
ġ
ġ
ġ
C
r
ss
ġ
1
0
5
10
15
20
25
30
0
100
200
300
400
500
600
V
DS
, Drain-to-Source Voltage (V)
V
D
S
, Drain-to-
S
ource Voltage (V)
Fig. 2 – Typical Output Characteristics
Fig. 5 – Typical Capacitance vs. Drain-to-Source Voltage
14
60
50
5000
500
50
12
10
8
40
30
20
C
o
ss
E
o
ss
6
T
J
= 150 °C
4
T
J
= 25 °C
10
0
2
V
D
S
= 29.6 V
0
0
5
10
15
20
25
0
100
200
300
V
D
S
400
500
600
V
GS
, Gate-to-Source Voltage (V)
Fig. 3 – Typical Transfer Characteristics
服务热线：400-655-8788
Fig. 6 – C
oss
and E
oss
vs. V
DS
3
IRFB20N50K
24
20
16
12
8
25
20
15
10
5
V
D
S
= 520 V
D
S
= 325 V
V
D
S
= 130 V
V
4
0
0
0
30
60
90
120
150
25
50
75
100
125
150
Q
g
,
T
o
tal
G
ate Charge (nC)
T
J
, Case
T
e
mperature (°C)
Fig. 7 – Typical Gate Charge vs. Gate-to-Source Voltage
Fig. 10 – Maximum Drain Current vs. Case Temperature
850
100
I
= 10 mA
D
825
800
775
750
T
J
= 150 °C
T
J
= 25 °C
10
725
700
675
650
1
V
GS
= 0 V
0.1
– 60 – 40 – 20
0
20 40 60 80
100 120 140 160
0.2
0.4
0.6
0.8
1
1.2
1.4
1.6
T
J
, Junction
T
e
mperature (°C)
V
S
D
,
S
ource-Drain Voltage (V)
Fig. 8 – Typical Source-Drain Diode Forward Voltage
Fig. 11 – Temperature vs. Drain-to-Source Voltage
100
10
I
DM
Limited
100 μ
s
Limited by R
D
S
(on)
*
1
1 m
s
Operation in thi
s
Area
Limited by R
D
S
(on)
10 m
s
0.1
0.01
T
T
= 25 °C
= 150 °C
C
J
S
ingle Pul
s
e
BVD
SS
Limited
1
10
100
1000
V
D
S
, Drain-to-
S
ource Voltage (V)
* V
GS
> minimum V
GS
at which R
D
S
(on)
i
s s
pecified
Fig. 9 – Maximum Safe Operating Area
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4
IRFB20N50K
1
Duty Cycle = 0.5
0.2
0.1
0.1
0.05
0.02
S
ingle Pul
s
e
0.01
0.0001
0.001
0.01
0.1
1
Pul
s
e Time (
s
)
Fig. 12 – Normalized Thermal Transient Impedance, Junction-to-Case
R
D
V
DS
V
DS
t
p
V
GS
V
DD
D.U.T.
R
G
+
–
V
DD
V
DS
10 V
Pulse width
≤
1 µs
Duty factor
≤
0.1 %
I
AS
Fig. 13 – Switching Time Test Circuit
Fig. 16 – Unclamped Inductive Waveforms
V
DS
Q
G
10 V
90 %
Q
GS
Q
GD
10 %
V
GS
V
G
t
d(on)
t
r
t
d(off)
t
f
Charge
Fig. 17 –
Basic Gate Charge Waveform
Fig. 14 – Switching Time Waveforms
Current regulator
L
Same type as D.U.T.
V
DS
Vary t
p
to obtain
required I
AS
50 k
Ω
12 V
0.2 µF
D.U.T
I
AS
0.3 µF
R
G
+
–
V
DD
+
–
V
DS
D.U.T.
10 V
V
GS
0.01
Ω
t
p
3 mA
Fig. 15 – Unclamped Inductive Test Circuit
I
G
I
D
Current sampling resistors
Fig. 18 – Gate Charge Test Circuit
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5
IRFB20N50K
Peak Dio
d
e Recovery
d
V/
d
t Test Circuit
+
Circuit layout con
s
ideration
s
•
Low
s
tray inductance
•
G
round plane
D.U.T.
•
Low leakage inductance
current tran
s
former
–
+
–
–
+
R
g
•
dV/dt controlled by R
g
•
Driver
s
ame type a
s
D.U.T.
•
I
S
D
controlled by duty factor “D”
•
D.U.T. – device under te
s
t
+
–
V
DD
Driver gate drive
P.W.
P.W.
D =
Period
Period
V
GS
= 10 V
a
D.U.T. l
S
D
waveform
D.U.T. V
D
S
waveform
Rever
s
e
recovery
current
Body diode forward
current
dI/dt
Diode recovery
dV/dt
V
DD
Re-applied
voltage
Body diode forward drop
Inductor current
I
S
D
Ripple
≤
5 %
Note
a. V
GS
= 5 V for logic level device
s
Fig. 19 – For N-Channel
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6
IRFB20N50K
TO-220AB
MILLIMETERS
MIN.
INCHES
A
E
DIM.
MAX.
4.65
1.01
1.73
0.61
15.49
10.51
2.67
5.28
1.40
6.48
2.92
14.02
3.82
3.94
3.00
MIN.
0.167
0.027
0.047
0.014
0.585
0.395
0.095
0.192
0.045
0.240
0.095
0.526
0.131
0.139
0.102
MAX.
0.183
0.040
0.068
0.024
0.610
0.414
0.105
0.208
0.055
0.255
0.115
0.552
0.150
0.155
0.118
F
A
b
4.25
0.69
1.20
0.36
14.85
10.04
2.41
4.88
1.14
6.09
2.41
13.35
3.32
3.54
2.60
Ø P
b(1)
c
D
E
e
e(1)
F
H(1)
J(1)
L
1
3
2
L(1)
Ø P
Q
*
M
b(1)
ECN: X12-0208-Rev. N, 08-Oct-12
DWG: 5471
Notes
* M = 1.32 mm to 1.62 mm (dimension including protrusion)
Heatsink hole for HVM
C
b
e
J(1)
e(1)
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7
IRFB20N50K
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data are subject to change without notice.
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representatives (collectively, the “
T
aiwan VBsemi”), assumes no responsibility for any errors, inaccuracies or
incomplete data contained in the table or any other any disclosure of any information related to the
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any goods or continuous production.
T
o
t
he maximum extent permitted by applicable law on
T
aiwan VBsemi
relinquished: (1) any application and all liability arising out of or use of any products; (2) any and all liability,
including but not limited to special, consequential damages or incidental ; (3) any and all implied warranties,
including a particular purpose, non-infringement and merchantability guarantee.
Statement on certain types of applications are based on knowledge of the product is often used in a typical
application of the general product VBsemi
T
aiwan demand that the Taiwan VBsemi of. Statement on whether the
product is suitable for a particular application is non-binding. It is the customer’s responsibility to verify specific
product features in the products described in the specification is appropriate for use in a particular application.
Parameter data sheets and technical specifications can be provided may vary depending on the application and
performance over time. All operating parameters, including typical parameters must be made by customer’s
technical experts validated for each customer application. Product specifications do not expand or modify
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aiwan
VBsemi purchasing terms and conditions, including but not limited to warranty herein.
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aiwan VBsemi products are not intended for use in medical, life saving,
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aiwan VBsemi such applications using client did not express their
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aiwan VBsemi people who are related to product design applications and
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RoHS compliant and meets the definition of restrictions under Directive of the European Parliament
2011/65 / EU, 2011 Nian. 6. 8 Ri Yue restrict the use of certain hazardous substances in electrical and
electronic equipment (EEE) – modification, unless otherwise specified as
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Please note that some documents may still refer to Taiwan VBsemi RoHS Directive 2002/95 / EC. We
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