VBsemi-Elec-IRLZ34NSTRPBF-VB

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VBsemi-Elec-IRLZ34NSTRPBF-VB
IRLZ34NSTRPBF  
N-Channel 60 V (D-S) MOSFET  
FEATURES  
PRODUCT SUMMARY  
•
Halogen-free According to IEC 61249-2-21  
V

DS

(V)  
R

DS(on)

(
)  
Q

g

(Max)  
I

D

(A)

a, e  

50  
Definition  
• Surface Mount  
• Available in Tape and Reel  
• Dynamic dV/dt Rating  
• Logic-Level Gate Drive  
0.023 at V

GS

= 10 V  
0.027 at V

GS

= 4.5 V  
60  
66 nC  
40  
• Fast Switching  
• Compliant to RoHS Directive 2002/95/EC  
D
D

2

PAK (TO-263)  
G
D
G
S
S
N-Channel MOSFET  
ABSOLUTE MAXIMUM RATINGS
(T

C

= 25 °C, unless otherwise noted)  
PARAMETER  
SYMBOL  
V

DS  

LIMIT  
UNIT  
Drain-Source Voltage  
Gate-Source Voltage  
60  
10  
V
V

GS  

Continuous Drain Current

f  

Continuous Drain Current  
Pulsed Drain Current

a  

T

C

= 25 °C  
50  
V

GS

at 10 V  
I

D  

T

C

= 100 °C  
36  
A
I

DM  

200  
Linear Derating Factor  
1.0  
W/°C  
mJ  
Linear Derating Factor (PCB Mount)

e  

Single Pulse Avalanche Energy

b  

Maximum Power Dissipation  
Maximum Power Dissipation (PCB Mount)

e  

Peak Diode Recovery dV/dt

c  

0.025  
400  
E

AS  

P

D  

T

C

= 25 °C  
150  
W
T

A

= 25 °C  
3.7  
dV/dt  
4.5  
V/ns  
°C  
Operating Junction and Storage Temperature Range  
Soldering Recommendations (Peak Temperature)

d  

T

J

, T

stg  

– 55 to + 175  
300

d  

for 10 s  
Notes  
a. Repetitive
 
rating; pulse width limited by maximum junction temperature (see fig. 11).  
b. V

DD

= 25 V, starting T

J

= 25 °C, L = 179 μH, R

g

= 25
, I

AS

= 51 A (see fig. 12).  
c. I

SD

51 A, dI/dt
250 A/μs, V

DD

V

DS

, T

J

175 °C.  
d. 1.6
 
mm from case.  
e. When
 
mounted on 1″ square PCB (FR-4 or G-10 material).  
f. Current
 
limited by the package, (die current = 51 A).  
服务热线:400-655-8788  
1

IRLZ34NSTRPBF  
THERMAL RESISTANCE RATINGS  
PARAMETER  
SYMBOL  
TYP.  
MAX.  
UNIT  
Maximum Junction-to-Ambient  
R

thJA  

R

thJA  

R

thJC  

–
62  
Maximum Junction-to-Ambient  
(PCB Mount)

a  

–
–
40  
°C/W  
Maximum Junction-to-Case (Drain)  
1.0  
Note  
a. When
 
mounted on 1″ square PCB (FR-4 or G-10 material).  
SPECIFICATIONS
(T

J

= 25 °C, unless otherwise noted)  
PARAMETER  
SYMBOL  
TEST CONDITIONS  
MIN.  
TYP.  
MAX. UNIT  
Static  
Drain-Source Breakdown Voltage  
V

DS  

V

DS

/T

J  

V

GS(th)  

I

GSS  

V

GS

= 0, I

D

= 250 μA  
Reference to 25 °C, I

D

= 1 mA  
V

DS

= V

GS

, I

D

= 250 μA  
60  
–
–
–
–
V
V/°C  
V
V

DS

Temperature Coefficient  
0.070  
Gate-Source Threshold Voltage  
Gate-Source Leakage  
1.0  
–
–
3.0  
100  
25  
250  
–
V

GS  

V

DS

= 60 V, V

GS

= 0 V  

DS

= 48 V, V

GS

= 0 V, T

J

= 150 °C  
=
10 V  
–
nA  
–
–
Zero Gate Voltage Drain Current  
Drain-Source On-State Resistance  
I

DSS  

μA  
V
–
–
V

GS

= 10 V  
V

GS

= 4.5 V  
I

D

= 21 A

b  

I

D

= 15
A

b  

–
23  
27  
–
R

DS(on)  

g

fs  

–
–
Forward Transconductance  
Dynamic  
V

DS

= 25 V, I

D

= 21A

b  

23  
–
S
Input Capacitance  
Output Capacitance  
Reverse Transfer Capacitance  
Total Gate Charge  
Gate-Source Charge  
Gate-Drain Charge  
Turn-On Delay Time  
Rise Time  
C

iss  

C

oss  

C

rss  

Q

g  

–
–
–
–
–
–
–
–
–
–
3000  
1000  
200  
–
–
–
–
–
–
V

GS

= 0 V,  
V

DS

= 25 V,  
f = 1.0 MHz, see fig. 5  
pF  
nC  
60  
10  
I

D

= 51 A, V

DS

= 48 V,  
Q

gs  

Q

gd  

t

d(on)  

t

r  

V

GS

= 5.0 V  
see fig. 6 and 13

b  

40  
17  
–
–
–
–
230  
42  
V

DD

= 30 V, I

D

= 51 A,  
ns  
R

g

= 4.6
, R

D

= 0.56
, see fig. 10

b  

Turn-Off Delay Time  
Fall Time  
t

d(off)  

t

f  

110  
D
Between lead,  
Internal Drain Inductance  
L

D  

L

S  

–
–
4.5  
7.5  
–
–
6 mm (0.25″) from  
package and center of  
die contact  
nH  
G
Internal Source Inductance  
S
Drain-Source Body Diode Characteristics  
Continuous Source-Drain Diode Current  
MOSFET symbol  
showing the  
integral reverse  
p – n junction diode  
50

c  

200  
D
I

S  

–
–
–
–
A
G
Pulsed Diode Forward Current

a  

I

SM  

S
Body Diode Voltage  
V

SD  

t

rr  

T

J

= 25 °C, I

S

= 51 A, V

GS

= 0 V

b  

T

J

= 25 °C, I

F

= 51 A, dI/dt = 100 A/μs

b  

–
–
–
–
2.5  
180  
1.3  
V
Body Diode Reverse Recovery Time  
Body Diode Reverse Recovery Charge  
Forward Turn-On Time  
130  
0.84  
ns  
μC  
Q

rr  

t

on  

Intrinsic turn-on time is negligible (turn-on is dominated by L

S

and L

D

)  
Notes  
a. Repetitive
 
rating; pulse width limited by maximum junction temperature (see fig. 11).  
b. Pulse
 
width
300 μs; duty cycle
2 %.  
c. Current
 
limited by the package, (Die Current = 51 A).  
服务热线:400-655-8788  
2

IRLZ34NSTRPBF  
TYPICAL CHARACTERISTICS
(25 °C, unless otherwise noted)  
Fig. 1 – Typical Output Characteristics, T

C

= 25 °C  
Fig. 3 – Typical Transfer Characteristics  
Fig. 2 – Typical Output Characteristics, T

C

= 150 °C  
Fig. 4 – Normalized On-Resistance vs. Temperature  
服务热线:400-655-8788  
3

IRLZ34NSTRPBF  
Fig. 5 – Typical Capacitance vs. Drain-to-Source Voltage  
Fig. 7 – Typical Source-Drain Diode Forward Voltage  
Fig. 6 – Typical Gate Charge vs. Gate-to-Source Voltage  
Fig. 8 – Maximum Safe Operating Area  
服务热线:400-655-8788  
4

IRLZ34NSTRPBF  
R

D  

V

DS  

V

GS  

D.U.T.  
R

g  

+
V
–
DD  
5 V  
Pulse width
≤
1 µs  
Duty factor
≤
0.1 %  
Fig. 10a – Switching Time Test Circuit  
V

DS  

90 %  
10 %  
V

GS  

t

d(on)

t

r  

t

d(off)

t

f  

Fig. 9 – Maximum Drain Current vs. Case Temperature  
Fig. 10b – Switching Time Waveforms  
Fig. 11 – Maximum Effective Transient Thermal Impedance, Junction-to-Case  
服务热线:400-655-8788  
5

IRLZ34NSTRPBF  
L
V

DS  

V

DS  

Vary t

p

to obtain  
required I

AS  

t

p  

V

DD  

R

g  

D.U.T.  
+
–
V

DD  

V

DS  

I

AS  

5 V  
0.01
Ω  
t

p  

I

AS  

Fig. 12a – Unclamped Inductive Test Circuit  
Fig. 12b – Unclamped Inductive Waveforms  
Fig. 12c – Maximum Avalanche Energy vs. Drain Current  
Current regulator  
Same type as D.U.T.  
50 k
Ω  
Q

G  

12 V  
0.2 µF  
0.3 µF  
5 V  
V

G  

Q

GS  

Q

GD  

+
–
V

DS  

D.U.T.  
V

GS  

3 mA  
Charge  
I

G  

I

D  

Current sampling resistors  
Fig. 13a – Basic Gate Charge Waveform  
Fig. 13b – Gate Charge Test Circuit  
服务热线:400-655-8788  
6

IRLZ34NSTRPBF  
Peak Dio
d
e Recovery
d
V/
d
t Test Circuit  
+
Circuit layout con
s
ideration
s  
•
Low
s
tray inductance  
•
G
round plane  
D.U.T.  
•
Low leakage inductance  
current tran
s
former  
–
+
–
–
+
R

g  

•
dV/dt controlled by R

g  

•
Driver
s
ame type a
s
D.U.T.  
•
I

S
D

controlled by duty factor “D”  
•
D.U.T. – device under te
s
t  
+
–
V

DD  

Driver gate drive  
P.W.  
P.W.  
D =  
Period  
Period  
V

GS

= 10 V

a  

D.U.T. l

S
D

waveform  
D.U.T. V

D
S

waveform  
Rever
s
e  
recovery  
current  
Body diode forward  
current  
dI/dt  
Diode recovery  
dV/dt  
V

DD  

Re-applied  
voltage  
Body diode forward drop  
Inductor current  
I

S
D  

Ripple
≤
5 %  
Note  
a. V

GS

= 5 V for logic level device
s  
Fig. 14 – For N-Channel  
服务热线:400-655-8788  
7

IRLZ34NSTRPBF  
2
RECOMMENDED MINIMUM PADS FOR D PAK:
 
3-Lead  
0.420  
(10.668)  
0.145  
(3.683)  
0.135  
(3.429)  
0.200  
0.050  
(5.080)  
(1.257)  
Recommended Minimum Pads  
Dimensions in Inches/(mm)  
服务热线:400-655-8788  
8

IRLZ34NSTRPBF  
Disclaimer  
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data are subject to change without notice.  
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representatives (collectively, the “
T
aiwan VBsemi”), assumes no responsibility for any errors, inaccuracies or  
incomplete data contained in the table or any other any disclosure of any information related to the  
product.(www.VBsemi.com)  
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any goods or continuous production.
T
o
t
he maximum extent permitted by applicable law on
T
aiwan VBsemi  
relinquished: (1) any application and all liability arising out of or use of any products; (2) any and all liability,  
including but not limited to special, consequential damages or incidental ; (3) any and all implied warranties,  
including a particular purpose, non-infringement and merchantability guarantee.  
Statement on certain types of applications are based on knowledge of the product is often used in a typical  
application of the general product VBsemi
T
aiwan demand that the Taiwan VBsemi of. Statement on whether the  
product is suitable for a particular application is non-binding. It is the customer’s responsibility to verify specific  
product features in the products described in the specification is appropriate for use in a particular application.  
Parameter data sheets and technical specifications can be provided may vary depending on the application and  
performance over time. All operating parameters, including typical parameters must be made by customer’s  
technical experts validated for each customer application. Product specifications do not expand or modify
T
aiwan  
VBsemi purchasing terms and conditions, including but not limited to warranty herein.  
Unless expressly stated in writing,
T
aiwan VBsemi products are not intended for use in medical, life saving,  
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T
aiwan VBsemi such applications using client did not express their  
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aiwan VBsemi people who are related to product design applications and  
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Material Category Policy  
Taiwan VBsemi Electronics Co., Ltd., hereby certify that all of the products are determined to be  
oHS compliant and meets the definition of restrictions under Directive of the European Parliament  
2011/65 / EU, 2011 Nian. 6. 8 Ri Yue restrict the use of certain hazardous substances in electrical and  
electronic equipment (EEE) – modification, unless otherwise specified as inconsistent.(www.VBsemi.com)  
Please note that some documents may still refer to Taiwan VBsemi RoHS Directive 2002/95 / EC. We  
confirm that all products identified as consistent with the Directive 2002/95 / EC European Directive  
2011/65 /.  
Taiwan VBsemi Electronics Co., Ltd. hereby certify that all of its products comply identified as  
halogen-free halogen-free standards required by the JEDEC JS709A. Please note that some Taiwanese  
VBsemi documents still refer to the definition of IEC 61249-2-21, and we are sure that all products  
conform to confirm compliance with IEC 61249-2-21 standard level JS709A.