VBsemi-Elec-RU2HE5L-VB
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RU2HE5L
N-Channel 200 V (D-S) MOSFET
PRODUCT SUMMARY
FEATURES
•
•
•
•
•
TrenchFET
®
Power MOSFET
V
DS
(V)
DS(on)
(
)
Q
g
(Max.) (nC)
gs
(nC)
200
R
V
GS
= 10 V
0.85
175 °C Junction Temperature
PWM Optimized
100 % R
g
Tested
13
3.0
7.9
Q
Compliant to RoHS Directive 2002/95/EC
Q
gd
(nC)
Configuration
Single
APPLICATIONS
Primary Side Switch
•
D
D
P
A
K
(TO-252)
G
D
S
G
S
N-Channel MO
S
FET
ABSOLUTE MAXIMUM RATINGS
(T
C
= 25 °C, unless otherwise noted)
PARAMETER
SYMBOL
LIMIT
200
UNIT
Drain-Source Voltage
Gate-Source Voltage
V
DS
V
V
GS
20
T
C
= 25 °C
5.0
Continuous Drain Current
V
GS
at 10 V
I
D
T
C
= 100 °C
4.0
A
Pulsed Drain Current
a
I
DM
20
Linear Derating Factor
0.33
0.020
161
W/°C
Linear Derating Factor (PCB Mount)
e
Single Pulse Avalanche Energy
b
Repetitive Avalanche Current
a
E
AS
I
AR
mJ
A
4.8
Repetitive Avalanche Energy
a
E
AR
4.2
mJ
Maximum Power Dissipation
T
C
= 25 °C
42
P
D
W
V/ns
°C
Maximum Power Dissipation (PCB mount)
e
Peak Diode Recovery dV/dt
c
T
A
= 25 °C
2.5
dV/dt
5.0
Operating Junction and Storage Temperature Range
Soldering Recommendations (Peak temperature)
d
T
J
, T
stg
-55 to +150
260
for 10 s
Notes
a. Repetitive
rating; pulse width limited by maximum junction temperature (see fig. 11).
b. V
DD
= 50 V, starting T
J
= 25 °C, L = 14 mH, R
g
= 25
, I
AS
= 4.8 A (see fig. 12).
c. I
SD
5.2 A, dI/dt
95 A/μs, V
DD
V
DS
, T
J
150 °C.
d. 1.6
mm from case.
e. When
mounted on 1″ square PCB (FR-4 or G-10 material).
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1
RU2HE5L
THERMAL RESISTANCE RATINGS
PARAMETER
SYMBOL
MIN.
TYP.
MAX.
UNIT
Maximum Junction-to-Ambient
R
thJA
–
–
110
Maximum Junction-to-Ambient
R
thJA
R
thJC
–
–
–
–
50
°C/W
(PCB mount)
a
Maximum Junction-to-Case (Drain)
3.0
Note
a. When
mounted on 1″ square PCB (FR-4 or G-10 material).
SPECIFICATIONS
(T
J
= 25 °C, unless otherwise noted)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN.
TYP.
MAX. UNIT
Static
Drain-Source Breakdown Voltage
V
DS
Temperature Coefficient
Gate-Source Threshold Voltage
Gate-Source Leakage
V
DS
V
DS
/T
J
V
GS(th)
I
GSS
V
GS
= 0 V, I
D
= 250 μA
Reference to 25 °C, I
D
= 1 mA
V
DS
= V
GS
, I
D
= 250 μA
200
–
–
–
V
V/°C
V
–
2.0
–
0.29
–
4.0
100
25
250
–
V
GS
=
20 V
–
nA
V
DS
= 200 V, V
GS
= 0 V
–
–
Zero Gate Voltage Drain Current
I
DSS
μA
V
DS
= 160 V, V
GS
= 0 V, T
J
= 125 °C
–
–
0.85
–
Drain-Source On-State Resistance
Forward Transconductance
Dynamic
R
DS(on)
g
fs
V
GS
= 10 V
I
D
= 2.9 A
b
–
V
DS
= 50 V, I
D
= 2.9 A
b
1.7
–
S
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
Turn-On Delay Time
Rise Time
C
iss
C
oss
C
rss
Q
g
–
–
–
–
–
–
–
–
–
–
185
100
30
–
–
V
GS
= 0 V,
V
DS
= 25 V,
f = 1.0 MHz, see fig. 5
–
pF
–
13.0
3.0
7.9
–
I
D
= 4.8 A, V
DS
= 160 V,
Q
gs
Q
gd
t
d(on)
t
r
V
GS
= 10 V
–
nC
see fig. 6 and 13
b
–
7.2
22
19
13
–
V
DD
= 100 V, I
D
= 4.8 A,
ns
R
G
= 18
, R
D
= 20
, see fig. 10
b
Turn-Off Delay Time
Fall Time
t
d(off)
t
f
–
–
D
Between lead,
6 mm (0.25″) from
Internal Drain Inductance
L
D
L
S
–
–
4.5
7.5
–
–
nH
package and center of
die contact
G
Internal Source Inductance
S
Drain-Source Body Diode Characteristics
Continuous Source-Drain Diode Current
MOSFET symbol
D
I
S
–
–
–
–
4.8
19
showing the
A
integral reverse
G
Pulsed Diode Forward Current
a
I
SM
p – n junction diode
S
Body Diode Voltage
V
SD
t
rr
T
J
= 25 °C, I
S
= 4.8 A, V
GS
= 0 V
b
–
–
–
–
1.8
300
1.8
V
Body Diode Reverse Recovery Time
Body Diode Reverse Recovery Charge
Forward Turn-On Time
150
0.91
ns
μC
T
J
= 25 °C, I
F
= 4.8 A, dI/dt = 100 A/μs
b
Q
rr
t
on
Intrinsic turn-on time is negligible (turn-on is dominated by L
S
and L
D
)
Notes
a. Repetitive
rating; pulse width limited by maximum junction temperature (see fig. 11).
b. Pulse
width
300 μs; duty cycle
2 %.
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2
RU2HE5L
TYPICAL CHARACTERISTICS
(25 °C, unless otherwise noted)
Fig. 1 –
Typical Output Characteristics, T
C
= 25 °C
Fig. 3 – Typical Transfer Characteristics
Fig. 2 – Typical Output Characteristics, T
C
= 150 °C
Fig. 4 – Normalized On-Resistance vs. Temperature
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3
RU2HE5L
Fig. 7 – Typical Source-Drain Diode Forward Voltage
Fig. 5 – Typical Capacitance vs. Drain-to-Source Voltage
Fig. 8 – Maximum Safe Operating Area
Fig. 6 – Typical Gate Charge vs. Gate-to-Source Voltage
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4
RU2HE5L
R
D
V
DS
V
GS
D.U.T.
R
G
+
V
–
DD
10 V
Pulse width
≤
1 µs
Duty factor
≤
0.1 %
Fig. 10a – Switching Time Test Circuit
V
DS
90 %
10 %
V
GS
Fig. 9 – Maximum Drain Current vs. Case Temperature
t
d(on)
t
r
t
d(off)
t
f
Fig. 10b – Switching Time Waveforms
Fig. 11 – Maximum Effective Transient Thermal Impedance, Junction-to-Case
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5
RU2HE5L
L
V
DS
V
DS
Vary t
p
to obtain
required I
AS
t
p
V
DD
D.U.T
R
G
+
–
V
DD
V
DS
I
AS
10 V
0.01
Ω
t
p
I
AS
Fig. 12b – Unclamped Inductive Waveforms
Fig. 12a – Unclamped Inductive Test Circuit
Fig. 12c – Maximum Avalanche Energy vs. Drain Current
Current regulator
Same type as D.U.T.
50 k
Ω
Q
G
V
GS
12 V
0.2 µF
0.3 µF
Q
GS
Q
GD
+
–
V
DS
D.U.T.
V
G
V
GS
3 mA
Charge
I
G
I
D
Current sampling resistors
Fig. 13a – Basic Gate Charge Waveform
Fig. 13b – Gate Charge Test Circuit
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6
RU2HE5L
Peak Dio
d
e Recovery
d
V/
d
t Test Circuit
+
Circuit layout con
s
ideration
s
•
Low
s
tray inductance
•
G
round plane
D.U.T.
•
Low leakage inductance
current tran
s
former
–
+
–
–
+
R
g
•
dV/dt controlled by R
g
•
Driver
s
ame type a
s
D.U.T.
•
I
S
D
controlled by duty factor “D”
•
D.U.T. – device under te
s
t
+
–
V
DD
Driver gate drive
P.W.
P.W.
D =
Period
Period
V
GS
= 10 V
a
D.U.T. l
S
D
waveform
D.U.T. V
D
S
waveform
Rever
s
e
recovery
current
Body diode forward
current
dI/dt
Diode recovery
dV/dt
V
DD
Re-applied
voltage
Body diode forward drop
Inductor current
I
S
D
Ripple
≤
5 %
Note
a. V
GS
= 5 V for logic level device
s
Fig. 14 – For N-Channel
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7
RU2HE5L
TO-252AA Case Outline
E
A
MILLIMETERS
INCHES
C2
b3
DIM.
A
MIN.
MAX.
2.38
0.127
0.88
1.14
5.46
0.61
0.89
6.22
–
MIN.
MAX.
2.18
–
0.086
–
0.094
0.005
0.035
0.045
0.215
0.024
0.035
0.245
–
A1
b
0.64
0.76
4.95
0.46
0.46
5.97
4.10
6.35
4.32
9.40
0.025
0.030
0.195
0.018
0.018
0.235
0.161
0.250
0.170
0.370
b2
b3
C
C2
D
D1
E
6.73
–
0.265
–
E1
H
b
C
b2
e
10.41
0.410
A1
e1
e
2.28 BSC
4.56 BSC
1.40
0.090 BSC
0.180 BSC
e1
L
1.78
1.27
1.02
1.52
0.055
0.070
0.050
0.040
0.060
L3
L4
L5
0.89
–
0.035
–
1.01
0.040
ECN: T16-0236-Rev. P, 16-May-16
DWG: 5347
E1
Notes
Dimension L3 is for reference only.
•
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8
RU2HE5L
RECOMMENDED MINIMUM
P
A
DS FOR D
P
A
K (TO-252)
0.224
(5.690)
0.180
0.055
(4.572)
(1.397)
Recommended Minimum Pads
Dimensions in Inches/(mm)
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9
RU2HE5L
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T
aiwan VBsemi”), assumes no responsibility for any errors, inaccuracies or
incomplete data contained in the table or any other any disclosure of any information related to the
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any goods or continuous production.
T
o
t
he maximum extent permitted by applicable law on
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aiwan VBsemi
relinquished: (1) any application and all liability arising out of or use of any products; (2) any and all liability,
including but not limited to special, consequential damages or incidental ; (3) any and all implied warranties,
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Statement on certain types of applications are based on knowledge of the product is often used in a typical
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T
aiwan demand that the Taiwan VBsemi of. Statement on whether the
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product features in the products described in the specification is appropriate for use in a particular application.
Parameter data sheets and technical specifications can be provided may vary depending on the application and
performance over time. All operating parameters, including typical parameters must be made by customer’s
technical experts validated for each customer application. Product specifications do not expand or modify
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aiwan
VBsemi purchasing terms and conditions, including but not limited to warranty herein.
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oHS compliant and meets the definition of restrictions under Directive of the European Parliament
2011/65 / EU, 2011 Nian. 6. 8 Ri Yue restrict the use of certain hazardous substances in electrical and
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Please note that some documents may still refer to Taiwan VBsemi RoHS Directive 2002/95 / EC. We
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