VBsemi-Elec-VBL1203M
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VBL1203M
Power MOSFET
FEATURES
•
Halogen-free According to IEC 61249-2-21
Definition
• Surface Mount
PRODUCT SUMMARY
V
DS
(V)
200
R
DS(on)
(
)
V
GS
= 10 V
0.30
Q
g
(Max.) (nC)
Q
gs
(nC)
43
7.0
• Available in Tape and Reel
• Dynamic dV/dt Rating
• Repetitive Avalanche Rated
• Fast Switching
Q
gd
(nC)
23
Configuration
Single
• Ease of Paralleling
• Simple Drive Requirements
• Compliant to RoHS Directive 2002/95/EC
D
D
2
P
A
K (TO-263)
G
S
D
G
S
N-Channel MOSFET
ABSOLUTE MAXIMUM RATINGS
(T
C
= 25 °C, unless otherwise noted)
PARAMETER
SYMBOL
LIMIT
200
20
UNIT
Drain-Source Voltage
Gate-Source Voltage
V
DS
V
V
GS
T
C
= 25 °C
C
= 100 °C
10
Continuous Drain Current
V
GS
at 10 V
I
D
T
6.7
36
A
Pulsed Drain Current
a
I
DM
Linear Derating Factor
0.59
0.025
250
9.0
W/°C
Linear Derating Factor (PCB Mount)
e
Single Pulse Avalanche Energy
b
Repetitive Avalanche Current
a
Repetitive Avalanche Energy
a
Maximum Power Dissipation
Maximum Power Dissipation (PCB Mount)
e
E
AS
I
AR
mJ
A
E
AR
7.4
mJ
T
C
= 25 °C
74
P
D
W
T
A
= 25 °C
3.0
* Pb containing terminations are not RoHS compliant, exemptions may apply
Peak Diode Recovery dV/dt
c
dV/dt
5.0
V/ns
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1
VBL1203M
ABSOLUTE MAXIMUM RATINGS
(T
C
= 25 °C, unless otherwise noted)
PARAMETER
SYMBOL
LIMIT
– 55 to + 150
300
d
UNIT
Operating Junction and Storage Temperature Range
Soldering Recommendations (Peak Temperature)
T
J
, T
stg
°C
for 10 s
Notes
a. Repetitive
rating; pulse width limited by maximum junction temperature (see fig. 11).
b. V
DD
= 50 V, starting T
J
= 25 °C, L = 4.6 mH, R
g
= 25
, I
AS
= 9.0 A (see fig. 12).
c. I
SD
9.0 A, dI/dt
120 A/μs, V
DD
V
DS
, T
J
150 °C.
d. 1.6
mm from case.
e. When
mounted on 1″ square PCB (FR-4 or G-10 material).
.
THERMAL RESISTANCE RATINGS
PARAMETER
SYMBOL
MIN.
TYP.
MAX.
UNIT
Maximum Junction-to-Ambient
(PCB Mount)
c
R
thJA
–
–
40
°C/W
–
–
–
–
62
Maximum Junction-to-Ambient
R
thJA
R
thJC
Maximum Junction-to-Case (Drain)
1.7
SPECIFICATIONS
(T
J
= 25 °C, unless otherwise noted)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN.
TYP.
MAX. UNIT
Static
Drain-Source Breakdown Voltage
V
DS
V
DS
/T
J
V
GS(th)
I
GSS
V
GS
= 0, I
D
= 250 μA
Reference to 25 °C, I
D
= 1 mA
V
DS
= V
GS
, I
D
= 250 μA
200
–
–
–
V
V/°C
V
–
2.0
–
0.24
V
DS
Temperature Coefficient
Gate-Source Threshold Voltage
Gate-Source Leakage
–
4.0
100
25
250
–
V
GS
=
20 V
–
nA
V
DS
= 200 V, V
GS
= 0 V
–
–
Zero Gate Voltage Drain Current
I
DSS
μA
V
DS
= 160V, V
GS
= 0 V, T
J
= 125 °C
–
–
0.30
–
Drain-Source On-State Resistance
Forward Transconductance
Dynamic
R
DS(on)
g
fs
V
GS
= 10 V
I
D
= 5.4 A
b
–
V
DS
= 50 V, I
D
= 5.4 A
b
3.8
–
S
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
Turn-On Delay Time
Rise Time
C
iss
C
oss
C
rss
Q
g
–
–
–
–
–
–
–
–
–
–
800
240
76
–
–
–
V
GS
= 0 V,
V
DS
= 25 V,
f = 1.0 MHz, see fig. 5
pF
nC
–
43
7.0
23
–
I
D
= 5.9 A, V
DS
= 160 V
Q
gs
Q
gd
t
d(on)
t
r
V
GS
= 10 V
–
see fig. 6 and 13
b
–
9.4
28
39
20
V
DD
= 100 V, I
D
= 5.9 A
R
g
= 12
, R
D
= 16
see fig. 10
b
–
ns
Turn-Off Delay Time
Fall Time
t
d(off)
t
f
–
–
D
Between lead,
Internal Drain Inductance
Internal Source Inductance
L
D
L
S
–
–
4.5
7.5
–
–
6 mm (0.25″) from
package and center of
die contact
nH
G
S
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VBL1203M
SPECIFICATIONS
(T
J
= 25 °C, unless otherwise noted)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN.
TYP.
MAX. UNIT
Drain-Source Body Diode Characteristics
MOSFET symbol
showing the
integral reverse
p – n junction diode
D
Continuous Source-Drain Diode Current
Pulsed Diode Forward Current
a
I
S
–
–
–
–
9.0
A
G
I
SM
36
S
Body Diode Voltage
V
SD
t
rr
T
J
= 25 °C, I
S
= 9.0 A, V
GS
= 0 V
b
–
–
–
–
2.0
340
2.2
V
Body Diode Reverse Recovery Time
Body Diode Reverse Recovery Charge
Forward Turn-On Time
170
1.1
ns
μC
T
J
= 25 °C, I
F
= 5.9 A,
dI/dt = 100 A/μs
b
Q
rr
t
on
Intrinsic turn-on time is negligible (turn-on is dominated by L
S
and L
D
)
Notes
a. Repetitive
rating; pulse width limited by maximum junction temperature (see fig. 11).
b. Pulse
width
300 μs; duty cycle
2 %.
c. When
mounted on 1″ square PCB (FR-4 or G-10 material).
TYPICAL CHARACTERISTICS
(25 °C, unless otherwise noted)
V
GS
V
GS
T
o
p
T
o
p
15 V
15 V
10 V
10 V
8.0 V
8.0 V
7.0 V
6.0 V
5.5 V
5.0 V
4.5 V
10
1
10
0
10
-1
7.0 V
6.0 V
10
1
5.5 V
5.0 V
Bottom 4.5
V
4.5 V
Bottom
10
0
4.5 V
20 µs Pulse Width
20 µs Pulse Width
T
C
=
150 °C
T
C
=
25 °C
10
-1
10
0
10
1
10
0
10
1
10
-1
10
-1
V
DS
, Drain-to-Source Voltage (V)
V
DS
,
Drain-to-Source Voltage (V)
91032_01
91032_02
Fig. 1 – Typical Output Characteristics, T
C
= 25 °C
Fig. 2 – Typical Output Characteristics, T
C
= 150 °C
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VBL1203M
1600
1200
800
V
GS
= 0
V
, f = 1
M
Hz
C
iss
= C
gs
+ C
gd
, C
ds
Shorted
C
rss
= C
gd
10
1
C
oss
= C
ds
+ C
gd
150
°
C
C
iss
25
°
C
10
0
C
oss
C
rss
400
0
20 µs Pulse Width
DS
=
50 V
10
-1
V
10
0
10
1
4
5
6
7
8
9
10
V
DS
,
Drain-to-Source Voltage (V)
91032_03
V
GS
,
Gate-to-Source Voltage (V)
91032_05
Fig. 3 – Typical Transfer Characteristics
Fig. 5 – Typical Capacitance vs. Drain-to-Source Voltage
3.0
2.5
2.0
1.5
1.0
0.5
0.0
20
I
D
= 5.9 A
I
D
= 5.9 A
V
GS
= 10 V
V
DS
= 160 V
DS
= 100 V
DS
= 40 V
16
V
V
12
8
4
For test circuit
see figure 13
0
– 60 – 40 – 20
0
20 40 60 80
100 120 140
160
0
20
50
10
30
40
T
J
,
Junction
T
e
mperature (°C)
91032_04
Q
G
,
T
o
tal Gate Charge (nC)
91032_06
Fig. 4 – Normalized On-Resistance vs. Temperature
Fig. 6 – Typical Gate Charge vs. Gate-to-Source Voltage
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VBL1203M
10
8
10
1
150
°
C
6
4
25
°
C
10
0
2
0
V
GS
= 0 V
1.3 1.5
25
50
75
100
125
150
0.5
0.7
0.9
1.1
V
SD
, Source-to-Drain Voltage (V)
T
C
, Case
T
e
mperature (°C)
91032_07
91032_09
Fig. 9 – Maximum Drain Current vs. Case Temperature
Fig. 7 – Typical Source-Drain Diode Forward Voltage
R
D
V
DS
V
GS
D.U.T.
10
3
5
R
g
Operation in this area limited
+
by R
DS(on)
V
DD
–
2
10
2
10 V
5
Pulse width
≤
1 µs
Duty factor
≤
0.1 %
10
µs
2
10
5
100
µs
1
ms
Fig. 10a – Switching Time Test Circuit
2
10
ms
1
V
DS
5
T
C
= 25
°
C
T
J
= 150
°
C
Single Pulse
90 %
2
0.1
2
5
2
5
2
5
2
5
2
5
10
2
10
3
0.1
1
10
10
4
V
DS
, Drain-to-Source Voltage (V)
10 %
V
GS
91032_08
t
d(on)
t
r
t
d(off)
t
f
Fig. 8 – Maximum Safe Operating Area
Fig. 10b – Switching Time Waveforms
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5
VBL1203M
10
1
0
−
0.5
0.2
P
DM
0.1
0.05
0.1
t
1
0.02
0.01
t
2
Single Pulse
(Thermal Response)
Notes:
1. Duty
Factor, D = t
1
/t
2
2. Peak
T
j
= P
DM
x Z
thJC
+ T
C
10
-2
10
-5
10
-4
10
-3
10
-2
0.1
1
10
t
1
, Rectangular Pulse Duration (s)
91032_11
Fig. 11 – Maximum Effective Transient Thermal Impedance, Junction-to-Case
L
V
DS
V
DS
Vary t
p
to obtain
required I
AS
t
p
V
DD
R
g
D.U.T.
+
V
DD
–
V
DS
I
AS
10 V
0.01
Ω
t
p
I
AS
Fig. 12a – Unclamped Inductive Test Circuit
Fig. 12b – Unclamped Inductive Waveforms
600
500
400
300
200
100
I
D
4.0 A
5.7 A
T
o
p
Bottom 9.0
A
V
DD
= 50 V
0
125
25
75
100
150
50
91032_12c
Starting T
J
, Junction
T
e
mperature (°C)
Fig. 12c – Maximum Avalanche Energy vs. Drain Current
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VBL1203M
Current regulator
Same type as D.U.T.
50 k
Ω
Q
G
12 V
0.2 µF
0.3 µF
10 V
+
Q
GS
Q
GD
V
DS
D.U.T.
–
V
G
V
GS
3 mA
Charge
I
G
I
D
Current sampling resistors
Fig. 13b – Gate Charge Test Circuit
Fig. 13a – Basic Gate Charge Waveform
Peak Dio
d
e Recovery
d
V/
d
t Test Circuit
+
Circuit layout con
s
ideration
s
D.U.T.
•
•
•
Low
s
tray inductance
G
round plane
Low leakage inductance
current tran
s
former
–
+
–
–
+
R
g
•
•
•
dV/dt controlled by R
g
Driver
s
ame type a
s
D.U.T.
+
–
V
DD
I
S
D
controlled by duty factor “D”
•
D.U.T. – device under te
s
t
Driver gate drive
P.W.
P.W.
Period
Period
D =
V
GS
= 10 V
a
D.U.T. l
S
D
waveform
D.U.T. V
D
S
waveform
Rever
s
e
recovery
current
Body diode forward
current
dI/dt
Diode recovery
dV/dt
V
DD
Re-applied
voltage
Body diode forward drop
Inductor current
I
S
D
Ripple
≤
5 %
Note
a. V
GS
= 5 V for logic level device
s
Fig. 14 – For N-Channel
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VBL1203M
TO-263AB (HIGH VOLTAGE)
A
B
(Dat
u
m A)
3
4
A
A
E
c2
H
L1
4
Ga
u
ge
plane
4
0° to
8
°
B
5
Detail A
Seating plane
D
H
L
C
C
A1
L3
L4
Detail “A”
1
2
3
L2
Rotated 90° CW
B
B
scale
8
:1
A
2 x
b
2
2 x
b
c
E
M
M
B
0.010
A
M
0.004
B
2 x e
Base
metal
5
D1
4
Plating
(c)
b
1,
b
3
5
c1
(
b
,
b
2)
Lead tip
4
E1
Section B – B and C – C
Scale: none
V
ie
w
A – A
MILLIMETERS
INCHES
MILLIMETERS
INCHES
MIN. MAX.
DIM.
A
MIN.
4.06
0.00
0.51
0.51
1.14
1.14
0.38
0.38
1.14
8.38
MAX.
4.83
0.25
0.99
0.89
1.78
1.73
0.74
0.58
1.65
9.65
MIN.
0.160
0.000
0.020
0.020
0.045
0.045
0.015
0.015
0.045
0.330
MAX.
0.190
0.010
0.039
0.035
0.070
0.068
0.029
0.023
0.065
0.380
DIM.
D1
E
MIN.
6.86
MAX.
–
10.67
–
0.270
0.380
0.245
–
0.420
–
A1
b
9.65
6.22
E1
e
b1
b2
b3
c
2.54 BSC
0.100 BSC
H
14.61
15.88
2.79
1.65
1.78
0.575
0.625
0.110
0.066
0.070
L
1.78
0.070
L1
L2
L3
L4
–
–
–
–
c1
c2
D
0.25 BSC
0.010 BSC
4.78
5.28
0.188
0.208
ECN: S-82110-Rev. A, 15-Sep-08
D
W
G: 5970
Notes
1. Dimensioning and tolerancing per ASME Y14.5M-1994.
2. Dimensions are shown in millimeters (inches).
3. Dimension D and E do not include mold flash. Mold flash shall not exceed 0.127 mm (0.005″) per side. These dimensions are measured at the
outmost extremes of the plastic body at datum A.
4. Thermal PAD contour optional within dimension E, L1, D1 and E1.
5. Dimension b1 and c1 apply to base metal only.
6. Datum A and B to be determined at datum plane H.
7. Outline conforms to JEDEC outline to TO-263AB.
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VBL1203M
Disclaimer
All products due to improve reliability, function or design or for other reasons, product specifications and
data are subject to change without notice.
Taiwan VBsemi Electronics Co., Ltd., branches, agents, employees, and all persons acting on its or their
representatives (collectively, the “
T
aiwan VBsemi”), assumes no responsibility for any errors, inaccuracies or
incomplete data contained in the table or any other any disclosure of any information related to the
product.(www.VBsemi.com)
Taiwan VBsemi makes no guarantee, representation or warranty on the product for any particular purpose of
any goods or continuous production.
T
o
t
he maximum extent permitted by applicable law on
T
aiwan VBsemi
relinquished: (1) any application and all liability arising out of or use of any products; (2) any and all liability,
including but not limited to special, consequential damages or incidental ; (3) any and all implied warranties,
including a particular purpose, non-infringement and merchantability guarantee.
Statement on certain types of applications are based on knowledge of the product is often used in a typical
application of the general product VBsemi
T
aiwan demand that the Taiwan VBsemi of. Statement on whether the
product is suitable for a particular application is non-binding. It is the customer’s responsibility to verify specific
product features in the products described in the specification is appropriate for use in a particular application.
Parameter data sheets and technical specifications can be provided may vary depending on the application and
performance over time. All operating parameters, including typical parameters must be made by customer’s
technical experts validated for each customer application. Product specifications do not expand or modify
T
aiwan
VBsemi purchasing terms and conditions, including but not limited to warranty herein.
Unless expressly stated in writing,
T
aiwan VBsemi products are not intended for use in medical, life saving,
or life sustaining applications or any other application. Wherein VBsemi product failure could lead to personal
injury or death, use or sale of products used in
T
aiwan VBsemi such applications using client did not express their
own risk. Contact your authorized
T
aiwan VBsemi people who are related to product design applications and
other terms and conditions in writing.
The information provided in this document and the company’s products without a license, express or implied,
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names and trademarks referred to herein are trademarks of their respective representatives will be all.
Material Category Policy
Taiwan VBsemi Electronics Co., Ltd., hereby certify that all of the products are determined to be
oHS compliant and meets the definition of restrictions under Directive of the European Parliament
2011/65 / EU, 2011 Nian. 6. 8 Ri Yue restrict the use of certain hazardous substances in electrical and
electronic equipment (EEE) – modification, unless otherwise specified as inconsistent.(www.VBsemi.com)
Please note that some documents may still refer to Taiwan VBsemi RoHS Directive 2002/95 / EC. We
confirm that all products identified as consistent with the Directive 2002/95 / EC European Directive
2011/65 /.
Taiwan VBsemi Electronics Co., Ltd. hereby certify that all of its products comply identified as
halogen-free halogen-free standards required by the JEDEC JS709A. Please note that some Taiwanese
VBsemi documents still refer to the definition of IEC 61249-2-21, and we are sure that all products
conform to confirm compliance with IEC 61249-2-21 standard level JS709A.
