VBsemi-Elec-VBM16036N
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N-Channel 600-V (D-S) MOSFET
PRODUCT SUMMARY
V
DS
(V) at T
J
max.
R
DS(on)
(
Ω
) at 25 °C
Q
g
max. (nC)
FEATURES
60
0
•
•
•
•
•
•
Reduced t
rr
, Q
rr
, and I
RRM
0.288
V
GS
= 10 V
Low figure-of-merit (FOM) R
on
x Q
g
Low input capacitance (C
iss
)
Low switching losses due to reduced Q
rr
Ultra low gate charge (Q
g
)
95
Q
gs
(nC)
19
24
Q
gd
(nC)
Avalanche energy rated (UIS)
Configuration
Single
APPLICATIONS
•
Telecommunications
Server and telecom power supplies
Lighting
High-intensity discharge (HID)
Fluorescent ballast lighting
Consumer and
computing
ATX power supplies
Industrial
–
•
–
–
•
•
–
–
Welding
–
Battery chargers
•
•
Renewable energy
Solar (PV inverters)
Switch mode power supplies (SMPS)
–
TO-220AB
D
G
S
N-Channel MOSFET
G D S
Top View
ABSOLUTE MAXIMUM RATINGS
(T
C
= 25 °C, unless otherwise noted)
PARAMETER
SYMBOL
LIMIT
600
UNIT
V
DS
V
GS
Drain-Source Voltage
Gate-Source Voltage
V
± 30
15
T
C
= 25 °C
Continuous Drain Current (T
J
= 150 °C)
V
GS
at 10 V
I
D
T
C
= 100 °C
10
53
A
Pulsed Drain Current
a
I
DM
Linear Derating Factor
Single Pulse Avalanche Energy
b
1.7
W/°C
mJ
W
E
AS
367
Maximum Power Dissipation
P
D
208
T
J
, T
stg
Operating Junction and Storage Temperature Range
Drain-Source Voltage Slope
Reverse Diode dV/dt
d
-55 to +150
37
°C
T
J
= 125 °C
dV/dt
V/ns
°C
31
Soldering Recommendations (Peak Temperature)
c
for 10 s
300
Notes
a.
Repetitive rating; pulse width limited by maximum junction temperature.
b.
V
DD
= 50 V, starting T
J
= 25 °C, L = 28.2 mH, R
g
= 25
, I
AS
= 5.1 A.
c.
1.6 mm from case.
d.
I
SD
I
D
, dI/dt = 100 A/μs, starting T
J
= 25 °C.
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1
THERMAL RESISTANCE RATINGS
PARAMETER
SYMBOL
TYP.
MAX.
UNIT
R
thJA
R
thJC
Maximum Junction-to-Ambient
Maximum Junction-to-Case (Drain)
–
–
62
°C/W
0.5
SPECIFICATIONS
(T
J
= 25 °C, unless otherwise noted)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN.
TYP.
MAX. UNIT
Static
V
DS
Drain-Source Breakdown Voltage
V
DS
Temperature Coefficient
Gate-Source Threshold Voltage (N)
V
GS
= 0 V, I
D
= 250 μA
Reference to 25 °C, I
D
= 1 mA
V
DS
= V
GS
, I
D
= 250 μA
V
GS
= ± 20 V
600
–
–
V
V/°C
V
V
DS
/T
J
–
2
–
–
–
–
–
–
0.67
–
V
GS(th)
–
–
–
–
4
± 100
± 1
1
nA
μA
Gate-Source Leakage
I
GSS
V
GS
= ± 30 V
V
DS
= 520 V, V
GS
= 0 V
Zero Gate Voltage Drain Current
I
DSS
μA
V
DS
= 520 V, V
GS
= 0 V, T
J
= 125 °C
V
GS
= 10 V
I
D
= 11 A
–
500
–
0.288
R
DS(on)
Drain-Source On-State Resistance
Forward Transconductance
Dynamic
g
fs
V
DS
= 30 V, I
D
= 11 A
7.0
–
S
C
iss
C
oss
C
rss
Input Capacitance
–
–
–
1900
105
4
–
–
–
V
GS
= 0 V,
V
DS
= 100 V,
f = 1 MHz
Output Capacitance
Reverse Transfer Capacitance
pF
nC
Effective Output Capacitance, Energy
Related
a
C
o(er)
C
o(tr)
–
–
84
–
–
V
DS
= 0 V to 520 V, V
GS
= 0 V
Effective Output Capacitance, Time
Related
b
293
Total Gate Charge
Q
g
Q
gs
Q
gd
t
d(on)
–
–
–
–
–
–
–
–
71
9
95
–
Gate-Source Charge
Gate-Drain Charge
Turn-On Delay Time
Rise Time
V
GS
= 10 V
I
D
= 11 A, V
DS
= 520 V
24
22
34
68
42
0.78
–
44
68
102
84
–
t
r
V
DD
= 520 V, I
D
= 11 A,
V
GS
= 10 V, R
g
= 9.1
ns
t
d(off)
Turn-Off Delay Time
Fall Time
t
f
Gate Input Resistance
Drain-Source Body Diode Characteristics
R
g
f = 1 MHz, open drain
MOSFET symbol
D
Continuous Source-Drain Diode Current
Pulsed Diode Forward Current
I
S
–
–
–
–
15
53
showing the
A
G
integral reverse
p – n junction diode
I
SM
S
V
SD
t
rr
Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
Reverse Recovery Current
T
J
= 25 °C, I
S
= 11 A, V
GS
= 0 V
–
–
–
–
0.9
160
1.2
14
1.2
V
ns
μC
A
–
–
–
T
J
= 25 °C, I
F
= I
S
= 11 A,
dI/dt = 100 A/μs, V
R
= 25 V
Q
rr
I
RRM
Notes
a.
C
oss(er)
is a fixed capacitance that gives the same energy as C
oss
while V
DS
is rising from 0 % to 80
%
V
DSS
b.
C
oss(tr)
is a fixed capacitance that gives the same charging time as C
oss
while V
DS
is rising from 0 % to 80 % V
DSS
.
.
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2
TYPICAL CHARACTERISTICS
(25 °C, unless otherwise noted)
60
3
2.5
2
TOP 1
5
V
T
J
= 25 °C
14 V
I
D
= 11 A
13 V
12 V
11 V
10 V
9 V
8 V
7 V
6 V
5 V
50
40
30
20
1.5
1
V
GS
= 10 V
0.5
0
10
0
0
5
10
15
20
25
30
– 60 – 40 – 20 0
20 40
60 80 100 120 140 160
T
J
, Junction Temperature (°C)
V
DS
, Drain-to-Source Voltage (V)
Fig. 1 – Typical Output Characteristics
Fig. 4 – Normalized On-Resistance vs. Temperature
40
30
20
10
0
10 000
TOP 15 V
14 V
T
J
= 150 °C
C
iss
13 V
12 V
11 V
10 V
9 V
8 V
7 V
V
GS
= 0 V, f = 1 MHz
C
iss
= C
gs
+ C
gd
, C
ds
Shorted
C
rss
= C
gd
1000
100
10
6 V
5 V
C
oss
= C
ds
+ C
gd
C
oss
C
rss
1
0
5
10
15
20
25
30
0
100
200
300
400
500
600
V
DS
, Drain-to-Source Voltage (V)
V
DS
, Drain-to-Source Voltage (V)
Fig. 2 – Typical Output Characteristics
Fig. 5 – Typical Capacitance vs. Drain-to-Source Voltage
14
60
50
5000
500
50
12
10
8
40
30
20
C
oss
E
oss
6
T
J
= 150 °C
4
T = 2 5 °C
10
0
J
2
V
DS
= 29.6 V
20 25
0
0
5
10
15
0
100
200
300
V
DS
400
500
600
V
GS
, Gate-to-Source Voltage (V)
Fig. 3 – Typical Transfer Characteristics
Fig. 6 – C
oss
and E
oss
vs. V
DS
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3
24
20
25
20
15
10
V
DS
= 520 V
V
DS
= 325 V
V
DS
= 1
30 V
16
12
8
5
0
4
0
0
30
60
90
120
150
25
50
75
100
125
150
Q
g
, Total Gate Charge (nC)
T
J
, Case Temperature (°C)
Fig. 7
–
T
ypical Gate Charge vs. Gate-to-Source Voltage
Fig. 10 – Maximum Drain Current vs. Case Temperature
850
100
I
D
= 10 mA
825
T
J
= 150 °C
800
775
750
T
J
= 25 °C
10
725
1
700
675
650
V
GS
= 0 V
0.1
– 60 – 40 – 20 0
20 40 60 80 100 120 140 160
0.2
0.4
0.6
0.8
1
1.2
1.4
1.6
T
J
, Junction Temperature (°C)
V
SD
, Source-Drain Voltage (V)
Fig. 8 – Typical Source-Drain Diode Forward Voltage
Fig. 11 – Temperature vs. Drain-to-Source Voltage
100
10
I
DM
Limited
100 μs
Limited by R
DS(on)
*
1
1 ms
Operation in this Area
Limited by R
DS(on)
10 ms
0.1
0.01
T
C
= 25 °C
T
J
= 150 °C
Single Pulse
BVDSS Limited
100
1
10
1000
V
DS
, Drain-to-Source Voltage (V)
* V
GS
> minimum V
GS
at which R
DS(on)
is specified
Fig. 9 – Maximum Safe Operating Area
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1
Duty Cycle = 0.5
0.2
0.1
0.1
0.05
0.02
Single Pulse
0.01
0.0001
0.001
0.01
0.1
1
Pulse Time(s)
Fig. 12 – Normalized Thermal Transient Impedance, Junction-to-Case
R
D
V
DS
V
DS
t
p
V
GS
V
DD
D.U.T.
R
G
+
–
V
DD
V
DS
10 V
Pulse width ≤ 1 µs
Duty factor ≤ 0.1 %
I
AS
Fig. 13 – Switching Time Test Circuit
Fig. 16 – Unclamped Inductive Waveforms
V
DS
Q
G
10 V
90 %
Q
GD
Q
GS
10 %
V
GS
V
G
t
d(on)
t
r
t
d(off)
t
f
Charge
Fig. 17 – Basic Gate Charge Waveform
Fig. 14
–
S
witching Time Waveforms
Current regulator
L
Same type as D.U.T.
V
DS
Vary t
p
to obtain
required I
AS
50 k
Ω
12 V
0.2 µF
R
G
D.U.T
I
AS
0.3 µF
+
–
V
DD
+
–
V
DS
D.U.T.
10 V
V
GS
0.01
Ω
t
p
3 mA
Fig. 15 – Unclamped Inductive Test Circuit
I
G
I
D
Current sampling resistors
Fig. 18 – Gate Charge Test Circuit
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5
Peak Diode Recovery dV/dt Test Circuit
+
Circuit layout
considerations
Low stray
inductance
Ground plane
D.U.T.
Low leakage inductance
current transformer
–
+
–
–
+
R
g
+
–
dV/dt controlled by R
g
Driver same type as D.U.T.
I
SD
controlled by duty factor “D”
D.U.T. – device under test
V
DD
Driver gate drive
P.W.
P.W.
Period
Period
D =
V
GS
= 10 V
a
D.U.T. l
SD
waveform
D.U.T. V
DS
waveform
Reverse
recovery
current
Body diode forward
current
dI/dt
Diode recovery
dV/dt
V
DD
Re-applied
voltage
Body diode forward drop
Inductor current
I
SD
Ripple
5 %
Note
a. V
GS
= 5 V for logic level devices
Fig. 19 – For N-Channel
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6
VBM16036N
TO-220AB
MILLIMETERS
MIN.
INCHES
A
E
DIM.
MAX.
4.65
1.01
1.73
0.61
15.49
10.51
2.67
5.28
1.40
6.48
2.92
14.02
3.82
3.94
3.00
MIN.
MAX.
0.183
0.040
0.068
0.024
0.610
0.414
0.105
0.208
0.055
0.255
0.115
0.552
0.150
0.155
0.118
F
A
b
4.25
0.69
1.20
0.36
14.85
10.04
2.41
4.88
1.14
6.09
2.41
13.35
3.32
3.54
2.60
0.167
0.027
0.047
0.014
0.585
0.395
0.095
0.192
0.045
0.240
0.095
0.526
0.131
0.139
0.102
Ø P
b(1)
c
D
E
e
e(1)
F
H(1)
J(1)
L
1
3
2
L(1)
Ø P
Q
*
M
b(1)
ECN: X12-0208-Rev. N, 08-Oct-12
DWG: 5471
Notes
* M = 1.32 mm to 1.62 mm (dimension including protrusion)
Heatsink hole for HVM
C
b
e
J(1)
e(1)
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7
VBM16036N
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