VBsemi-Elec-VBQF2202K
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VBQF2202K
V (D-S) MOSFET
P-Channel 200
FEATURES
PRODUCT SUMMARY
V
DS
(V)
• Surface mount
• Available in tape and reel
• Dynamic dV/dt rating
• Repetitive avalanche rated
• P-channel
• Fast switching
• Ease of paralleling
-200
R
DS(on)
(
)
V
GS
= -10 V
2.
0
Available
Available
Q
g
max. (nC)
Q
gs
(nC)
29
5.4
Q
gd
(nC)
15
Configuration
Single
S
DFN 3×3 EP
Bottom View
Top View
Top View
G
1
8
2
3
7
6
4
5
D
P-Channel MO
S
FET
Pin 1
ABSOLUTE MAXIMUM RATINGS
(T
C
= 25 °C, unless otherwise noted)
PARAMETER
SYMBOL
LIMIT
-200
20
UNIT
Drain-Source Voltage
Gate-Source Voltage
V
DS
V
V
GS
T
C
= 25 °C
-3.6
Continuous Drain Current
V
GS
at -10 V
I
D
T
C
= 100 °C
-2.5
A
Pulsed Drain Current
a
I
DM
-12
Linear Derating Factor
0.59
0.025
500
W/°C
Linear Derating Factor (PCB mount)
e
Single Pulse Avalanche Energy
b
Avalanche Current
a
E
AS
I
AR
mJ
A
-6.4
Repetitive Avalanche Energy
a
E
AR
7.4
mJ
Maximum Power Dissipation
T
C
= 25 °C
74
P
D
W
V/ns
°C
Maximum Power Dissipation (PCB mount)
e
Peak Diode Recovery dV/dt
c
T
A
= 25 °C
3.0
dV/dt
-5.0
Operating Junction and Storage Temperature Range
Soldering Recommendations (Peak temperature)
d
T
J
, T
stg
-55 to +150
300
for 10 s
Notes
a. Repetitive
rating; pulse width limited by maximum junction temperature (see fig. 11).
b. V
DD
= -50 V, starting T
J
= 25 °C, L = 17 mH, R
g
= 25
, I
AS
= -6.5 A (see fig. 12).
c. I
SD
-6.5 A, dI/dt
120 A/μs, V
DD
V
DS
, T
J
150 °C.
d. 1.6
mm from case.
e. When
mounted on 1″ square PCB (FR-4 or G-10 material).
1
VBQF2202K
THERMAL RESISTANCE RATINGS
PARAMETER
SYMBOL
TYP.
MAX.
UNIT
Maximum Junction-to-Ambient
R
thJA
R
thJA
R
thJC
–
62
Maximum Junction-to-Ambient
–
–
40
°C/W
(PCB mount)
a
Maximum Junction-to-Case (Drain)
1.7
Note
a. When
mounted on 1″ square PCB (FR-4 or G-10 material).
SPECIFICATIONS
(T
J
= 25 °C, unless otherwise noted)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN.
TYP.
MAX. UNIT
Static
Drain-Source Breakdown Voltage
V
DS
V
DS
/T
J
V
GS(th)
I
GSS
V
GS
= 0, I
D
= -250 μA
Reference to 25 °C, I
D
= -1 mA
V
DS
= V
GS
, I
D
= -250 μA
-200
–
–
–
V
V/°C
V
V
DS
Temperature Coefficient
–
-0.24
Gate-Source Threshold Voltage
Gate-Source Leakage
-1.5
–
-4.0
10
– 100
-500
–
V
GS
DS
= -200 V, V
GS
= 0 V
V
DS
= -160 V, V
GS
= 0 V, T
J
= 125 °C
V
GS
= -10 V
I
D
= -1.0 A
b
=
20 V
–
–
–
μA
V
–
Zero Gate Voltage Drain Current
I
DSS
μA
–
–
2.00
–
Drain-Source On-State Resistance
Forward Transconductance
Dynamic
R
DS(on)
g
fs
–
V
DS
= -50 V, I
D
= -1.0 A
b
2.8
–
S
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
Turn-On Delay Time
Rise Time
C
iss
C
oss
C
rss
Q
g
–
–
–
–
–
–
–
–
–
–
700
200
40
–
–
–
V
GS
= 0 V,
V
DS
= -25 V,
f = 1.0 MHz, see fig. 5
pF
–
29
5.4
15
–
I
D
= -3.5A, V
DS
= -160 V,
see fig. 6 and 13
b
Q
gs
Q
gd
t
d(on)
t
r
V
GS
= -10 V
–
nC
–
12
27
28
24
–
V
DD
= -100 V, I
D
= -3.5A,
ns
R
g
= 12
, R
D
= 15
, see fig. 10
b
Turn-Off Delay Time
Fall Time
t
d(off)
t
f
–
–
D
Between lead,
6 mm (0.25″) from
Internal Drain Inductance
Internal Source Inductance
L
D
–
4.5
–
nH
package and center of
die contact
G
L
S
R
g
–
7.5
–
–
S
Gate Input Resistance
f = 1 MHz, open drain
0.6
3.7
Drain-Source Body Diode Characteristics
MOSFET symbol
D
Continuous Source-Drain Diode Current
Pulsed Diode Forward Current
a
I
S
–
–
–
–
-3 .5
-6
showing the
A
integral reverse
G
I
SM
p – n junction diode
S
Body Diode Voltage
V
SD
t
rr
T
J
= 25 °C, I
S
= -3.5A, V
GS
= 0 V
b
–
–
–
–
-6.5
300
2.9
V
Body Diode Reverse Recovery Time
Body Diode Reverse Recovery Charge
Forward Turn-On Time
200
1.9
ns
μC
b
T
J
= 25 °C, I
F
= -3.5A, dI/dt = 100 A/μs
Q
rr
t
on
Intrinsic turn-on time is negligible (turn-on is dominated by L
S
and L
D
)
Notes
a. Repetitive
rating; pulse width limited by maximum junction temperature (see fig. 11).
b. Pulse
width
300 μs; duty cycle
2 %.
2
VBQF2202K
TYPICAL CHARACTERISTICS
(25 °C, unless otherwise noted)
3.0
2.5
V
GS
I
D
= – 3.5 A
V
GS
= – 10 V
T
o
p
– 15 V
– 10 V
– 8.0 V
– 7.0 V
– 6.0 V
– 5.5 V
– 5.0 V
10
1
10
0
10
-1
2.0
1.5
1.0
0.5
0.0
– 4.5 V
Bottom – 4.5 V
20 µs Pulse Width
T
C
=
25 °C
10
-1
10
0
10
1
– 60 – 40 – 20
0
20 40 60
100 120 140 160
80
– V
DS
, Drain-to-Source Voltage (V)
91085_01
T
J
,
Junction
T
e
mperature (°C)
91085_04
Fig. 1 – Typical Output Characteristics, T
C
= 25 °C
Fig. 4 – Normalized On-Resistance vs. Temperature
1200
V
GS
V
GS
= 0
V
, f = 1
M
Hz
T
o
p
– 15 V
– 10 V
– 8.0 V
– 7.0 V
– 6.0 V
– 5.5 V
– 5.0 V
– 4.5 V
C
iss
= C
gs
+ C
gd
, C
ds
Shorted
C
rss
= C
gd
C
oss
= C
ds
+ C
gd
10
1
1000
800
600
400
200
0
C
iss
– 4.5 V
Bottom
10
0
C
oss
C
rss
20 µs Pulse Width
T
C
=
150 °C
10
-1
10
-1
10
0
10
1
10
0
10
1
– V
DS
,
Drain-to-Source Voltage (V)
91085_02
– V
DS
,
Drain-to-Source Voltage (V)
91085_05
Fig. 2 – Typical Output Characteristics, T
C
= 150 °C
Fig. 5 – Typical Capacitance vs. Drain-to-Source Voltage
20
I
D
= – 3.5 A
V
DS
= – 160 V
DS
= – 100 V
DS
= – 40 V
16
10
1
V
150
°
C
25
°
C
V
12
8
10
0
4
20 µs Pulse Width
V
DS
= –
50 V
For test circuit
see figure 13
0
4
5
6
7
8
9
10
0
10
25
30
5
15
20
91085_03
– V
GS
,
Gate-to-Source Voltage (V)
Q
G
,
T
o
tal Gate Charge (nC)
91085_06
Fig. 3 – Typical Transfer Characteristics
Fig. 6 – Typical Gate Charge vs. Gate-to-Source Voltage
3
VBQF2202K
7.0
6.0
5.0
4.0
3.0
2.0
1.0
0.0
10
1
150
°
C
25
°
C
10
0
V
GS
= 0 V
4.5
3.5
10
-1
0.5
1.5
2.5
25
50
75
100
125
150
– V
SD
, Source-to-Drain Voltage (V)
91085_07
T
C
, Case
T
e
mperature (°C)
91085_09
Fig. 7 – Typical Source-Drain Diode Forward Voltage
Fig. 9 – Maximum Drain Current vs. Case Temperature
R
D
10
3
5
V
DS
Operation in this area limited
by R
DS(on)
V
GS
2
D.U.T.
10
2
R
g
–
+
V
DD
5
10
µs
2
– 10 V
10
100
µs
1
ms
Pulse width
≤
1 µs
Duty factor
≤
0.1 %
5
2
1
5
Fig. 10a – Switching Time Test Circuit
t
d(on)
t
r
t
d(off)
t
f
10
ms
T
C
= 25
°
C
T
J
= 150
°
C
Single Pulse
2
V
GS
0.1
2
5
2
5
2
5
2
5
0.1
1
10
10
2
10
3
10 %
– V
DS
, Drain-to-Source Voltage (V)
91085_08
Fig. 8 – Maximum Safe Operating Area
90 %
V
DS
Fig. 10b – Switching Time Waveforms
10
1
D = 0.5
0.2
0.1
P
DM
0.05
0.1
t
1
0.02
0.01
t
2
Single Pulse
(Thermal Response)
Notes:
1. Duty
Factor, D = t
1
/t
2
2. Peak
T
j
= P
DM
x Z
thJC
+ T
C
10
-2
10
-5
10
-4
10
-3
10
-2
0.1
1
10
t
1
, Rectangular Pulse Duration (s)
Fig. 11 – Maximum Effective Transient Thermal Impedance, Junction-to-Case
91085_11
4
VBQF2202K
L
V
DS
Q
G
Vary t
p
to obtain
required I
AS
– 10 V
Q
GS
Q
GD
R
g
D.U.T.
–
V
+
DD
I
AS
V
G
– 10 V
0.01
Ω
t
p
Charge
Fig. 12a – Unclamped Inductive Test Circuit
Fig. 13a – Basic Gate Charge Waveform
Current regulator
Same type as D.U.T.
I
AS
50 k
Ω
12 V
0.2 µF
V
DS
0.3 µF
–
V
+
DS
D.U.T.
V
DD
t
p
V
GS
V
DS
– 3 mA
I
G
I
D
Fig. 12b – Unclamped Inductive Waveforms
Current sampling resistors
Fig. 13b – Gate Charge Test Circuit
1200
I
D
– 2.9 A
– 4.1 A
Bottom –
6.5 A
T
o
p
1000
800
600
400
200
0
V
DD
= – 50 V
25
125
75
100
150
50
91085_12c
Starting T
J
, Junction
T
e
mperature (°C)
Fig. 12c – Maximum Avalanche Energy vs. Drain Current
5
VBQF22
02K
Peak Dio
d
e Recovery
d
V/
d
t Test Circuit
D.U.T.
+
Circuit layout con
s
ideration
s
•
Low stray inductance
•
G
round plane
•
Low leakage inductance
current tran
s
former
–
+
–
+
–
R
g
+
–
•
dV/dt controlled by R
g
•
I
S
D
controlled by duty factor “D”
•
D.U.T. – device under te
s
t
V
DD
Note
•
Compliment N-Channel of D.U.
T
.
f
or driver
Driver gate drive
P.W.
Period
Period
D =
P.W.
V
GS
= – 10 V
a
D.U.T. l
S
D
waveform
Rever
s
e
recovery
current
Body diode forward
current
dI/dt
D.U.T. V
D
S
waveform
Diode recovery
dV/dt
V
DD
Re-applied
voltage
Body diode forward drop
Inductor current
I
S
D
Ripple
≤
5 %
Note
a. V
GS
= – 5 V for logic level and – 3 V drive device
s
Fig. 14 – For P-Channel
6
VBQF2202K
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aiwan VBsemi”), assumes no responsibility for any errors, inaccuracies or
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o
t
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aiwan VBsemi
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aiwan
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