Vishay-Intertech-IRF830APBF
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IRF830A, SiHF830A
Vishay Siliconix
Power MOSFET
FEATURES
• Low Gate Charge Q
g
Results in Simple Drive
Requirement
PRODUCT SUMMARY
V
DS
(V)
500
Available
R
DS(on)
(
Ω
)
V
GS
= 10 V
1.4
RoHS*
• Improved Gate, Avalanche and Dynamic dV/dt
Ruggedness
Q
g
(Max.) (nC)
24
6.3
COMPLIANT
Q
Q
gs
(nC)
gd
(nC)
• Fully Characterized Capacitance and Avalanche Voltage
and Current
11
Configuration
Single
• Effective C
oss
Specified
• Compliant to RoHS Directive 2002/95/EC
D
TO-220AB
APPLICATIONS
• Switch Mode Power Supply (SMPS)
• Uninterruptable Power Supply
• High Speed power Switching
G
TYPICAL SMPS TOPOLOGIES
• Two Transistor Forward
• Half Bridge
S
D
G
S
N-Channel MOSFET
• Full Bridge
ORDERING INFORMATION
Package
TO-220AB
IRF830APbF
SiHF830A-E3
IRF830A
Lead (Pb)-free
SnPb
SiHF830A
ABSOLUTE MAXIMUM RATINGS
(T
C
= 25 °C, unless otherwise noted)
PARAMETER
SYMBOL
LIMIT
UNIT
Drain-Source Voltage
Gate-Source Voltage
V
DS
500
V
V
GS
30
T
C
= 25 °C
5.0
Continuous Drain Current
V
GS
at 10 V
I
D
T
C
= 100 °C
3.2
A
Pulsed Drain Current
a
I
DM
20
0.59
230
Linear Derating Factor
W/°C
mJ
A
Single Pulse Avalanche Energy
b
Repetitive Avalanche Current
a
Repetitive Avalanche Energy
a
E
AS
I
AR
5.0
E
AR
7.4
mJ
W
Maximum Power Dissipation
T
C
= 25 °C
P
D
74
Peak Diode Recovery dV/dt
c
dV/dt
T
J
, T
stg
5.3
V/ns
Operating Junction and Storage Temperature Range
Soldering Recommendations (Peak Temperature)
– 55 to + 150
300
d
10
°C
for 10 s
6-32 or M3 screw
lbf · in
N · m
Mounting Torque
1.1
Notes
a. Repetitive
rating; pulse width limited by maximum junction temperature (see fig. 11).
b. Starting
T
J
= 25 °C, L = 18 mH, R
g
= 25
Ω
, I
AS
= 5.0 A (see fig. 12).
c. I
SD
≤
5.0 A, dI/dt
≤
370 A/μs, V
DD
≤
V
DS
, T
J
≤
150 °C.
d. 1.6
mm from case.
* Pb containing terminations are not RoHS compliant, exemptions may apply
Document Number: 91061
S11-0507-Rev. C, 21-Mar-11
1
This datasheet is subject to change without notice.
IRF830A, SiHF830A
Vishay Siliconix
THERMAL RESISTANCE RATINGS
PARAMETER
SYMBOL
TYP.
MAX.
62
UNIT
Maximum Junction-to-Ambient
Case-to-Sink, Flat, Greased Surface
Maximum Junction-to-Case (Drain)
R
thJA
R
thCS
R
thJC
–
0.50
–
–
°C/W
1.7
SPECIFICATIONS
(T
J
= 25 °C, unless otherwise noted)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN.
TYP.
MAX.
UNIT
Static
Drain-Source Breakdown Voltage
V
DS
Temperature Coefficient
Gate-Source Threshold Voltage
Gate-Source Leakage
V
DS
Δ
V
DS
/T
J
V
GS(th)
I
GSS
V
GS
= 0 V, I
D
= 250 μA
Reference to 25 °C, I
D
= 1 mA
V
DS
= V
GS
, I
D
= 250 μA
500
–
–
–
V
V/°C
V
–
2.0
–
0.60
–
–
–
–
–
–
4.5
V
GS
V
DS
= 500 V, V
GS
= 0 V
V
DS
= 400 V, V
GS
= 0 V, T
J
= 125 °C
V
GS
= 10 V
I
D
= 3.0 A
b
=
30 V
100
25
nA
–
Zero Gate Voltage Drain Current
I
DSS
μA
–
250
1.4
–
Drain-Source On-State Resistance
Forward Transconductance
Dynamic
R
DS(on)
g
fs
–
Ω
V
DS
= 50 V, I
D
= 3.0 A
b
2.8
S
V
GS
= 0 V,
Input Capacitance
C
iss
C
oss
C
rss
C
oss
C
oss
–
–
–
620
93
4.3
886
27
39
–
–
–
–
Output Capacitance
V
DS
= 25 V,
Reverse Transfer Capacitance
Output Capacitance
f = 1.0 MHz, see fig. 5
pF
V
GS
= 0 V; V
DS
= 1.0 V, f = 1.0 MHz
V
GS
= 0 V; V
DS
= 400 V, f = 1.0 MHz
V
GS
= 0 V; V
DS
= 0 V to 400 V
c
Output Capacitance
Effective Output Capacitance
Total Gate Charge
C
oss
eff.
Q
g
–
–
–
24
6.3
11
I
D
= 5.0 A, V
DS
= 400 V,
V
GS
= 10 V
Gate-Source Charge
Gate-Drain Charge
Q
gs
Q
gd
–
–
nC
ns
see fig. 6 and 13
b
Turn-On Delay Time
Rise Time
t
d(on)
t
r
t
d(off)
t
f
–
–
–
–
10
21
21
15
–
–
–
–
V
DD
= 250 V, I
D
= 5.0 A,
Turn-Off Delay Time
Fall Time
R
g
= 14
Ω
, R
D
= 49
Ω
, see fig. 10
b
Drain-Source Body Diode Characteristics
MOSFET symbol
showing the
integral reverse
p – n junction diode
D
Continuous Source-Drain Diode Current
Pulsed Diode Forward Current
a
I
S
–
–
–
5.0
20
A
G
I
SM
–
–
S
T
J
= 25 °C, I
S
= 5.0 A, V
GS
= 0 V
b
1.5
650
2.4
V
Body Diode Voltage
V
SD
t
rr
–
–
–
Body Diode Reverse Recovery Time
Body Diode Reverse Recovery Charge
Forward Turn-On Time
430
ns
μC
T
J
= 25 °C, I
F
= 5.0 A, dI/dt = 100 A/μs
b
Q
rr
t
on
1.62
Intrinsic turn-on time is negligible (turn-on is dominated by L
S
and L
D
)
Notes
a. Repetitive
rating; pulse width limited by maximum junction temperature (see fig. 11).
b. Pulse
width
≤
300 μs; duty cycle
≤
2 %.
c. C
oss
eff. is a fixed capacitance that gives the same charging time as C
oss
while V
DS
is rising from 0 % to 80 % V
DS
.
2
Document Number: 91061
S11-0507-Rev. C, 21-Mar-11
This datasheet is subject to change without notice.
IRF830A, SiHF830A
Vishay Siliconix
TYPICAL CHARACTERISTICS
(25 °C, unless otherwise noted)
Fig. 1 – Typical Output Characteristics
Fig. 3 – Typical Transfer Characteristics
Fig. 2 – Typical Output Characteristics
Fig. 4 – Normalized On-Resistance vs. Temperature
Document Number: 91061
S11-0507-Rev. C, 21-Mar-11
3
This datasheet is subject to change without notice.
IRF830A, SiHF830A
Vishay Siliconix
Fig. 5 – Typical Capacitance vs. Drain-to-Source Voltage
Fig. 7 – Typical Source-Drain Diode Forward Voltage
Fig. 6 – Typical Gate Charge vs. Gate-to-Source Voltage
Fig. 8 – Maximum Safe Operating Area
4
Document Number: 91061
S11-0507-Rev. C, 21-Mar-11
This datasheet is subject to change without notice.
IRF830A, SiHF830A
Vishay Siliconix
R
D
V
DS
V
GS
D.U.T.
R
G
+
V
–
DD
10 V
Pulse width
≤
1 µs
Duty factor
≤
0.1 %
Fig. 10a – Switching Time Test Circuit
V
DS
90 %
10 %
V
GS
t
d(on)
t
r
t
d(off)
t
f
Fig. 9 – Maximum Drain Current vs. Case Temperature
Fig. 10b – Switching Time Waveforms
10
1
D = 0.50
0.20
0.10
P
DM
0.05
0.1
t
1
t
2
0.02
0.01
Notes:
Single Pulse
(Thermal Response)
1. Duty
Factor, D = t
1
/t
2
2. Peak
T
j
= P
DM
x Z
thJC
+ T
C
10
-2
10
-5
10
-4
10
-3
10
-2
0.1
1
t
1
, Rectangular Pulse Duration (s)
91061_11
Fig. 11 – Maximum Effective Transient Thermal Impedance, Junction-to-Case
Document Number: 91061
S11-0507-Rev. C, 21-Mar-11
5
This datasheet is subject to change without notice.
IRF830A, SiHF830A
Vishay Siliconix
15 V
Q
G
10 V
Driver
L
V
DS
Q
GS
Q
GD
D.U.T.
I
AS
R
G
V
G
+
–
V
A
DD
20 V
0.01
Ω
t
p
Charge
Fig. 12a – Unclamped Inductive Test Circuit
Fig. 12d –
Basic Gate Charge Waveform
V
DS
t
p
790
785
780
775
770
I
AS
Fig. 12b – Unclamped Inductive Waveforms
500
I
D
2.2 A
3.2 A
T
o
p
1.0
2.0
3.0
4.0
5.0
0.0
400
300
200
100
0
I
AV
, Avalanche Current (A)
91061_12d
Bottom 5.0
A
Fig. 13a – Typical Drain-to-Source Voltage vs.
Avalanche Current
Current regulator
Same type as D.U.T.
50 k
Ω
125
25
75
100
150
50
12 V
0.2 µF
0.3 µF
91061_12c
Starting T
J
, Junction
T
e
mperature (°C)
+
–
V
DS
D.U.T.
Fig. 12c – Maximum Avalanche Energy vs. Drain Current
V
GS
3 mA
I
G
I
D
Current sampling resistors
Fig. 13b – Gate Charge Test Circuit
6
Document Number: 91061
S11-0507-Rev. C, 21-Mar-11
This datasheet is subject to change without notice.
IRF830A, SiHF830A
Vishay Siliconix
Peak Dio
d
e Recovery
d
V/
d
t Test Circuit
+
Circuit layout con
s
ideration
s
•
Low
s
tray inductance
•
G
round plane
D.U.T.
•
Low leakage inductance
current tran
s
former
–
+
–
–
+
R
g
•
dV/dt controlled by R
g
•
Driver
s
ame type a
s
D.U.T.
•
I
S
D
controlled by duty factor “D”
•
D.U.T. – device under te
s
t
+
–
V
DD
Driver gate drive
P.W.
P.W.
D =
Period
Period
V
GS
= 10 V
a
D.U.T. l
S
D
waveform
D.U.T. V
D
S
waveform
Rever
s
e
recovery
current
Body diode forward
current
dI/dt
Diode recovery
dV/dt
V
DD
Re-applied
voltage
Body diode forward drop
Inductor current
I
S
D
Ripple
≤
5 %
Note
a. V
GS
= 5 V for logic level device
s
Fig. 14 – For N-Channel
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and
Document Number: 91061
S11-0507-Rev. C, 21-Mar-11
7
This datasheet is subject to change without notice.
Package Information
Vishay Siliconix
TO-220AB
MILLIMETERS
MIN.
INCHES
MIN.
A
E
DIM.
MAX.
4.65
1.01
1.73
0.61
15.49
12.70
10.51
2.67
5.28
1.40
6.48
2.92
14.02
3.82
3.94
3.00
MAX.
0.183
0.040
0.068
0.024
0.610
0.500
0.414
0.105
0.208
0.055
0.255
0.115
0.552
0.150
0.155
0.118
F
A
b
4.25
0.69
1.20
0.36
14.85
12.19
10.04
2.41
4.88
1.14
6.09
2.41
13.35
3.32
3.54
2.60
0.167
0.027
0.047
0.014
0.585
0.480
0.395
0.095
0.192
0.045
0.240
0.095
0.526
0.131
0.139
0.102
Ø P
b(1)
c
D
D2
E
e
e(1)
F
1
3
2
H(1)
J(1)
L
*
M
L(1)
Ø P
Q
b(1)
ECN: T14-0413-Rev. P, 16-Jun-14
DWG: 5471
Note
* M = 1.32 mm to 1.62 mm (dimension including protrusion)
Heatsink hole for HVM
C
b
e
J(1)
e(1)
D2
Revison: 16-Jun-14
Document Number: 71195
1
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
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Such statements are not binding statements
about the suitability of products for a particular application.
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product with the properties described in the product specification is suitable for use in a particular application.
Parameters
provided in datasheets and/or specifications may vary in different applications and performance may vary over time.
All
operating parameters, including typical parameters, must be validated for each customer application by the customer’s
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including but not limited to the warranty expressed therein.
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Material Category Policy
Vishay Intertechnology, Inc. hereby certifies that all its products that are identified as RoHS-Compliant fulfill the
definitions and restrictions defined under Directive 2011/65/EU of The European Parliament and of the Council
of June 8, 2011 on the restriction of the use of certain hazardous substances in electrical and electronic equipment
(EEE) – recast, unless otherwise specified as non-compliant.
Please note that some Vishay documentation may still make reference to RoHS Directive 2002/95/EC. We confirm that
all the products identified as being compliant to Directive 2002/95/EC conform to Directive 2011/65/EU.
Vishay Intertechnology, Inc. hereby certifies that all its products that are identified as Halogen-Free follow Halogen-Free
requirements as per JEDEC JS709A standards.
Please note that some Vishay documentation may still make reference
to the IEC 61249-2-21 definition.
We confirm that all the products identified as being compliant to IEC 61249-2-21
conform to JEDEC JS709A standards.
Revision: 02-Oct-12
Document Number: 91000
1
