Vishay-Intertech-IRFB17N50LPBF

Part #Vishay-Intertech-IRFB17N50LPBF
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Vishay-Intertech-IRFB17N50LPBF
IRFB17N50L, SiHFB17N50L  
Vishay Siliconix  
Power MOSFET  
FEATURES  
• Low Gate Charge Q

g

results in Simple Drive  
Requirement  
PRODUCT SUMMARY  
V

DS

(V)  
500  
Available  
R

DS(on)

(
)  
V

GS

= 10 V  
0.28  
• Improved Gate, Avalanche and Dynamic dV/dt  
Ruggedness  
RoHS*  
Q

g

(Max.) (nC)  
130  
33  
COMPLIANT  
Q
Q

gs

(nC)  

gd

(nC)  
• Fully Characterized Capacitance and Avalanche Voltage  
and Current  
59  
Configuration  
Single  
• Low t

rr

and Soft Diode Recovery  
D
• Compliant to RoHS Directive 2002/95/EC  
TO-220AB  
APPLICATIONS  
• Switch Mode Power Supply (SMPS)  
• Uninterruptible Power Supply  
• High Speed Power Switching  
• ZVS and High Frequency Circuit  
• PWM Inverters  
G
S
D
S
N-Channel MOSFET  
G
ORDERING INFORMATION  
Package  
TO-220AB  
IRFB17N50LPbF  
SiHFB17N50L-E3  
IRFB17N50L  
Lead (Pb)-free  
SnPb  
SiHFB17N50L  
ABSOLUTE MAXIMUM RATINGS
(T

C

= 25 °C, unless otherwise noted)  
PARAMETER  
SYMBOL  
LIMIT  
UNIT  
Drain-Source Voltage  
Gate-Source Voltage  
V

DS  

500  
V
V

GS  

30  
T

C

= 25 °C  
16  
Continuous Drain Current  
V

GS

at 10 V  
I

D  

T

C

= 100 °C  
11  
A
Pulsed Drain Current

a  

I

DM  

64  
Linear Derating Factor  
1.8  
W/°C  
mJ  
A
Single Pulse Avalanche Energy

b  

Repetitive Avalanche Current

a  

Repetitive Avalanche Energy

a  

E

AS  

I

AR  

390  
16  
E

AR  

22  
mJ  
W
Maximum Power Dissipation  
T

C

= 25 °C  
P

D  

220  
Peak Diode Recovery dV/dt

c  

dV/dt  
T

J

, T

stg  

13  
– 55 to + 150  
300

d  

V/ns  
Operating Junction and Storage Temperature Range  
Soldering Recommendations (Peak Temperature)  
°C  
for 10 s  
10  
lbf · in  
N · m  
Mounting Torque  
6-32 or M3 screw  
1.1  
Notes  
a. Repetitive
 
rating; pulse width limited by maximum junction temperature (see fig. 11).  
b. Starting
 
T

J

= 25 °C, L = 3.0 mH, R

g

= 25
, I

AS

= 16 A (see fig. 12).  
c. I

SD

16 A, dI/dt
347 A/μs, V

DD

V

DS

, T

J

150 °C.  
d. 1.6
 
mm from case.  
* Pb containing terminations are not RoHS compliant, exemptions may apply  
Document Number: 91098  
S11-0514-Rev. B, 21-Mar-11  
1
This datasheet is subject to change without notice.  
THE PRODUCT DESCRIBED HEREIN AND THIS D
A
T
A
SHEET ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT

IRFB17N50L, SiHFB17N50L  
Vishay Siliconix  
THERMAL RESISTANCE RATINGS  
PARAMETER  
SYMBOL  
TYP.  
MAX.  
62  
UNIT  
Maximum Junction-to-Ambient  
Case-to-Sink, Flat, Greased Surface  
Maximum Junction-to-Case (Drain)  
R

thJA  

–
0.50  
–
R

thCS  

–
°C/W  
R

thJC  

0.56  
SPECIFICATIONS
(T

J

= 25 °C, unless otherwise noted)  
PARAMETER  
SYMBOL  
TEST CONDITIONS  
MIN.  
TYP.  
MAX. UNIT  
Static  
Drain-Source Breakdown Voltage  
V

DS  

V

DS

/T

J  

V

GS(th)  

I

GSS  

V

GS

= 0 V, I

D

= 250 μA  
Reference to 25 °C, I

D

= 1 mA  
V

DS

= V

GS

, I

D

= 250 μA  
500  
–
–
–
V
V/°C  
V
V

DS

Temperature Coefficient  
–
3.0  
–
0.6  
Gate-Source Threshold Voltage  
Gate-Source Leakage  
–
5.0  
100  
50  
2.0  
0.32  
–
V

GS  

V

DS

= 500 V, V

GS

= 0 V  

DS

= 400 V, V

GS

= 0 V, T

J

= 125 °C  
V

GS

= 10 V  
I

D

= 9.9 A

b  

V

DS

= 50 V, I

D

= 9.9 A

b  

=
30 V  
–
nA  
μA  
mA  
–
–
Zero Gate Voltage Drain Current  
I

DSS  

V
–
–
0.28  
–
Drain-Source On-State Resistance  
Forward Transconductance  
Dynamic  
R

DS(on)  

g

fs  

–
11  
S
Input Capacitance  
C

iss  

C

oss  

C

rss  

–
–
–
–
–
–
–
–
–
–
–
–
–
2760  
325  
37  
3690  
84  
159  
–
–
–
V

GS

= 0 V,  

DS

= 25 V,  
f = 1.0 MHz, see fig. 5  
Output Capacitance  
V
Reverse Transfer Capacitance  
–
pF  
V

GS

= 0 V  

GS

= 0 V  
V

GS

= 0 V  
V

DS

= 1.0 V , f = 1.0 MHz  
–
Output Capacitance  
C

oss  

V
V

DS

= 400 V , f = 1.0 MHz  
V

DS

= 0 V to 400 V

c  

–
Effective Output Capacitance  
Total Gate Charge  
C

oss

eff.  
–
Q

g  

130  
33  
59  
–
I

D

= 16 A, V

DS

= 400 V,  
see fig. 6 and 13

b  

Gate-Source Charge  
Gate-Drain Charge  
Q

gs  

Q

gd  

t

d(on)  

t

r  

V

GS

= 10 V  
–
nC  
ns  
–
Turn-On Delay Time  
Rise Time  
21  
51  
50  
28  
–
V

DD

= 250 V, I

D

= 16 A,  
R

g

= 7.5
, see fig. 10

b  

Turn-Off Delay Time  
Fall Time  
t

d(off)  

t

f  

–
–
Drain-Source Body Diode Characteristics  
MOSFET symbol  
showing the  
integral reverse  
p – n junction diode  
Continuous Source-Drain Diode Current  
I

S  

–
–
–
–
16  
64  
D
A
G
Pulsed Diode Forward Current

a  

Body Diode Voltage  
I

SM  

V

SD  

t

rr  

S
T

J

= 25 °C, I

S

= 16 A, V

GS

= 0 V

b  

T

J

= 25 °C  
–
–
–
–
–
–
–
1.5  
250  
330  
710  
1210  
11  
V
170  
220  
470  
810  
7.3  
Body Diode Reverse Recovery Time  
ns  
T

J

= 125 °C  
T

J

= 25 °C  
T

J

= 125 °C  
I

F

= 16 A, dI/dt = 100 A/μs

b  

Body Diode Reverse Recovery Charge  
Q

rr  

nC  
A
Reverse Recovery Current  
Forward Turn-On Time  
I

RRM  

t

on  

Intrinsic turn-on time is negligible (turn-on is dominated by L

S

and L

D

)  
Notes  
a. Repetitive
 
rating; pulse width limited by maximum junction temperature (see fig. 11).  
b. Pulse
 
width
300 μs; duty cycle
2 %.  
2
Document Number: 91098  
S11-0514-Rev. B, 21-Mar-11  
This datasheet is subject to change without notice.  
THE PRODUCT DESCRIBED HEREIN AND THIS D
A
T
A
SHEET ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH
A
T

IRFB17N50L, SiHFB17N50L  
Vishay Siliconix  
TYPICAL CHARACTERISTICS
(25 °C, unless otherwise noted)  
100  
100  
VGS  
15 V  
12 V  
10 V  
8.0 V  
7.0 V  
6.0 V  
5.5 V  
5.0 V  
T
= 150 °C  
J
T
o
p  
10  
10  
Bottom  
T
= 25 °C  
J
1
5.0 V  
1
0.1  
20
μ
s PULSE WIDTH  
V
= 50 V  
T
= 25 °C  
DS  
J
20
μ
s PULSE WIDTH  
0.01  
0.1  
4.0  
5.0  
9.0  
6.0  
7.0  
8.0  
10.0  
0.1  
10  
1
, Drain-to-Source Voltage (V)  
100  
V
V
, Gate-to-Source Voltage (V)  
DS  
GS  
Fig. 1 – Typical Output Characteristics  
Fig. 3 – Typical Transfer Characteristics  
3.0  
2.5  
100  
10  
I
= 16 A  
D
VGS  
T
o
p  
15 V  
12 V  
10 V  
8.0 V  
7.0 V  
6.0 V  
5.5 V  
5.0 V  
2.0  
1.5  
Bottom  
5.0 V  
1.0  
0.5  
1
20
μ
s PULSE WIDTH  
T
= 125 °C  
J
V
= 10 V  
GS  
0.1  
0.0  
– 40  
80 100  
120 140  
– 60  
40 60  
– 20  
0
20  
160  
0.1  
1
10  
100  
T ,
 
Junction
T
e
mperature  
V
, Drain-to-Source Voltage (V)  
J
DS  
Fig. 2 – Typical Output Characteristics  
Fig. 4 – Normalized On-Resistance vs. Temperature  
Document Number: 91098  
S11-0514-Rev. B, 21-Mar-11  
3
This datasheet is subject to change without notice.  
THE PRODUCT DESCRIBED HEREIN AND THIS D
A
T
A
SHEET ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT

IRFB17N50L, SiHFB17N50L  
Vishay Siliconix  
100  
10  
1
1 000 000  
V
= 0
V
,  
f = 1 MHz  
Shorted  
GS  
iss  
rss  
oss  
C
C
C
= C
 
+ C
 
, C  
gs gd
 
ds  
T
= 150 °C  
J
= C  
= C
 
+ C  
gd  
ds  
gd  
10 000  
1000  
100  
C
iss  
T
= 25 °C  
J
C
oss  
C
rss  
V
= 0 V  
GS  
10  
0.1  
0.2  
1.3  
1.6  
0.9  
0.6  
1
1000  
100  
10  
V
, Source-to-Drain Voltage (V)  
SD  
V
, Drain-to-Source Voltage (V)  
DS  
Fig. 7 – Typical Source-Drain Diode Forward Voltage  
Fig. 5 – Typical Capacitance vs. Drain-to-Source Voltage  
1000  
20  
I
= 16 A  
D
OPER
A
T
ING IN THIS AREA LIMITED  
V
V
V
= 400 V  
= 250 V  
= 100 V  
BY R  
DS  
DS  
DS  
DS(on)  
16  
100  
10
μ
s  
12  
8
10  
100
μ
s  
1 ms  
1
10 ms  
4
T
T
= 25 °C  
= 150 °C  
C
J
Single Pulse  
0.1  
10  
0
100  
1000  
10000  
120  
150  
0
30  
60  
90  
Q
,
T
o
tal Gate Charge (nC)  
V
, Drain-to-Source Voltage (V)  
G
DS  
Fig. 8 – Maximum Safe Operating Area  
Fig. 6 – Typical Gate Charge vs. Gate-to-Source Voltage  
4
Document Number: 91098  
S11-0514-Rev. B, 21-Mar-11  
This datasheet is subject to change without notice.  
THE PRODUCT DESCRIBED HEREIN AND THIS D
A
T
A
SHEET ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH
A
T

IRFB17N50L, SiHFB17N50L  
Vishay Siliconix  
R

D  

V

DS  

20  
16  
12  
8
V

GS  

D.U.T.  
R

G  

+
V
–
DD  
10 V  
Pulse width
≤
1 µs  
Duty factor
≤
0.1 %  
Fig. 10a – Switching Time Test Circuit  
V

DS  

4
90 %  
0
50  
75  
, Case
T
e
mperature (°C)  
125  
150  
25  
100  
T
10 %  
V

GS  

C
t

d(on)

t

r  

t

d(off)

t

f  

Fig. 9 – Maximum Drain Current vs. Case Temperature  
Fig. 10b – Switching Time Waveforms  
1
D = 0.50  
0.20  
0.1  
0.10  
0.05  
0.02  
SINGLE PULSE  
0.01  
P
(THERMAL RESPONSE)  
DM  
0.01  
t
1
t
2
Notes:  
1. Duty factor D = t
 
/ t  
1
2
2. Peak T
 
= P  
J
x Z
 
+ T  
DM  
thJC C  
0.001  
0.00001  
0.0001  
0.001  
0.01  
0.1  
1
t ,
 
Rectangular Pulse Duration (sec)  
Fig. 11 – Maximum Effective Transient Thermal Impedance, Junction-to-Case  
Document Number: 91098  
S11-0514-Rev. B, 21-Mar-11  
5
This datasheet is subject to change without notice.  
THE PRODUCT DESCRIBED HEREIN AND THIS D
A
T
A
SHEET ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT

IRFB17N50L, SiHFB17N50L  
Vishay Siliconix  
V

DS  

15 V  
t

p  

Driver  
L
V

DS  

D.U.T  
R

G  

+
–
V
A
DD  
I

AS  

A
20 V  
I

AS  

Fig. 12b – Unclamped Inductive Waveforms  
0.01
Ω  
t

p  

Fig. 12a – Unclamped Inductive Test Circuit  
800  
I
D
7 A  
TOP  
10 A  
16 A  
BOTTOM  
640  
480  
320  
160  
0
25  
50  
75  
100  
125  
150  
Starting T
 
, Junction
T
e
mperature (°C)  
J
Fig. 12c – Maximum Avalanche Energy vs. Drain Current  
Current regulator  
Same type as D.U.T.  
50 k
Ω  
Q

G  

V

GS  

12 V  
0.2 µF  
0.3 µF  
Q

GS  

Q

GD  

+
–
V

DS  

D.U.T.  
V

G  

V

GS  

3 mA  
Charge  
I

G  

I

D  

Current sampling resistors  
Fig. 13a – Basic Gate Charge Waveform  
Fig. 13b – Gate Charge Test Circuit  
6
Document Number: 91098  
S11-0514-Rev. B, 21-Mar-11  
This datasheet is subject to change without notice.  
THE PRODUCT DESCRIBED HEREIN AND THIS D
A
T
A
SHEET ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH
A
T

IRFB17N50L, SiHFB17N50L  
Vishay Siliconix  
Peak Dio
d
e Recovery
d
V/
d
t Test Circuit  
+
Circuit layout con
s
ideration
s  
•
Low
s
tray inductance  
•
G
round plane  
D.U.T.  
•
Low leakage inductance  
current tran
s
former  
–
+
–
–
+
R

g  

•
dV/dt controlled by R

g  

•
Driver
s
ame type a
s
D.U.T.  
•
I

S
D

controlled by duty factor “D”  
•
D.U.T. – device under te
s
t  
+
–
V

DD  

Driver gate drive  
P.W.  
P.W.  
D =  
Period  
Period  
V

GS

= 10 V

a  

D.U.T. l

S
D

waveform  
D.U.T. V

D
S

waveform  
Rever
s
e  
recovery  
current  
Body diode forward  
current  
dI/dt  
Diode recovery  
dV/dt  
V

DD  

Re-applied  
voltage  
Body diode forward drop  
Inductor current  
I

S
D  

Ripple
≤
5 %  
Note  
a. V

GS

= 5 V for logic level device
s  
Fig. 14 – For N-Channel  
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon  
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and  
reliability data, see

.  
Document Number: 91098  
S11-0514-Rev. B, 21-Mar-11  
7
This datasheet is subject to change without notice.  
THE PRODUCT DESCRIBED HEREIN AND THIS D
A
T
A
SHEET ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT

Package Information  
Vishay Siliconix  
TO-220-1  
MILLIMETERS  
MIN.  
INCHES  
MIN.  
A
DIM.  
E
MAX.  
4.65  
1.02  
1.78  
0.61  
15.85  
10.52  
2.67  
5.28  
1.40  
6.71  
2.92  
14.40  
4.04  
3.94  
3.00  
MAX.  
0.183  
0.040  
0.070  
0.024  
0.624  
0.414  
0.105  
0.208  
0.055  
0.264  
0.115  
0.567  
0.159  
0.155  
0.118  
F
A
b
4.24  
0.69  
1.14  
0.36  
14.33  
9.96  
2.41  
4.88  
1.14  
6.10  
2.41  
13.36  
3.33  
3.53  
2.54  
0.167  
0.027  
0.045  
0.014  
0.564  
0.392  
0.095  
0.192  
0.045  
0.240  
0.095  
0.526  
0.131  
0.139  
0.100  
Ø P  
b(1)  
c
D
E
e
e(1)  
F
H(1)  
J(1)  
L
1
3
2
L(1)  
Ø P  
Q
*
M
b(1)  
ECN: X15-0364-Rev. C, 14-Dec-15  
DWG: 6031  
Note  
•
M* = 0.052 inches to 0.064 inches (dimension including  
protrusion), heatsink hole for HVM  
C
b
e
J(1)  
e(1)  
Package Picture  
A
S
E  
Xi’an  
Revison: 14-Dec-15  
Document Number: 66542  
1
For technical questions, contact:

THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT  
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH
A
T

Legal Disclaimer Notice  
Vishay  
Disclaimer  
ALL PRODUCT, PRODUCT SPECIFICATIONS AND DATA ARE SUBJECT TO CHANGE WITHOUT NOTICE TO IMPROVE  
RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE.  
Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectively,  
“Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained in any datasheet or in any other  
disclosure relating to any product.  
Vishay makes no warranty, representation or guarantee regarding the suitability of the products for any particular purpose or  
the continuing production of any product.
 
To the maximum extent permitted by applicable law, Vishay disclaims (i) any and all  
liability arising out of the application or use of any product, (ii) any and all liability, including without limitation special,  
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Statements regarding the suitability of products for certain types of applications are based on Vishay’s knowledge of  
typical requirements that are often placed on Vishay products in generic applications.
 
Such statements are not binding  
statements about the suitability of products for a particular application.
 
It is the customer’s responsibility to validate that a  
particular product with the properties described in the product specification is suitable for use in a particular application.  
Parameters provided in datasheets and / or specifications may vary in different applications and performance may vary over  
time. All
 
operating parameters, including typical parameters, must be validated for each customer application by the customer’s  
technical experts.
 
Product specifications do not expand or otherwise modify Vishay’s terms and conditions of purchase,  
including but not limited to the warranty expressed therein.  
Except as expressly indicated in writing, Vishay products are not designed for use in medical, life-saving, or life-sustaining  
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© 2019 VISHAY INTERTECHNOLOGY, INC. ALL RIGHTS RESERVED  
Revision: 01-Jan-2019  
Document Number: 91000  
1