Vishay-Intertech-IRFI740GPBF
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IRFI740G, SiHFI740G
Vishay Siliconix
Power MOSFET
FEATURES
• Isolated package
• High voltage isolation = 2.5 kV
RMS
(t = 60 s;
f = 60 Hz)
• Sink to lead creepage distance = 4.8 mm
• Dynamic dV/dt rating
PRODUCT SUMMARY
V
DS
(V)
DS(on)
(
)
Q
g
max. (nC)
400
Available
R
V
GS
= 10 V
0.55
66
10
Available
Q
gs
(nC)
gd
(nC)
• Low thermal resistance
Q
33
• Material
categorization: for definitions of compliance
Configuration
Single
D
Note
*
This datasheet provides information about parts that are
RoHS-compliant and / or parts that are non-RoHS-compliant.
For
example, parts with lead (Pb) terminations are not RoHS-compliant.
Please see the information / tables in this datasheet for details.
TO-220 FULLPAK
G
DESCRIPTION
Third generation power MOSFETs from Vishay provide the
designer with the best combination of fast switching,
ruggedized device design, low on-resistance and
cost-effectiveness.
The TO-220 FULLPAK eliminates the need for additional
insulating hardware in commercial-industrial applications.
The molding compound used provides a high isolation
capability and a low thermal resistance between the tab and
external heatsink. The isolation is equivalent to using a 100
micron mica barrier with standard TO-220 product. The
FULLPAK is mounted to a heatsink using a single clip or by
a single screw fixing.
S
S
N-Channel MO
S
FET
D
G
ORDERING INFORMATION
Package
TO-220 FULLPAK
IRFI740GPbF
SiHFI740G-E3
IRFI740G
Lead (Pb)-free
SnPb
SiHFI740G
ABSOLUTE MAXIMUM RATINGS
TC = 25 °C, unless otherwise noted
PARAMETER
SYMBOL
LIMIT
400
20
UNIT
Drain-Source Voltage
Gate-Source Voltage
V
DS
V
GS
V
T
C
= 25 °C
5.4
Continuous Drain Current
V
GS
at 10 V
I
D
T
C
= 100 °C
3.4
A
Pulsed Drain Current
a
I
DM
22
Linear Derating Factor
Single Pulse Avalanche Energy
b
0.32
390
5.4
W/°C
mJ
A
E
AS
I
AR
a
Repetitive Avalanche Current
Repetitive Avalanche Energy
a
E
AR
4.0
mJ
W
Maximum Power Dissipation
Peak Diode Recovery dV/dt
c
T
C
= 25 °C
for 10 s
P
D
40
dV/dt
T
J
, T
stg
4.0
V/ns
Operating Junction and Storage Temperature Range
Soldering Recommendations (Peak temperature)
d
-55 to +150
300
10
°C
lbf · in
N · m
Mounting Torque
6-32 or M3 screw
1.1
Notes
a. Repetitive
rating; pulse width limited by maximum junction temperature (see fig. 11).
b. V
DD
= 50 V, starting T
J
= 25 °C, L = 23 mH, R
g
= 25
, I
AS
= 5.4 A (see fig. 12).
c. I
SD
10 A, dI/dt
120 A/μs, V
DD
V
DS
, T
J
150 °C.
d. 1.6
mm from case.
S16-0763-Rev. C, 02-May-16
Document Number: 91156
1
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
IRFI740G, SiHFI740G
Vishay Siliconix
THERMAL RESISTANCE RATINGS
PARAMETER
SYMBOL
TYP.
MAX.
65
UNIT
Maximum Junction-to-Ambient
Maximum Junction-to-Case (Drain)
R
thJA
R
thJC
–
–
°C/W
3.1
SPECIFICATIONS
(T
J
= 25 °C, unless otherwise noted)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN.
TYP.
MAX. UNIT
Static
Drain-Source Breakdown Voltage
V
DS
V
DS
/T
J
V
GS(th)
I
GSS
V
GS
= 0 V, I
D
= 250 μA
Reference to 25 °C, I
D
= 1 mA
V
DS
= V
GS
, I
D
= 250 μA
400
–
–
–
V
V/°C
V
V
DS
Temperature Coefficient
–
2.0
–
0.49
Gate-Source Threshold Voltage
Gate-Source Leakage
–
–
–
–
–
–
4.0
100
25
250
0.55
–
V
GS
V
DS
= 400 V, V
GS
= 0 V
V
DS
= 320 V, V
GS
= 0 V, T
J
= 125 °C
V
GS
= 10 V
I
D
= 3.2 A
b
V
DS
= 50 V, I
D
= 3.2 A
b
=
20 V
nA
–
Zero Gate Voltage Drain Current
I
DSS
μA
–
Drain-Source On-State Resistance
Forward Transconductance
Dynamic
R
DS(on)
g
fs
–
3.6
S
Input Capacitance
C
iss
C
oss
C
rss
C
–
–
–
–
–
–
–
–
–
–
–
1370
380
140
12
–
–
–
V
GS
= 0 V,
V
DS
= 25 V,
f = 1.0 MHz, see fig. 5
Output Capacitance
Re
v
erse Transfer Capacitance
Drain to Sink Capacitance
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
Turn-On Delay Time
Rise Time
pF
nC
ns
–
f = 1.0 MHz
–
Q
g
66
10
33
–
I
D
= 10 A, V
DS
= 320 V,
see fig. 6 and 13
b
Q
gs
Q
gd
t
d(on)
t
r
V
GS
= 10 V
–
–
14
25
54
24
V
DD
= 200 V, I
D
= 10 A,
–
R
g
= 9.1
,
R
D
= 20
,
Turn-Off Delay Time
Fall Time
t
d(off)
t
f
–
see fig. 10
b
–
D
Between lead,
6 mm (0.25″) from
Internal Drain Inductance
Internal Source Inductance
L
D
–
4.5
–
nH
package and center of
die contact
G
L
S
R
g
–
7.5
–
–
S
Gate Input Resistance
f = 1 MHz, open drain
0.2
1.3
Drain-Source Body Diode Characteristics
D
MOSFET symbol
Continuous Source-Drain Diode Current
I
S
–
–
–
–
5.4
22
showing the
integral reverse
p – n junction diode
A
G
Pulsed Diode Forward Current
a
I
SM
S
Body Diode Voltage
V
SD
t
rr
T
J
= 25 °C, I
S
= 5.4 A, V
GS
= 0 V
b
–
–
–
–
2.0
730
6.6
V
Body Diode Re
v
erse Reco
v
ery Time
Body Diode Re
v
erse Reco
v
ery Charge
Forward Turn-On Time
330
2.8
ns
μC
T
J
= 25 °C, I
F
= 10 A, dI/dt = 100 A/μs
b
Q
rr
t
on
Intrinsic turn-on time is negligible (turn-on is dominated by L
S
and L
D
)
Notes
a. Repetiti
v
e rating; pulse width limited
b
y maximum junction temperature (see fig. 11).
b. Pulse
width
300 μs; duty cycle
2 %.
S16-0763-Rev. C, 02-May-16
Document Number: 91156
2
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
IRFI740G, SiHFI740G
Vishay Siliconix
TYPICAL CHARACTERISTICS
(25 °C, unless otherwise noted)
Fig. 1 – Typical Output Characteristics, T
C
= 25 °C
Fig. 3 – Typical Transfer Characteristics
Fig. 2 – Typical Output Characteristics, T
C
= 150 °C
Fig. 4 –
Normalized On-Resistance vs. Temperature
S16-0763-Rev. C, 02-May-16
Document Number: 91156
3
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
IRFI740G, SiHFI740G
Vishay Siliconix
Fig. 7 – Typical Source-Drain Diode Forward Voltage
Fig. 5 – Typical Capacitance vs. Drain-to-Source Voltage
Fig. 8 – Maximum Safe Operating Area
Fig. 6 – Typical Gate Charge vs. Gate-to-Source Voltage
S16-0763-Rev. C, 02-May-16
Document Number: 91156
4
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
IRFI740G, SiHFI740G
Vishay Siliconix
R
D
V
DS
V
GS
D.U.T.
R
g
+
–
V
DD
10
V
P
u
lse
w
idth
≤
1 µs
D
u
ty factor
≤
0.1 %
Fig. 10a – Switching Time Test Circuit
V
DS
90 %
10 %
V
GS
t
d(on)
t
r
t
d(off)
t
f
Fig. 9 – Maximum Drain Current vs. Case Temperature
Fig. 10b – Switching Time Waveforms
Fig. 11 – Maximum Effective Transient Thermal Impedance, Junction-to-Case
L
V
DS
V
DS
V
ary t
p
to obtain
req
u
ired I
AS
t
p
V
DD
D.U.T
R
g
+
–
V
DD
V
DS
I
AS
10
V
0.01
Ω
t
p
I
AS
Fig. 12a – Unclamped Inductive Test Circuit
Fig. 12b – Unclamped Inductive Waveforms
S16-0763-Rev. C, 02-May-16
Document Number: 91156
5
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
IRFI740G, SiHFI740G
Vishay Siliconix
Fig. 12c – Maximum Avalanche Energy vs. Drain Current
C
u
rrent reg
u
lator
Same type as D.U.T.
50 k
Ω
Q
G
V
GS
12
V
0.2 µF
0.3 µF
Q
GS
Q
GD
+
–
V
DS
D.U.T.
V
G
V
GS
3 mA
Charge
I
G
I
D
C
u
rrent sampling resistors
Fig. 13a – Basic Gate Charge Waveform
Fig. 13b – Gate Charge Test Circuit
S16-0763-Rev. C, 02-May-16
Document Number: 91156
6
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
IRFI740G, SiHFI740G
Vishay Siliconix
Peak Dio
d
e Recovery
d
V/
d
t Test Circuit
+
Circuit layout con
s
ideration
s
D.U.T.
•
•
Low
s
tray inductance
G
round plane
• Low
leakage inductance
current tran
s
former
–
+
–
–
+
R
g
• dV/dt
controlled by R
g
+
• Driver
s
ame type a
s
D.U.T.
• I
S
D
controlled by duty factor “D”
V
DD
–
• D.U.T.
– device under te
s
t
Driver gate drive
P.W.
P.W.
Period
Period
D =
V
= 10 V
a
GS
D.U.T. I
S
D
waveform
D.U.T. V
D
S
waveform
Rever
s
e
recovery
current
Body diode forward
current
dI/dt
Diode recovery
dV/dt
V
DD
Re-applied
voltage
Body diode forward drop
Ripple ≤ 5 %
Inductor current
I
S
D
Note
a. V
GS
= 5 V for logic level device
s
Fig. 14 – For N-Channel
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and
S16-0763-Rev. C, 02-May-16
Document Number: 91156
7
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
Legal Disclaimer Notice
Vishay
Disclaimer
ALL PRODUCT, PRODUCT SPECIFICATIONS AND DATA ARE SUBJECT TO CHANGE WITHOUT NOTICE TO IMPROVE
RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE.
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“Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained in any datasheet or in any other
disclosure relating to any product.
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the continuing production of any product.
To the maximum extent permitted by applicable law, Vishay disclaims (i) any and all
liability arising out of the application or use of any product, (ii) any and all liability, including without limitation special,
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typical requirements that are often placed on Vishay products in generic applications.
Such statements are not binding
statements about the suitability of products for a particular application.
It is the customer’s responsibility to validate that a
particular product with the properties described in the product specification is suitable for use in a particular application.
Parameters provided in datasheets and / or specifications may vary in different applications and performance may vary over
time. All
operating parameters, including typical parameters, must be validated for each customer application by the customer’s
technical experts.
Product specifications do not expand or otherwise modify Vishay’s terms and conditions of purchase,
including but not limited to the warranty expressed therein.
Except as expressly indicated in writing, Vishay products are not designed for use in medical, life-saving, or life-sustaining
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© 2017 VISHAY INTERTECHNOLOGY, INC. ALL RIGHTS RESERVED
Revision: 08-Feb-17
Document Number: 91000
1
