Vishay-Intertech-IRFR430ATRPBF
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IRFR430A, IRFU430A, SiHFR430A, SiHFU430A
Vishay Siliconix
Power MOSFET
FEATURES
• Low Gate Charge Q
g
Results in Simple Drive
Requirement
PRODUCT SUMMARY
V
DS
(V)
DS(on)
(
)
Q
g
(Max.) (nC)
500
R
V
GS
= 10 V
1.7
• Improved
Gate, Avalanche and Dynamic
dV/dt Ruggedness
24
6.5
Q
gs
(nC)
gd
(nC)
• Fully
Characterized Capacitance and
Avalanche Voltage and Current
Q
13
Configuration
Single
• Effective C
oss
Specified
• Material
categorization: For definitions of compliance
D
D
P
A
K
I
P
A
K
(TO-252)
(TO-251)
D
APPLICATIONS
• Switch Mode Power Supply (SMPS)
D
G
• Uninterruptible Power Supply
• High Speed Power Switching
S
G
S
D
G
S
N-Channel MOSFET
ORDERING INFORMATION
Package
DPAK (TO-252)
DPAK (TO-252)
DPAK (TO-252)
DPAK (TO-252)
IPAK (TO-251)
Lead (Pb)-free and
Halogen-free
SiHFR430A-GE3
SiHFR430ATR-GE3
a
SiHFR430ATRL-GE3
a
SiHFR430ATRR-GE3
a
SiHFU430A-GE3
IRFR430APbF
SiHFR430A-E3
IRFR430ATRPbF
a
SiHFR430AT-E3
a
IRFR430ATRLPbF
a
SiHFR430ATL-E3
a
IRFR430ATRRPbF
a
SiHFR430ATR-E3
a
IRFU430APbF
SiHFU430A-E3
Lead (Pb)-free
Note
a. See
device orientation.
ABSOLUTE MAXIMUM RATINGS
(T
C
= 25 °C, unless otherwise noted)
PARAMETER
SYMBOL
LIMIT
UNIT
Drain-Source Voltage
Gate-Source Voltage
V
DS
500
V
V
GS
30
T
C
= 25 °C
5.0
3.2
Continuous Drain Current
V
GS
at 10 V
I
D
T
C
= 100 °C
A
Pulsed Drain Current
a
I
DM
20
Linear Derating Factor
0.91
130
W/°C
mJ
A
Single Pulse Avalanche Energy
b
Repetitive Avalanche Current
a
Repetitive Avalanche Energy
a
E
AS
I
AR
5.0
E
AR
11
mJ
W
Maximum Power Dissipation
T
C
= 25 °C
P
D
110
Peak Diode Recovery dV/dt
c
dV/dt
T
J
, T
stg
3.0
V/ns
Operating Junction and Storage Temperature Range
Soldering Recommendations (Peak Temperature)
d
– 55 to + 150
300
°C
for 10 s
Notes
a. Repetitive
rating; pulse width limited by maximum junction temperature (see fig. 11).
b. Starting
T
J
= 25 °C, L = 11 mH, R
g
= 25
, I
AS
= 5.0 A (see fig. 12).
c. I
SD
5.0 A, dI/dt
320 A/μs, V
DD
V
DS
, T
J
150 °C.
d. 1.6
mm from case.
S12-0168-Rev. D, 04-Feb-13
Document Number: 91276
1
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
IRFR430A, IRFU430A, SiHFR430A, SiHFU430A
Vishay Siliconix
THERMAL RESISTANCE RATINGS
PARAMETER
SYMBOL
TYP.
MAX.
62
UNIT
Maximum Junction-to-Ambient
Case-to-Sink, Flat, Greased Surface
Maximum Junction-to-Case (Drain)
R
thJA
R
thCS
R
thJC
–
0.50
–
–
°C/W
1.1
SPECIFICATIONS
(T
J
= 25 °C, unless otherwise noted)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN.
TYP.
MAX. UNIT
Static
Drain-Source Breakdown Voltage
V
DS
Temperature Coefficient
Gate-Source Threshold Voltage
Gate-Source Leakage
V
DS
V
DS
/T
J
V
GS(th)
I
GSS
V
GS
= 0 V, I
D
= 250 μA
Reference to 25 °C, I
D
= 1 mA
V
DS
= V
GS
, I
D
= 250 μA
500
–
–
–
V
V/°C
V
–
2.0
–
0.60
–
–
–
–
–
–
4.5
100
25
250
1.7
–
V
GS
V
DS
= 500 V, V
GS
= 0 V
DS
= 400 V, V
GS
= 0 V, T
J
= 125 °C
V
GS
= 10 V
I
D
= 3.0 A
b
V
DS
= 50 V, I
D
= 3.0 A
=
30 V
nA
–
Zero Gate Voltage Drain Current
I
DSS
μA
V
–
Drain-Source On-State Resistance
Forward Transconductance
Dynamic
R
DS(on)
g
fs
–
2.3
S
Input Capacitance
C
iss
C
oss
C
rss
–
–
–
–
–
–
–
–
–
–
–
–
–
490
75
4.5
750
25
51
–
–
–
V
GS
= 0 V,
DS
= 25 V,
f = 1.0 MHz, see fig. 5
Output Capacitance
V
pF
pF
nC
Reverse Transfer Capacitance
–
V
DS
= 1.0 V, f = 1.0 MHz
–
Output Capacitance
C
oss
V
V
GS
= 10 V
V
DS
= 400 V, f = 1.0 MHz
–
Effective Output Capacitance
Total Gate Charge
C
oss
eff.
Q
g
V
DS
= 0 V to 400 V
c
–
24
6.5
13
–
I
D
= 5.0 A, V
DS
= 400 V,
see fig. 6 and 13
b
Gate-Source Charge
Gate-Drain Charge
Q
gs
Q
gd
t
d(on)
t
r
GS
= 10 V
–
–
Turn-On Delay Time
Rise Time
8.7
27
17
16
–
V
DD
= 250 V, I
D
= 5.0 A,
ns
R
g
= 15
, R
D
= 50
, see fig. 10
b
Turn-Off Delay Time
Fall Time
t
d(off)
t
f
–
–
Drain-Source Body Diode Characteristics
MOSFET symbol
showing the
integral reverse
p – n junction diode
D
Continuous Source-Drain Diode Current
Pulsed Diode Forward Current
a
I
S
–
–
–
–
5.0
20
A
G
I
SM
S
Body Diode Voltage
V
SD
t
rr
T
J
= 25 °C, I
S
= 5.0 A, V
GS
= 0 V
b
T
J
= 25 °C, I
F
= 5.0 A, dI/dt = 100 A/μs
b
–
–
–
–
1.5
620
2.1
V
Body Diode Reverse Recovery Time
Body Diode Reverse Recovery Charge
Forward Turn-On Time
410
1.4
ns
μC
Q
rr
t
on
Intrinsic turn-on time is negligible (turn-on is dominated by L
S
and L
D
)
Notes
a. Repetitive
rating; pulse width limited by maximum junction temperature (see fig. 11).
b. Pulse
width
300 μs; duty cycle
2 %.
c. C
oss
eff. is a fixed capacitance that gives the same charging time as C
oss
while V
DS
is rising from 0 to 80 % V
DS
.
S12-0168-Rev. D, 04-Feb-13
Document Number: 91276
2
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
IRFR430A, IRFU430A, SiHFR430A, SiHFU430A
Vishay Siliconix
TYPICAL CHARACTERISTICS
(25 °C, unless otherwise noted)
100
100.00
VGS
15V
10V
TOP
8.0V
7.0V
6.0V
5.5V
5.0V
10
10.00
1.00
0.10
0.01
T
= 150°C
J
BOTTOM 4.5V
1
0.1
T
= 25°C
J
4.5V
0.01
0.001
20μs PULSE WIDTH
Tj = 25°C
V
= 100V
DS
20μs PULSE WIDTH
0.1
1
10
100
4.0
6.0
V
8.0
10.0
12.0
14.0
16.0
V
, Drain-to-Source Voltage (V)
, Gate-to-Source Voltage (V)
DS
GS
Fig. 1 –
Typical Output Characteristics
Fig. 3 – Typical Transfer Characteristics
100
10
3.0
VGS
5.0A
=
I
D
TOP
15V
10V
8.0V
7.0V
2.5
2.0
1.5
1.0
0.5
0.0
6.0V
5.5V
5.0V
BOTTOM 4.5V
1
4.5V
0.1
0.01
20μs PULSE WIDTH
Tj = 150°C
V
= 10V
GS
0.1
1
10
100
-60 -40 -20
0
20
40
60
80 100
120 140 160
°
T ,
Junction Temperature
(
C)
V
, Drain-to-Source Voltage (V)
J
DS
Fig. 2 – Typical Output Characteristics
Fig. 4 – Normalized On-Resistance vs. Temperature
S12-0168-Rev. D, 04-Feb-13
Document Number: 91276
3
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
IRFR430A, IRFU430A, SiHFR430A, SiHFU430A
Vishay Siliconix
100
10000
1000
100
10
V
C
C
= 0V,
f = 1 MHZ
GS
iss
= C
+ C
,
C
SHORTED
gs
gd
ds
= C
rss
gd
C
= C
+ C
oss
ds
gd
Ciss
10
Coss
Crss
°
T =
25
C
°
T =
150
J
C
J
1
1
V
= 0 V
GS
1
10
100
1000
0.1
0.2
0.5
0.8
1.1
1.4
V
, Drain-to-Source Voltage (V)
DS
V
,Source-to-Drain Voltage (V)
SD
Fig. 5 – Typical Capacitance vs. Drain-to-Source Voltage
Fig. 7 – Typical Source-Drain Diode Forward Voltage
100
12
D
I
=
5.0A
V
V
V
= 400V
= 250V
= 100V
OPERATION IN THIS AREA
DS
DS
DS
LIMITED BY R
(on)
DS
10
7
10
1
100μsec
1msec
5
2
Tc = 25°C
Tj = 150°C
Single Pulse
10msec
0.1
0
0
4
8
12
16
20
10
100
1000
10000
Q
, Total Gate Charge (nC)
G
V
, Drain-toSource Voltage (V)
DS
Fig. 8 – Maximum Safe Operating Area
Fig. 6 – Typical Gate Charge vs. Gate-to-Source Voltage
S12-0168-Rev. D, 04-Feb-13
Document Number: 91276
4
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
IRFR430A, IRFU430A, SiHFR430A, SiHFU430A
Vishay Siliconix
5.5
4.4
3.3
2.2
1.1
0.0
R
D
V
DS
V
GS
D.U.T.
R
g
+
V
–
DD
10 V
Pulse width
≤
1 µs
Duty factor
≤
0.1 %
Fig. 10a – Switching Time Test Circuit
V
DS
90 %
10 %
V
GS
25
50
T
75
100
125
150
°
C)
, Case Temperature
(
C
t
d(on)
t
r
t
d(off)
t
f
Fig. 9 – Maximum Drain Current vs. Case Temperature
Fig. 10b – Switching Time Waveforms
10
1
D = 0.50
0.20
0.10
P
DM
0.1
0.05
t
1
SINGLE PULSE
(THERMAL RESPONSE)
0.02
0.01
t
2
Notes:
1. Duty factor D =
t
/ t
1
2
2. Peak T
= P
x
Z
+ T
J
DM
thJC
C
0.01
0.00001
0.0001
0.001
0.01
0.1
1
t ,
Rectangular Pulse Duration (sec)
1
Fig. 11 – Maximum Effective Transient Thermal Impedance, Junction-to-Case
V
DS
15 V
t
p
Driver
L
V
DS
D.U.T
R
g
+
–
V
A
DD
I
AS
I
AS
20 V
0.01
Ω
t
p
Fig. 12b – Unclamped Inductive Waveforms
Fig. 12a – Unclamped Inductive Test Circuit
S12-0168-Rev. D, 04-Feb-13
Document Number: 91276
5
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
IRFR430A, IRFU430A, SiHFR430A, SiHFU430A
Vishay Siliconix
5.0
250
200
150
100
50
I
D
TOP
2.2A
3.2A
5.0A
4.5
4.0
3.5
3.0
2.5
BOTTOM
I
= 250μA
D
0
-75 -50 -25
0
25
50
75 100
125 150
25
50
75
100
125
150
T
, Temperature ( °C )
°
J
Starting Tj, Junction Temperature
( C)
Fig. 12d – Threshold Voltage vs. Temperature
Fig. 12c – Maximum Avalanche Energy vs. Drain Current
Current regulator
Same type as D.U.T.
50 k
Ω
Q
G
V
GS
12 V
0.2 µF
0.3 µF
Q
GS
Q
GD
+
–
V
DS
D.U.T.
V
G
V
GS
3 mA
Charge
I
G
Current sampling resistors
Fig. 13b – Gate Charge Test Circuit
I
D
Fig. 13a – Basic Gate Charge Waveform
S12-0168-Rev. D, 04-Feb-13
Document Number: 91276
6
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
IRFR430A, IRFU430A, SiHFR430A, SiHFU430A
Vishay Siliconix
Peak Dio
d
e Recovery
d
V/
d
t Test Circuit
+
–
Circuit layout con
s
ideration
s
•
Low
s
tray inductance
D.U.T.
•
G
round plane
•
Low leakage inductance
current tran
s
former
+
–
–
+
R
g
•
dV/dt controlled by R
g
•
Driver
s
ame type a
s
D.U.T.
•
I
S
D
controlled by duty factor “D”
•
D.U.T. – device under te
s
t
+
–
V
DD
Driver gate drive
P.W.
P.W.
D =
Period
Period
V
GS
= 10 V
a
D.U.T. l
S
D
waveform
D.U.T. V
D
S
waveform
Rever
s
e
recovery
current
Body diode forward
current
dI/dt
Diode recovery
dV/dt
V
DD
Re-applied
voltage
Body diode forward drop
Inductor current
I
S
D
Ripple
≤
5 %
Note
a. V
GS
= 5 V for logic level device
s
Fig. 14 – For N-Channel
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and
S12-0168-Rev. D, 04-Feb-13
Document Number: 91276
7
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
Package Information
Vishay Siliconix
TO-252AA Case Outline
VERSION 1: FACILITY CODE = Y
E
A
C2
b3
E1
b
C
b2
e
A1
e1
MILLIMETERS
DIM.
A
MIN.
2.18
–
MAX.
2.38
0.127
0.88
1.14
5.46
0.61
0.89
6.22
–
A1
b
0.64
0.76
4.95
0.46
0.46
5.97
4.10
6.35
4.32
9.40
b2
b3
C
C2
D
D1
E
6.73
–
E1
H
10.41
e
2.28 BSC
4.56 BSC
e1
L
1.40
0.89
–
1.78
1.27
1.02
1.52
L3
L4
L5
1.01
Note
Dimension L3 is for reference only
•
Revision: 16-Dec-2019
Document Number: 71197
1
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
Package Information
Vishay Siliconix
VERSION 2: FACILITY CODE = N
e
E
A
b3
E1
c2
E1/2
e
2x b2
2x e
3x b
DETAIL “B”
(b)
0.25
C A B
C
H
b1
SEATING
PLANE
GAUGE
PLANE
DETAIL “B”
C
L
C
(L1)
MILLIMETERS
MILLIMETERS
DIM.
L
MIN.
MAX.
DIM.
A
MIN.
2.18
–
MAX.
2.39
0.13
0.89
0.79
1.13
5.46
0.61
0.56
0.60
6.22
–
1.50
1.78
L1
L2
L3
L4
L5
L6
2.74 ref.
A1
b
0.51 BSC
0.65
0.64
0.76
4.95
0.46
0.41
0.46
5.97
5.21
6.35
4.32
0.89
–
1.27
1.02
1.49
0.85
10°
b1
b2
b3
c
1.14
0.65
0°
c1
c2
D
1
2
0°
15°
25°
35°
Notes
D1
E
•
•
•
•
Dimensioning and tolerance confirm to ASME Y14.5M-1994
All dimensions are in millimeters. Angles are in degrees
Heat sink side flash is max. 0.8 mm
6.73
–
E1
e
2.29 BSC
Radius on terminal is optional
H
9.94
10.34
ECN: E19-0649-Rev. Q, 16-Dec-2019
DWG: 5347
Revision: 16-Dec-2019
Document Number: 71197
2
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
Package Information
Vishay Siliconix
TO-251AA (HIGH VOLTAGE)
4
3
A
E1
E
Thermal
P
A
D
A
4
0.010
M
A B
C
0.25
c2
b
4
L2
4
A
θ
1
θ
2
D1
4
B
C
3
Seating
plane
5
C
B
C
L3
L1
(Dat
u
m A)
L
B
A
A1
3 x
b
2
3 x
b
c
V
ie
w
A – A
M
0.010
C A B
0.25
2 x e
Base
metal
5
Plating
(c)
b
1,
b
3
Lead tip
5
c1
(
b
,
b
2)
Section B – B and C – C
MILLIMETERS
INCHES
MILLIMETERS
INCHES
MAX.
DIM.
A
MIN.
2.18
0.89
0.64
0.65
0.76
0.76
4.95
0.46
0.41
0.46
5.97
MAX.
2.39
1.14
0.89
0.79
1.14
1.04
5.46
0.61
0.56
0.86
6.22
MIN.
0.086
0.035
0.025
0.026
0.030
0.030
0.195
0.018
0.016
0.018
0.235
MAX.
0.094
0.045
0.035
0.031
0.045
0.041
0.215
0.024
0.022
0.034
0.245
DIM.
D1
E
MIN.
5.21
6.35
4.32
MAX.
MIN.
0.205
0.250
0.170
–
6.73
–
–
0.265
–
A1
b
E1
e
b1
b2
b3
b4
c
2.29 BSC
2.29 BSC
L
8.89
1.91
0.89
1.14
0′
9.65
2.29
1.27
1.52
15′
0.350
0.075
0.035
0.045
0′
0.380
0.090
0.050
0.060
15′
L1
L2
L3
θ
1
θ
2
c1
c2
D
25′
35′
25′
35′
ECN: S-82111-Rev. A, 15-Sep-08
DWG: 5968
Notes
1. Dimensioning and tolerancing per ASME Y14.5M-1994.
2. Dimension are shown in inches and millimeters.
3. Dimension D and E do not include mold flash. Mold flash shall not exceed 0.13 mm (0.005″) per side. These dimensions are measured at the
outermost extremes of the plastic body.
4. Thermal pad contour optional with dimensions b4, L2, E1 and D1.
5. Lead dimension uncontrolled in L3.
6. Dimension b1, b3 and c1 apply to base metal only.
7. Outline conforms to JEDEC outline TO-251AA.
Document Number: 91362
Revision: 15-Sep-08
1
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It is the customer’s responsibility to validate that a
particular product with the properties described in the product specification is suitable for use in a particular application.
Parameters provided in datasheets and / or specifications may vary in different applications and performance may vary over
time. All
operating parameters, including typical parameters, must be validated for each customer application by the customer’s
technical experts.
Product specifications do not expand or otherwise modify Vishay’s terms and conditions of purchase,
including but not limited to the warranty expressed therein.
Except as expressly indicated in writing, Vishay products are not designed for use in medical, life-saving, or life-sustaining
applications or for any other application in which the failure of the Vishay product could result in personal injury or death.
Customers using or selling Vishay products not expressly indicated for use in such applications do so at their own risk.
Please contact authorized Vishay personnel to obtain written terms and conditions regarding products designed for
such applications.
No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document
or by any conduct of Vishay.
Product names and markings noted herein may be trademarks of their respective owners.
© 2021 VISHAY INTERTECHNOLOGY, INC. ALL RIGHTS RESERVED
Revision: 01-Jan-2021
Document Number: 91000
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