Vishay-Intertech-SI1403BDL-T1-E3

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Vishay-Intertech-SI1403BDL-T1-E3
Si1403BDL  
Vishay Siliconix  
P-Channel 2.5 V (G-S) MOSFET  
FEATURES  
• TrenchFET

®

power MOSFET  
S
OT-
3
6
3  
S
C-70
S
in
g
le (6 lea
d
s)  
S
4
• Material categorization:
 
for definitions of compliance please see  
D
5
D
6
Available  
3
G
2
D
1
D
Top View  
Marking code
: OD  
PRODUCT SUMMARY  
V

DS

(V)  
-20  
0.150  
0.175  
0.265  
2.9  
R
R
R

DS(on)

max. (
) at V

GS

= -4.5 V  

DS(on)

max. (
) at V

GS

= -3.6 V  

DS(on)

max. (
) at V

GS

= -2.5 V  
Q

g

typ. (nC)  

D

(A)  
I
-1.5  
Configuration  
Single  
ORDERING INFORMATION  
Package  
SC-70  
Lead (Pb)-free  
Si1403BDL-T1-E3  
Si1403BDL-T1-GE3  
Lead (Pb)-free and halogen-free  
ABSOLUTE MAXIMUM RATINGS
(T

A

= 25 °C, unless otherwise noted)  
PARAMETER  
SYMBOL  
5 s  
STEADY STATE  
UNIT  
Drain-source voltage  
Gate-source voltage  
V

DS  

-20  
-20  
12  
V
V

GS  

12  
T

A

= 25 °C  
T

A

= 85 °C  
-1.5  
-1.2  
-5  
-1.4  
-1.0  
-5  
Continuous drain current (T

J

= 150 °C)

a  

I

D  

A
Pulsed drain current  
Continuous diode current (diode conduction)

a  

I

DM  

I

S  

-0.8  
0.625  
0.400  
-0.8  
0.568  
0.295  
T

A

= 25 °C  
T

A

= 85 °C  
Maximum power dissipation

a  

P

D  

W
Operating junction and storage temperature range  
T

J

, T

stg  

-55 to 150  
°C  
THERMAL RESISTANCE RATINGS  
PARAMETER  
SYMBOL  
TYPICAL  
MAXIMUM  
200  
UNIT  
t

5 s  
165  
180  
105  
Maximum junction-to-ambient

a  

Maximum junction-to-foot (drain)  
R

thJA  

R

thJF  

Steady state  
Steady state  
220  
°C/W  
130  
Note  
a. Surface
 
mounted on 1″ x 1″ FR4 board  
S10-0110-Rev. D, 18-Jan-10  
Document Number: 73253  
1
For technical questions, contact:

THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT  
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH
A
T

Si1403BDL  
Vishay Siliconix  
SPECIFICATIONS
(T

J

= 25 °C, unless otherwise noted)  
PARAMETER  
SYMBOL  
TEST CONDITIONS  
MIN.  
TYP.  
MAX.  
UNIT  
Static  
Gate threshold voltage  
Gate leakage  
V

GS(th)  

I

GSS  

V

DS

= V

GS

, I

D

= -250 μA  
-0.6  
–
–
-1.3  
100  
-1  
V
V

DS

= 0 V, V

GS  

=
12 V  
–
–
nA  
V

DS

= -20 V, V

GS

= 0 V  
V

DS

= -20 V, V

GS

= 0 V, T

J

= 85 °C  
V

DS

= -5 V, V

GS

= -4.5 V  
–
Zero gate voltage drain current  
On-state drain current

a  

I

DSS  

μA  
A
–
–
-5  
I

D(on)  

-2  
–
–
–
V

GS

= -4.5 V, I

D

= -1.5 A  
0.120  
0.140  
0.220  
3.4  
-0.8  
0.150  
0.175  
0.265  
–
Drain-source on-state resistance

a  

R

DS(on)  

V

GS

= -3.6 V, I

D

= -1.4 A  

GS

= -2.5 V, I

D

= -0.8 A  
–
V
–
Forward transconductance

a  

Diode forward voltage

a  

Dynamic

b  

g

fs  

V

DS

= -10 V, I

D

= -1.5 A  
I

S

= -0.8 A, V

GS

= 0 V  
–
S
V
V

SD  

–
-1.1  
Total gate charge  
Q

g  

Q

gs  

Q

gd  

R

g  

–
–
–
–
–
–
–
–
–
–
2.9  
0.65  
1.0  
9
4.5  
–
Gate-source charge  
Gate-drain charge  
V

DS

= -10 V, V

GS

= -4.5 V, I

D

= -1.5 A  
f = 1 MHz  
nC  
–
Gate resistance  
–
Turn-on delay time  
Rise time  
t

d(on)  

t

r  

t

d(off)  

t

f  

13  
30  
28  
13  
12  
4
20  
45  
42  
20  
25  
8
V

DD

= -10 V, R

L

= 10
,  
I

D

-1 A, V

GEN

= -4.5 V, R

g

= 6
  
Turn-off delay time  
Fall time  
ns  
Source-drain reverse recovery time  
Body diode reverse recovery charge  
t

rr  

I

F

= -0.8 A, dI/dt = 100 A/μs  
Q

rr  

nC  
Notes  
a. Pulse
 
test; pulse width
300 μs, duty cycle
2 %  
b. Guaranteed
 
by design, not subject to production testing  
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation  
of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum  
rating conditions for extended periods may affect device reliability.
 
TYPICAL CHARACTERISTICS
(25 °C, unless otherwise noted)  
4.0  
3.2  
2.4  
1.6  
0.8  
0.0  
4.0  
3.2  
2.4  
1.6  
0.8  
0.0  
T
= – 55 °C  
C
V
GS  
= 5 V thru 2.5. V  
25 °C  
125 °C  
2 V  
1.5 V  
1
V
,
0
.5 V  
3.2 4.0  
0.0  
0.8  
1.6  
2.4  
0.0  
0.5  
1.0  
1.5  
2.0  
2.5  
3.0  
V
DS  
– Drain-to-Source Voltage (V)  
V
GS  
– Gate-to-Source Voltage (V)  
Output Characteristics  
Transfer Characteristics  
S10-0110-Rev. D, 18-Jan-10  
Document Number: 73253  
2
For technical questions, contact:

THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT  
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH
A
T

Si1403BDL  
Vishay Siliconix  
TYPICAL CHARACTERISTICS
(25 °C, unless otherwise noted)  
500  
400  
300  
200  
100  
0
0.40  
0.32  
C
iss  
0.24  
0.16  
0.08  
0.00  
V
GS  
= 2.5 V  
V
V
= 3.6 V  
= 4.5 V  
GS  
C
oss  
GS  
C
rss  
0
4
8
12  
16  
20  
0
1
2
3
4
I
D
– Drain Current (A)  
V
DS  
– Drain-to-Source Voltage (V)  
On-Resistance vs. Drain Current  
Capacitance  
5
4
3
2
1
0
1.6  
1.4  
1.2  
1.0  
0.8  
0.6  
V
D
= 10 V  
V
D
= 4.5 V  
DS  
= 1.5 A  
GS  
I =
 
1.5 A  
I
0.0  
0.5  
1.0  
1.5  
2.0  
2.5  
3.0  
– 50
 
– 25  
0
25  
50  
75  
100 125 150  
Q
–
T
o
tal Gate Charge (nC)  
T –
 
Junction
T
e
mperature (°C)  
J
g
Gate Charge  
On-Resistance vs. Junction Temperature  
10  
0.40  
0.35  
0.30  
0.25  
0.20  
0.15  
0.10  
0.05  
0.00  
T
= 150 °C  
J
I
D
= 1.5
 
A  
I
D
= 0.8
 
A  
1
T
= 25 °C  
J
0.1  
0
0.3  
0.6  
0.9  
1.2  
1.5  
0
1
2
3
4
5
V
SD  
– Source-to-Drain Voltage (V)  
V
GS  
– Gate-to-Source Voltage (V)  
Source-Drain Diode Forward Voltage  
S10-0110-Rev. D, 18-Jan-10  
On-Resistance vs. Gate-to-Source Voltage  
Document Number: 73253  
3
For technical questions, contact:

THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT  
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH
A
T

Si1403BDL  
Vishay Siliconix  
TYPICAL CHARACTERISTICS
(25 °C, unless otherwise noted)  
0.5  
0.4  
10  
8
0.3  
0.2  
I
D
= 250
µ
A  
6
0.1  
4
2
0.0  
– 0.1  
– 0.2  
– 0.3  
0
-2  
-1  
– 50
 
– 25  
0
25  
50  
75  
100 125 150  
10  
10  
1
10  
100  
T
– Temperature (°C)  
Time (s)  
J
Threshold Voltage  
Single Pulse Power, Junction-to-Ambient  
10  
10
µ
s  
100
µ
s  
1 ms  
Limited
b
y  
DS(on)  
R
*
1
10 ms  
0.1  
100 ms  
1 s, 100 s, DC  
0.01  
T
A
= 25 °C  
Single Pulse  
0.001  
0.1  
1
10  
100  
V
DS  
– Drain-to-Source Voltage (V)  
>
* V  
GS  
minimum V  
at which R  
is specified  
DS(on)  
GS  
Safe Operating Area  
2
1
Duty Cycle = 0.5  
0.2  
Notes:  
0.1  
P
DM  
0.1  
0.05  
t
1
t
2
t
t
1
2
1. Duty Cycle, D =  
0.02  
2. Per Unit Base = R  
= 180 °C/W  
thJA  
(t)  
3. T  
– T
 
= P  
Z
JM  
A
DM thJA  
Single Pulse  
4. Surface Mounted  
0.01  
-4  
-3  
-2  
-1  
10  
10  
10  
10  
1
10  
100  
600  
Square Wa
v
e Pulse Duration (s)  
Normalized Thermal Transient Impedance, Junction-to-Ambient  
S10-0110-Rev. D, 18-Jan-10  
Document Number: 73253  
4
For technical questions, contact:

THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT  
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH
A
T

Si1403BDL  
Vishay Siliconix  
TYPICAL CHARACTERISTICS
(25 °C, unless otherwise noted)  
2
1
Duty Cycle = 0.5  
0.2  
0.1  
0.1  
0.05  
0.02  
Single Pulse  
0.01  
-4  
-3  
-2  
-1  
10  
10  
10  
Square Wa
v
e Pulse Duration (s)  
Normalized Thermal Transient Impedance, Junction-to-Foot  
10  
1
10  
S10-0110-Rev. D, 18-Jan-10  
Document Number: 73253  
5
For technical questions, contact:

THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT  
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH
A
T

Package Information  
Vishay Siliconix  
SCĆ70: 6ĆLEADS  
MILLIMETERS  
INCHES  
Dim Min  
Nom Max Min Nom
 
Max  
6
1
5
2
4
3
0.90  
–
–
1.10  
0.10  
1.00  
0.30  
0.25  
2.20  
2.40  
1.35  
0.035  
–
–
–
0.043  
0.004  
0.039  
0.012  
0.010  
0.087  
0.094  
0.053  
A
E
E
1
–
A

1  

0.80  
–
0.031  
0.006  
0.004  
0.071  
0.071  
0.045  
–
A

2  

0.15  
–
–
b
-B-  
0.10  
–
–
c
e
b
1.80  
2.00  
2.10  
1.25  
0.65BSC  
1.30  
0.20  
7
_
Nom  
0.079  
0.083  
0.049  
0.026BSC  
0.051  
0.008  
7
_
Nom  
D
e
1
1.80  
E
-A-  
D
1.15  
E

1  

c
e
1.20  
1.40  
0.30  
0.047  
0.004  
0.055  
0.012  
A
e

1  

A
2
1
0.10  
L
L
A
ECN: S-03946—Rev. B, 09-Jul-01  
DWG: 5550  
Document Number: 71154  
06-Jul-01  
1

AN813  
Vishay Siliconix  
Single-Channel LITTLE FOOT
R
SC-70 3-Pin and 6-Pin MOSFET  
Recommended Pad Pattern and Thermal Peformance  
INTRODUCTION  
BASIC PAD PATTERNS  
This technical note discusses pin-outs, package outlines, pad  
patterns, evaluation board layout, and thermal performance  
for single-channel LITTLE FOOT power MOSFE
T
s
i
n the  
SC-70 package. These new Vishay Siliconix devices are  
intended for small-signal applications where a miniaturized  
package is needed and low levels of current (around 350 mA)  
need to be switched, either directly or by using a level shift  
configuration. Vishay provides these single devices with a  
range of on-resistance specifications and in both traditional  
3-pin and new 6-pin versions. The new 6-pin SC-70 package  
enables improved on-resistance values and enhanced  
thermal performance compared to the 3-pin package.  
See Application Note 826,
Recommended Minimum Pad  
Patterns With Outline Drawing Access for Vishay
 
Siliconix  
MOSFE
T
s, (

) for the basic  
pad layout and dimensions for the 3-pin SC-70 and the 6-pin  
SC-70. These pad patterns are sufficient for the low-power  
applications for which this package is intended. Increasing the  
pad pattern has little effect on thermal resistance for the 3-pin  
device, reducing it by only 10% to 15%. But for the 6-pin  
device, increasing the pad patterns yields a reduction in  
thermal resistance on the order of 35% when using a 1-inch  
square with full copper on both sides of the printed circuit board  
(PCB). The availability of four drain leads rather than the  
traditional single drain lead allows a better thermal path from  
the package to the PCB and external environment.  
PIN-OUT  
Figure 1 shows the pin-out description and Pin 1 identification  
for the single-channel SC-70 device in both 3-pin and 6-pin  
configurations. The pin-out of the 6-pin device allows the use  
of four pins as drain leads, which helps to reduce on-resistance  
and junction-to-ambient thermal resistance.  
EVALUATION BOARDS FOR THE SINGLE  
SC70-3 AND SC70-6  
Figure 2 shows the 3-pin and 6-pin SC-70 evaluation boards  
(EVB). Both
 
measure 0.6 inches by 0.5 inches. Their copper  
pad traces are the same as described in the previous section,  
Basic Pad Patterns
. Both boards allow interrogation from the  
outer pins to 6-pin DIP connections, permitting test sockets to  
be used in evaluation testing.  
SOT-323  
SC-70 (3-LEADS)  
SOT-363  
SC-70 (6-LEADS)  
T
o
p View  
Top View  
G
S
1
D
D
G
1
2
3
6
The thermal performance of the single SC-70 has been  
measured on the EVB for both the 3-pin and 6-pin devices,
 
the  
results shown in Figures 3 and 4. The minimum recommended  
footprint on the evaluation board was compared with the  
industry standard of 1-inch square FR4 PCB with copper on  
both sides of the board.  
3
5
4
D
2
FIGURE 1.  
For package dimensions see outline drawings:  
SC-70 (3-Leads) (

)  
SC-70 (6-Leads) (

)  
Back of Board, SC70-3 and SC70-6  
Front of Board SC70-3  
Front of Board SC70-6  
ChipFET
r
 
ChipFET
r  
vishay.com  
FIGURE 2.  
Document Number:
 
71236  
12-Dec-03  
1

AN813  
Vishay Siliconix  
THERMAL PERFORMANCE  
Junction-to-Foot Thermal Resistance  
(the Package Performance)  
SC-70 (6-PIN)  
Room Ambient 25
_
C  
Elevated Ambient 60
_
C  
Thermal performance for the 3-pin SC-70 measured as  
junction-to-foot thermal resistance is 285
_
C/W typical,  
340
_
C/W maximum. Junction-to-foot thermal resistance for  
the 6-pin SC70-6 is 105
_
C/W typical, 130
_
C/W maximum —  
a nearly two-thirds reduction compared with the 3-pin device.  
The “foot” is the drain lead of the device as it connects with the  
body. This improved performance is obtained by the increase  
in drain leads from one to four on the 6-pin SC-70. Note that  
these numbers are somewhat higher than other LITTLE FOOT  
devices due to the limited thermal performance of the Alloy 42  
lead-frame compared with a standard copper lead-frame.  
T

J(max)

*
T

A  

R
q

JA  

T

J(max)

*
T

A  

P

D  

+
P

D  

P

D  

+
+
R
q

JA  

150

o

C
*
25

o

C  
180

o

C
ń
W  
150

o

C
*
60

o

C  
180

o

C
ń
W  
P

D  

+
P

D

+
694 mW  
P

D

+
500 mW  
NOTE: Although
 
they are intended for low-power applications,  
devices in the 6-pin SC-70 will handle power dissipation in  
excess of 0.5 W.  
Testing  
Junction-to-Ambient Thermal Resistance  
(dependent on PCB size)  
To
a
id comparison further, Figures 3 and 4 illustrate  
single-channel SC-70 thermal performance on two different  
board sizes and two different pad patterns. The results display  
the thermal performance out to steady state and produce a  
graphic account of the thermal performance variation between  
the two packages. The measured steady state values of R
θ

JA  

for the single 3-pin and 6-pin SC-70 are as follows:  
The typical R
θ

JA

for the single 3-pin SC-70 is 360
_
C/W steady  
state, compared with 180
_
C/W for the 6-pin SC-70. Maximum  
ratings are 430
_
C/W for the 3-pin device versus 220
_
C/W for  
the 6-pin device. All figures are based on the 1-inch square  
FR4 test board.The following table shows how the thermal  
resistance impacts power dissipation for the two different  
pin-outs at two different ambient temperatures.  
LITTLE FOOT SC-70  
3-Pin  
6-Pin  
1) Minimum recommended pad pattern  
(see Figure 4) on the EVB.  
410.31
_
C/W  
329.7
_
C/W  
SC-70 (3-PIN)  
Room Ambient 25
_
C  
Elevated Ambient 60
_
C  
2) Industry standard 1” square PCB with  
maximum copper both sides.  
360
_
C/W  
211.8
_
C/W  
T

J(max)

*
T

A  

T

J(max)

*
T

A  

R
q

JA  

The results show that designers can reduce thermal  
resistance R
θ

JA

on the order of 20% simply by using the 6-pin  
device rather than the 3-pin device. In this example, a 80
_
C/W  
reduction was achieved without an increase in board area. If  
increasing board size is an option, a further 118
_
C/W reduction  
could be obtained by utilizing a 1-inch square PCB area.  
P

D  

+
P

D  

P

D  

+
+
R
q

JA  

150

o

C
*
25

o

C  
360

o

C
ń
W  
150

o

C
*
60

o

C  
360

o

C
ń
W  
P

D  

+
P

D

+
250 mW  
P

D

+
347 mW  
400  
320  
400  
320  
240  
3-pin  
3-pin  
240  
6-pin  
6-pin  
160  
80  
160  
80  
0.5 in x 0.6 in EVB  
1” Square FR4 PCB  
0
0
-5  
-4  
-3  
-2  
-1  
-5  
-4  
-3  
-2  
-1  
10  
10  
10  
10  
10  
Time (Secs)  
1
10  
100  
1000  
10  
10  
10  
10  
10  
Time (Secs)  
1
10  
100  
1000  
FIGURE 4.  
Comparison of SC70-3 and SC70-6 on 1”  
Square FR4 PCB  
FIGURE 3.  
Comparison of
 
SC70-3 and SC70-6 on EVB  
Document Number:
 
71236  
12-Dec-03  
2

Application Note 826  
Vishay Siliconix  
RECOMMENDED MINIMUM
P
A
DS FOR SC-70: 6-Lead  
0.067  
(1.702)  
0.016  
0.026  
0.010  
(0.406)  
(0.648)  
(0.241)  
Recommended Minimum Pads  
Dimensions in Inches/(mm)  
Return to Index  
18  
Document Number: 72602  
Revision: 21-Jan-08  

Legal Disclaimer Notice  
Vishay  
Disclaimer  
ALL PRODUCT, PRODUCT SPECIFICATIONS AND DATA ARE SUBJECT TO CHANGE WITHOUT NOTICE TO IMPROVE  
RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE.  
Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectively,  
“Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained in any datasheet or in any other  
disclosure relating to any product.  
Vishay makes no warranty, representation or guarantee regarding the suitability of the products for any particular purpose or  
the continuing production of any product.
 
To the maximum extent permitted by applicable law, Vishay disclaims (i) any and all  
liability arising out of the application or use of any product, (ii) any and all liability, including without limitation special,  
consequential or incidental damages, and (iii) any and all implied warranties, including warranties of fitness for particular  
purpose, non-infringement and merchantability.  
Statements regarding the suitability of products for certain types of applications are based on Vishay’s knowledge of  
typical requirements that are often placed on Vishay products in generic applications.
 
Such statements are not binding  
statements about the suitability of products for a particular application.
 
It is the customer’s responsibility to validate that a  
particular product with the properties described in the product specification is suitable for use in a particular application.  
Parameters provided in datasheets and / or specifications may vary in different applications and performance may vary over  
time. All
 
operating parameters, including typical parameters, must be validated for each customer application by the customer’s  
technical experts.
 
Product specifications do not expand or otherwise modify Vishay’s terms and conditions of purchase,  
including but not limited to the warranty expressed therein.  
Except as expressly indicated in writing, Vishay products are not designed for use in medical, life-saving, or life-sustaining  
applications or for any other application in which the failure of the Vishay product could result in personal injury or death.  
Customers using or selling Vishay products not expressly indicated for use in such applications do so at their own risk.  
Please contact authorized Vishay personnel to obtain written terms and conditions regarding products designed for  
such applications.  
No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document  
or by any conduct of Vishay.
 
Product names and markings noted herein may be trademarks of their respective owners.  
© 2021 VISHAY INTERTECHNOLOGY, INC. ALL RIGHTS RESERVED  
Revision: 01-Jan-2021  
Document Number: 91000  
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