Vishay-Intertech-SI1442DH-T1-GE3
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Si1442DH
Vishay Siliconix
N-Channel 12 V (D-S) MOSFET
FEATURES
• TrenchFET
®
power MOSFET
S
C-70 (6 lea
d
s)
S
OT-363
S
in
g
le
S
4
• 100 % R
g
tested
D
5
• Material categorization:
D
6
For definitions of compliance please see
3
APPLICATIONS
G
2
D
• Load
switch and battery
switch for portable devices
D
1
D
Top View
• DC/DC converters
Marking code:
AT
• Low on-resistance for low
voltage drop
PRODUCT SUMMARY
V
DS
(V)
G
12
0.020
0.024
0.030
13.1
4
R
DS(on)
max. (
) at V
GS
= 4.5 V
R
DS(on)
max. (
) at V
GS
= 2.5 V
R
DS(on)
max. (
) at V
GS
= 1.8 V
Q
g
typ. (nC)
S
N-Channel MOSFET
I
D
(A)
a
Configuration
Single
ORDERING INFORMATION
Package
SC-70
Lead (Pb)-free and halogen-free
Si1442DH-T1-GE3
ABSOLUTE MAXIMUM RATINGS
(T
A
= 25 °C, unless otherwise noted)
PARAMETER
SYMBOL
LIMIT
12
UNIT
Drain-source voltage
Gate-source voltage
V
DS
V
V
GS
8
T
F
= 25 °C
T
F
= 70 °C
T
A
= 25 °C
T
A
= 70 °C
4
a
4
a
4
a, b, c
4
a, b, c
20
Continuous drain current (T
J
= 150 °C)
I
D
A
Pulsed drain current (t = 300 μs)
I
DM
I
S
T
F
= 25 °C
T
A
= 25 °C
T
F
= 25 °C
T
F
= 70 °C
T
A
= 25 °C
T
A
= 70 °C
2.3
1.3
b, c
Continuous source-drain diode current
2.8
1.8
Maximum power dissipation
P
D
W
1.56
b, c
1
b, c
-55 to +150
260
Operating junction and storage temperature range
Soldering recommendations (peak temperature)
T
J
, T
stg
°C
THERMAL RESISTANCE RATINGS
PARAMETER
Maximum junction-to-ambient
b, d
SYMBOL
R
thJA
TYPICAL
MAXIMUM
UNIT
t
5 s
60
34
80
45
°C/W
Maximum junction-to-foot (drain)
Steady state
R
thJF
Notes
a. T
F
= 25 °C, package limited
b. Surface
mounted on 1″ x 1″ FR4 board
c. t
= 5 s
d. Maximum
under steady state conditions is 125 °C/W
S12-0546-Rev. A, 12-Mar-12
Document Number: 63772
1
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
Si1442DH
Vishay Siliconix
SPECIFICATIONS
(T
J
= 25 °C, unless otherwise noted)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN.
TYP.
MAX.
UNIT
Static
Drain-source breakdown voltage
V
DS
V
DS
/T
J
V
GS(th)
/T
J
V
GS(th)
V
GS
= 0 V, I
D
= 250 μA
I
D
= 250 μA
12
–
–
–
V
V
DS
temperature coefficient
5
–
mV/°C
V
GS(th)
temperature coefficient
Gate-source threshold voltage
Gate-source leakage
–
-2.7
–
1
V
DS
= V
GS
, I
D
= 250 μA
0.4
–
–
V
I
GSS
V
DS
= 0 V, V
GS
=
8 V
–
100
1
nA
V
DS
= 12 V, V
GS
= 0 V
V
DS
= 12 V, V
GS
= 0 V, T
J
= 55 °C
V
DS
5 V, V
GS
= 4.5 V
–
–
–
Zero gate voltage drain current
On-state drain current
a
I
DSS
μA
A
–
10
I
D(on)
15
–
–
–
V
GS
= 4.5 V, I
D
= 6 A
0.017
0.019
0.023
33
0.020
0.024
0.030
–
Drain-source on-state resistance
a
R
DS(on)
g
fs
V
GS
= 2.5 V, I
D
= 5 A
GS
= 1.8 V, I
D
= 3 A
–
V
–
Forward transconductance
a
Dynamic
b
V
DS
= 6 V, I
D
= 6 A
–
S
Input capacitance
C
iss
C
oss
C
rss
–
–
1010
323
305
21.8
13.1
2
–
–
V
DS
= 6 V, V
GS
= 0 V, f = 1 MHz
V
DS
= 6 V, V
GS
= 8 V, I
D
= 7 A
V
DS
= 6 V, V
GS
= 4.5 V, I
D
= 7 A
f = 1 MHz
Output capacitance
Reverse transfer capacitance
pF
–
–
–
33
20
–
Total gate charge
Q
g
–
nC
Gate-source charge
Gate-drain charge
Gate resistance
Turn-on delay time
Rise time
Q
gs
Q
gd
R
g
–
–
2.7
1.6
8
–
0.3
–
3.2
16
20
33
18
12
18
33
16
t
d(on)
t
r
t
d(off)
t
f
t
d(on)
t
r
t
d(off)
t
f
–
13
22
9
V
DD
= 6 V, R
L
= 1.07
I
D
5.6 A, V
GEN
= 4.5 V, R
g
= 1
Turn-off delay time
Fall time
–
–
ns
Turn-on delay time
Rise time
–
6
–
12
22
8
V
DD
= 6 V, R
L
= 1.07
I
D
5.6 A, V
GEN
= 8 V, R
g
= 1
Turn-off delay time
Fall time
–
–
Drain-Source Body Diode Characteristics
Continuous source-drain diode current
Pulse diode forward current
T
C
= 25 °C
I
S
I
SM
V
SD
t
rr
–
–
–
–
–
–
–
–
–
4
20
1.2
30
14
–
A
I
S
= 5.6 A, V
GS
= 0 V
Body diode voltage
0.75
19
7
V
Body diode reverse recovery time
Body diode reverse recovery charge
Reverse recovery fall time
ns
nC
Q
rr
t
a
I
F
= 5.6 A, di/dt = 100 A/μs,
T
J
= 25 °C
13
6
ns
Reverse recovery rise time
t
b
–
Notes
a. Pulse
test; pulse width
300 μs, duty cycle
2 %
b. Guaranteed
by design, not subject to production testing
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation
of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect device reliability.
S12-0546-Rev. A, 12-Mar-12
Document Number: 63772
2
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
Si1442DH
Vishay Siliconix
TYPICAL CHARACTERISTICS
(25 °C, unless otherwise noted)
2
20
V
GS
= 5 V thru 2 V
1.5
1
15
10
5
V
GS
= 1.5 V
T
C
= 25
°
C
0.5
0
T
C
= 125
°
C
V
GS
= 1 V
T
C
= – 55
°
C
0
0
0.3
0.6
0.9
1.2
0
0
0
0.5
1
1.5
2
V
D
S
– Drain-to-
S
ource Voltage (V)
V
GS
–
G
ate-to-
S
ource Voltage (V)
Output Characteristics
Transfer Characteristics
0.04
0.03
0.02
0.01
0.00
1600
1200
800
400
0
V
GS
= 1.8 V
V
GS
= 2.5 V
C
i
ss
V
GS
= 4.5 V
C
o
ss
C
r
ss
6
12
18
24
30
0
3
6
9
12
V
D
S
– Drain-to-
S
ource Voltage (V)
I
D
– Drain Current (A)
On-Resistance vs. Drain Current
Capacitance
8
6
4
2
0
1.5
1.3
1.1
0.9
0.7
I
D
= 7 A
I
D
= 6 A
V
GS
= 2.5 V
V
D
S
= 3 V
V
GS
= 4.5 V
V
D
S
= 6 V
V
D
S
= 9.6 V
6
12
18
24
– 50
– 25
0
25
50
75
100 125 150
T
J
– Junction Temperature (
°
C)
Q
g
– Total
G
ate Charge (nC)
Gate Charge
On-Resistance vs. Junction Temperature
S12-0546-Rev. A, 12-Mar-12
Document Number: 63772
3
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
Si1442DH
Vishay Siliconix
TYPICAL CHARACTERISTICS
(25 °C, unless otherwise noted)
10
0.045
0.038
0.031
0.024
0.017
0.010
I
D
= 6 A
T
J
= 150
°
C
1
T
J
= 125
°
C
T
J
= 25
°
C
T
J
= 25
°
C
0.1
0.0
0.2
0.4
0.6
0.8
1.0
0
2
4
6
8
V
GS
–
G
ate-to-
S
ource Voltage (V)
V
S
D
–
S
ource-to-Drain Voltage (V)
Source-Drain Diode Forward Voltage
On-Resistance vs. Gate-to-Source Voltage
30
25
20
15
10
5
0.8
0.65
0.5
I
D
= 250 μA
0.35
0.2
– 50
– 25
0
0
25
50
75
100 125 150
0.001
0.01
0.1
1
10
100
1000
T
J
– Temperature (
°
C)
Time (
s
)
Threshold Voltage
Single Pulse Power, Junction-to-Ambient
100
Limited by R
D
S
(on)
*
100 μ
s
10
1
1 m
s
10 m
s
100 m
s
10
s
,1
s
DC
0.1
T
C
= 25
°
C
BVD
SS
Limited
S
ingle Pul
s
e
0.01
0.1
1
10
100
V
D
S
– Drain-to-
S
ource Voltage (V)
* V
GS
> minimum V
GS
at which R
D
S
(on)
i
s s
pecified
Safe Operating Area, Junction-to-Ambient
S12-0546-Rev. A, 12-Mar-12
Document Number: 63772
4
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
Si1442DH
Vishay Siliconix
TYPICAL CHARACTERISTICS
(25 °C, unless otherwise noted)
12
9
6
Package Limited
3
0
0
25
50
75
100
125
150
T
C
– Ca
s
e Temperature (
°
C)
Current Derating
a
3.5
2.8
2.1
1.4
0.7
0
1.2
0.9
0.6
0.3
0.0
0
25
50
75
100
125
150
0
25
50
75
100
125
150
T
C
– Ca
s
e Temperature (
°
C)
T
A
– Ambient Temperature (
°
C)
Power Junction-to-Case
Power Junction-to-Ambient
Note
a. The
power dissipation P
D
is based on T
J
max. = 150 °C, using junction-to-case thermal resistance, and is more useful in settling the upper
dissipation limit for cases where additional heatsinking is used. It is used to determine the current rating, when this rating falls below the
package limit
S12-0546-Rev. A, 12-Mar-12
Document Number: 63772
5
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
Si1442DH
Vishay Siliconix
TYPICAL CHARACTERISTICS
(25 °C, unless otherwise noted)
1
Duty Cycle = 0.5
0.2
0.1
0.1
Note
s
:
P
DM
0.05
t
1
0.02
t
2
t
1
1. Duty Cycle, D =
t
2
2. Per Unit Ba
s
e = R
= 125 °C/W
thJA
(t)
3. T
– T
= P
JM
Z
A
DM thJA
S
ingle Pul
s
e
4.
S
urface Mounted
0.01
-4
-3
-2
-1
10
10
10
10
1
100
1000
10
Sq
uare Wave Pul
s
e Duration (
s
)
Normalized Thermal Transient Impedance, Junction-to-Ambient
1
Duty Cycle = 0.5
0.2
0.1
0.05
0.02
0.1
S
ingle Pul
s
e
0.01
-4
-3
-2
-1
10
10
10
10
1
10
Sq
uare Wave Pul
s
e Duration (
s
)
Normalized Thermal Transient Impedance, Junction-to-Foot
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package / tape drawings, part marking, and
S12-0546-Rev. A, 12-Mar-12
Document Number: 63772
6
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
Package Information
Vishay Siliconix
SCĆ70: 6ĆLEADS
MILLIMETERS
INCHES
Dim Min
Nom Max Min Nom
Max
6
1
5
2
4
3
0.90
–
–
1.10
0.10
1.00
0.30
0.25
2.20
2.40
1.35
0.035
–
–
–
0.043
0.004
0.039
0.012
0.010
0.087
0.094
0.053
A
E
E
1
–
A
1
0.80
–
0.031
0.006
0.004
0.071
0.071
0.045
–
A
2
0.15
–
–
b
-B-
0.10
–
–
c
e
b
1.80
2.00
2.10
1.25
0.65BSC
1.30
0.20
7
_
Nom
0.079
0.083
0.049
0.026BSC
0.051
0.008
7
_
Nom
D
e
1
1.80
E
-A-
D
1.15
E
1
c
e
1.20
1.40
0.30
0.047
0.004
0.055
0.012
A
e
1
A
2
1
0.10
L
L
A
ECN: S-03946—Rev. B, 09-Jul-01
DWG: 5550
Document Number: 71154
06-Jul-01
1
AN815
Vishay Siliconix
Single-Channel LITTLE FOOT
R
SC-70 6-Pin MOSFET
Copper Leadframe Version
Recommended Pad Pattern and Thermal Performance
INTRODUCTION
EVALUATION BOARDS ꢀ SINGLE SC70-6
The new single 6-pin SC-70 package with a copper leadframe
enables improved on-resistance values and enhanced
thermal performance
as compared to the existing 3-pin and
6-pin packages with Alloy 42 leadframes. These devices are
intended for small
to medium load applications where a
miniaturized package is required. Devices in this package
come in a range
of on-resistance values, in n-channel and
p-channel versions. This technical note discusses pin-outs,
package outlines, pad patterns, evaluation board layout, and
thermal performance for the single-channel version.
The evaluation board (EVB) measures 0.6 inches by
0.5 inches. The copper pad traces are the same as in Figure 2.
The board allows examination from the outer pins to 6-pin DIP
connections, permitting test sockets to be used in evaluation
testing. See
Figure 3.
52 (mil)
BASIC PAD PATTERNS
6
5
2
4
3
See Application Note 826,
Recommended Minimum Pad
Patterns With Outline Drawing Access for Vishay Siliconix
pad layout and dimensions. These pad patterns are sufficient
for the low to medium power applications for which this
package is intended. Increasing the drain pad pattern yields a
reduction in
thermal resistance and is a preferred footprint.
The availability of four drain leads rather than the traditional
single drain lead allows a better thermal path from the package
to the PCB and external environment.
96 (mil)
71 (mil)
26 (mil)
1
13 (mil)
0, 0 (mil)
18 (mil)
26 (mil)
PIN-OUT
16 (mil)
Figure
1 shows the pin-out description and Pin 1
FIGURE 2.
SC-70 (6 leads) Single
identification.The pin-out of this device allows the use of four
pins as drain leads, which helps to reduce on-resistance and
junction-to-ambient thermal resistance.
SOT-363
SC-70 (6-LEADS)
The thermal performance of the single 6-pin SC-70 has been
measured on the EVB, comparing both the copper and
Alloy 42
leadframes. This test was first conducted on the
traditional Alloy 42 leadframe and was then repeated using the
1-inch
2
PCB with dual-side copper coating.
D
D
G
1
2
3
6
5
D
D
S
4
T
o
p View
FIGURE 1.
For package dimensions see outline drawing SC-70 (6-Leads)
Document Number:
71334
12-Dec-03
1
AN815
Vishay Siliconix
Front of Board SC70-6
Back of Board SC70-6
vishay.com
FIGURE 3.
THERMAL PERFORMANCE
Junction-to-Foot Thermal Resistance
(Package Performance)
COOPER LEADFRAME
Room Ambient 25
_
C
Elevated Ambient 60
_
C
The junction to foot thermal resistance is a useful method of
comparing different packages thermal performance.
T
J(max)
*
T
A
T
J(max)
*
T
A
P
D
+
P
D
+
R
q
JA
R
q
JA
150
o
C
*
60
o
C
124
o
C
ń
W
150
o
C
*
25
o
C
124
o
C
ń
W
P
D
+
P
D
+
A helpful way of presenting the thermal performance of the
6-Pin SC-70 copper leadframe device is to compare it to the
traditional Alloy 42 version.
P
D
+
726 mW
P
D
+
1.01 W
As can be seen from the calculations above, the compact 6-pin
SC-70 copper leadframe LITTLE FOOT power MOSFET can
handle up to 1 W under the stated conditions.
Thermal performance for the 6-pin SC-70 measured as
junction-to-foot thermal resistance, where the “foot” is the
drain lead of the device at the bottom where it meets the PCB.
The junction-to-foot thermal resistance is typically 40
_
C/W in
the copper leadframe and 163
_
C/W in the Alloy 42 leadframe
— a four-fold improvement. This improved performance is
obtained by the enhanced thermal conductivity of copper over
Alloy 42.
Testing
To
f
urther aid comparison of copper and Alloy 42 leadframes,
Figure 5 illustrates single-channel 6-pin SC-70 thermal
performance on two different board sizes and two different pad
patterns. The measured steady-state values of R
q
JA
for the
two leadframes are as follows:
LITTLE FOOT 6-PIN SC-70
Power Dissipation
Alloy 42
Copper
The typical R
q
JA
for the single 6-pin SC-70 with copper
leadframe is 103
_
C/W steady-state, compared with 212
_
C/W
for the Alloy 42 version. The figures are based on the 1-inch
2
FR4 test board. The following example shows how the thermal
resistance impacts power dissipation for the two different
leadframes at varying ambient temperatures.
1) Minimum recommended pad pattern on
the EVB board V (see Figure 3.
329.7
_
C/W
208.5
_
C/W
2
2) Industry standard 1-inch
PCB with
211.8
_
C/W
103.5
_
C/W
maximum copper both sides.
The results indicate that designers can reduce thermal
resistance (R
q
JA
) by 36% simply by using the copper
leadframe device rather than the Alloy 42 version. In this
example, a 121
_
C/W reduction was achieved without an
increase in board area. If increasing in board size is feasible,
a further 105
_
C/W reduction could be obtained by utilizing a
1-inch
2
square PCB area.
ALLOY 42 LEADFRAME
Room Ambient 25
_
C
Elevated Ambient 60
_
C
T
J(max)
*
T
A
R
q
JA
T
J(max)
*
T
A
R
q
JA
P
D
+
P
D
+
The copper leadframe versions have the following suffix:
150
o
C
*
25
o
C
212
o
C
ń
W
150
o
C
*
25
o
C
212
o
C
ń
W
P
D
+
P
D
+
Single:
Dual:
Si14xxEDH
Si19xxEDH
P
D
+
590 mW
P
D
+
425 mW
Complementary: Si15xxEDH
Document Number:
71334
12-Dec-03
2
AN815
Vishay Siliconix
250
200
150
400
320
240
Alloy
42
Alloy
42
160
80
100
50
Copper
100
Copper
0
0
-5
-4
-3
-2
-1
-5
-4
-3
-2
-1
10
10
10
10
10
1
10
1000
10
10
10
10
10
1
10
100
1000
Time (Secs)
Time (Secs)
2
FIGURE 4.
Leadframe Comparison on EVB
FIGURE 5.
Leadframe Comparison on Alloy 42 1-inch
PCB
Document Number:
71334
12-Dec-03
3
Legal Disclaimer Notice
Vishay
Disclaimer
ALL PRODUCT, PRODUCT SPECIFICATIONS AND DATA ARE SUBJECT TO CHANGE WITHOUT NOTICE TO IMPROVE
RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE.
Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectively,
“Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained in any datasheet or in any other
disclosure relating to any product.
Vishay makes no warranty, representation or guarantee regarding the suitability of the products for any particular purpose or
the continuing production of any product.
To the maximum extent permitted by applicable law, Vishay disclaims (i) any and all
liability arising out of the application or use of any product, (ii) any and all liability, including without limitation special,
consequential or incidental damages, and (iii) any and all implied warranties, including warranties of fitness for particular
purpose, non-infringement and merchantability.
Statements regarding the suitability of products for certain types of applications are based on Vishay’s knowledge of
typical requirements that are often placed on Vishay products in generic applications.
Such statements are not binding
statements about the suitability of products for a particular application.
It is the customer’s responsibility to validate that a
particular product with the properties described in the product specification is suitable for use in a particular application.
Parameters provided in datasheets and / or specifications may vary in different applications and performance may vary over
time. All
operating parameters, including typical parameters, must be validated for each customer application by the customer’s
technical experts.
Product specifications do not expand or otherwise modify Vishay’s terms and conditions of purchase,
including but not limited to the warranty expressed therein.
Except as expressly indicated in writing, Vishay products are not designed for use in medical, life-saving, or life-sustaining
applications or for any other application in which the failure of the Vishay product could result in personal injury or death.
Customers using or selling Vishay products not expressly indicated for use in such applications do so at their own risk.
Please contact authorized Vishay personnel to obtain written terms and conditions regarding products designed for
such applications.
No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document
or by any conduct of Vishay.
Product names and markings noted herein may be trademarks of their respective owners.
© 2021 VISHAY INTERTECHNOLOGY, INC. ALL RIGHTS RESERVED
Revision: 01-Jan-2021
Document Number: 91000
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