Vishay-Intertech-SI1539CDL-T1-GE3
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Si1539CDL
Vishay Siliconix
N- and P-Channel 30 V (D-S) MOSFET
FEATURES
PRODUCT SUMMARY
•
Halogen-free According to IEC 61249-2-21
V
DS
(V)
R
DS(on)
(
)
I
D
(A)
a
Q
g
(Typ.)
Definition
0.388 at V
GS
= 10 V
0.525 at V
GS
= 4.5 V
0.890 at V
GS
= – 10 V
1.7 at V
GS
= – 4.5 V
0.7
•
•
TrenchFET
®
Power MOSFET
100 % R
g
Tested
N-Channel
P-Channel
30
0.55
0.6
– 0.5
0.8
– 30
APPLICATIONS
– 0.3
•
DC/DC Converter
•
Load Switch
SOT-363
SC-70 (6-LEADS)
D
1
S
2
S
1
G
1
D
2
1
2
3
6
D
1
Markin
g
Code
RG XX
G
2
5
4
G
2
G
1
Lot Tracea
b
ility
and Date Code
S
2
Part #
Code
S
D
2
1
Top
V
ie
w
Orderin
g
Information:
Si1539CDL-T1-GE3 (Lead (P
b
)-free and Halogen-free)
N-Channel MOSFET
P-Channel MOSFET
ABSOLUTE MAXIMUM RATINGS
(T =
25 °C, unless otherwise noted)
A
Parameter
Symbol
N-Channel
P-Channel
Unit
V
DS
Drain-Source Voltage
Gate-Source Voltage
30
– 30
V
V
GS
20
T
C
= 25 °C
T
C
= 70 °C
0.7
0.6
– 0.5
– 0.4
Continuous Drain Current (T
J
= 150 °C)
I
D
0.7
b, c
– 0.4
b, c
T
A
= 25 °C
0.5
b, c
– 0.4
b, c
T
A
= 70 °C
T
C
= 25 °C
T
A
= 25 °C
A
0.3
– 0.3
I
S
Source-Drain Current Diode Current
Pulsed Drain Current
0.2
b, c
2
– 0.2
b, c
– 1
I
DM
T
C
= 25 °C
0.34
0.22
0.34
0.22
T
C
= 70 °C
A
= 25 °C
P
D
Maximum Power Dissipation
W
0.29
b, c
0.18
b, c
0.29
b, c
0.18
b, c
T
T
A
= 70 °C
T
J
, T
stg
Operating Junction and Storage
T
e
mperature Range
– 55 to 150
°C
THERMAL RESISTANCE RATINGS
N-Channel
P-Channel
Parameter
Symbol
R
thJA
Unit
Typ.
Max.
Typ.
Max.
438
Maximum Junction-to-Ambient
b, d
Maximum Junction-to-Foot (Drain)
t
10 s
365
308
438
370
365
308
°C/W
R
thJF
Steady State
370
Notes:
a. Based on T
C
= 25 °C.
b. Surface mounted on 1″ x 1″ FR4 board.
c. t = 10 s.
d. Maximum under steady state conditions is 486 °C/W (N-Channel) and 486 °C/W (P-Channel).
Document Number: 67469
S11-0238-Rev. A, 14-Feb-11
1
Si1539CDL
Vishay Siliconix
SPECIFICATIONS
(T =
25 °C, unless otherwise noted)
J
Parameter
Static
Symbol
Test Conditions
Min.
Typ.
a
Max.
Unit
V
GS
= 0
V
,
I
D
= 250 µA
N-Ch
P-Ch
N-Ch
P-Ch
N-Ch
P-Ch
N-Ch
30
V
DS
Drain-Source Breakdown Voltage
V
V
GS
= 0
V
,
I
D
= – 250 µA
– 30
I
D
= 250 µA
30
– 18
– 3.6
3.3
V
DS
T
e
mperature Coefficient
V
DS
/T
J
V
GS(th)
/T
J
I
D
= – 250 µA
I
D
= 250 µA
D
= – 250 µA
mV/°C
V
GS(th)
T
e
mperature Coefficient
I
V
DS
= V
GS
, I
D
= 250 µA
DS
= V
GS
, I
D
= – 250 µA
1.2
2.5
V
GS(th)
Gate-Source Threshold Voltage
Gate-Body Leakage
V
V
P-Ch
N-Ch
P-Ch
N-Ch
– 1.2
– 2.5
100
100
1
I
GSS
V
DS
= 0
V
,
V
GS
=
20 V
nA
V
DS
= 30
V
,
V
GS
= 0 V
V
DS
= – 30
V
,
V
GS
= 0 V
P-Ch
N-Ch
P-Ch
N-Ch
P-Ch
N-Ch
P-Ch
N-Ch
P-Ch
N-Ch
P-Ch
– 1
10
I
DSS
I
D(on)
R
DS(on)
g
fs
Zero Gate Voltage Drain Current
On-State Drain Current
b
µA
A
V
DS
= 30
V
,
V
GS
= 0
V
,
T
J
= 55 °C
V
DS
= – 30
V
,
V
GS
= 0
V
,
T
J
= 55 °C
– 10
V
DS
=
5
V
,
V
GS
= 10 V
2
V
DS
= –
5
V
,
V
GS
= – 10 V
– 1
V
GS
= 10
V
,
I
D
= 0.6 A
0.323
0.740
0.437
1.4
0.388
0.890
0.525
1.7
V
GS
= – 10
V
,
I
D
= – 0.4 A
GS
= 4.5
V
,
I
D
= 0.1A
GS
= – 4.5
V
,
I
D
= – 0.1 A
V
DS
= 15
V
,
I
D
= 0.6 A
Drain-Source On-State Resistance
b
S
V
V
1.2
Forward
T
r
ansconductance
b
V
DS
= – 15
V
,
I
D
= – 0.4 A
0.6
Dynamic
a
N-Ch
P-Ch
N-Ch
P-Ch
N-Ch
P-Ch
N-Ch
28
34
10
12
5
C
iss
C
oss
C
rss
Input Capacitance
N-Channel
DS
= 15
V
,
V
GS
= 0
V
, f = 1
M
Hz
V
Output Capacitance
pF
P-Channel
DS
= – 15
V
,
V
GS
= 0
V
, f = 1
M
Hz
V
Reverse
T
r
ansfer Capacitance
7
V
DS
= 15
V
,
V
GS
= 10
V
,
I
D
= 0.6 A
DS
= – 15
V
,
V
GS
= – 10
V
,
I
D
= – 0.4 A
1
1.5
V
V
P-Ch
N-Ch
P-Ch
N-Ch
P-Ch
N-Ch
P-Ch
N-Ch
P-Ch
1.5
0.55
0.8
3
Q
g
T
o
tal Gate Charge
1.1
1.2
N-Channel
DS
= 15
V
,
V
GS
= 4.5 V I
D
= 0.6 A
nC
V
0.2
Q
gs
Q
gd
R
g
Gate-Source Charge
Gate-Drain Charge
Gate Resistance
0.4
P-Channel
0.2
DS
= – 15
V
,
V
GS
= – 4.5
V
,
I
D
= – 0.4 A
f = 1 MHz
0.35
3.7
0.7
1.7
7.4
8.3
16.6
2
Document Number: 67469
S11-0238-Rev. A, 14-Feb-11
Si1539CDL
Vishay Siliconix
SPECIFICATIONS
(T =
25 °C, unless otherwise noted)
J
Parameter
Dynamic
a
Symbol
Test Conditions
Min.
Typ.
a
Max.
Unit
N-Ch
P-Ch
N-Ch
P-Ch
N-Ch
P-Ch
N-Ch
P-Ch
N-Ch
P-Ch
N-Ch
P-Ch
N-Ch
P-Ch
N-Ch
P-Ch
2
1
4
t
d(on)
t
r
t
d(off)
t
f
t
d(on)
t
r
t
d(off)
t
f
T
u
rn-On Delay Time
Rise Time
N-Channel
DD
= 15
V
,
R
L
= 30
I
D
0.5 A, V
GEN
= 10
V
,
R
g
= 1
2
V
14
9
21
18
20
16
18
16
39
48
38
29
21
8
11
8
P-Channel
DD
= – 15
V
,
R
L
= 38
I
D
– 0.4 A, V
GEN
= – 10
V
,
R
g
= 1
T
u
rn-Off Delay Time
Fall Time
V
9
8
ns
26
32
25
19
14
4
T
u
rn-On Delay Time
Rise Time
N-Channel
DD
= 15
V
,
R
L
= 30
I
D
0.5 A, V
GEN
= 4.5
V
,
R
g
= 1
V
P-Channel
DD
= – 15
V
,
R
L
= 38
I
D
– 0.4 A, V
GEN
= – 4.5
V
,
R
g
= 1
T
u
rn-Off Delay Time
Fall Time
V
15
10
23
20
Drain-Source Body Diode Characteristics
N-Ch
P-Ch
N-Ch
P-Ch
N-Ch
0.3
– 0.3
2
Continuous Source-Drain Diode
Current
I
S
T
C
= 25 °C
A
V
Pulse Diode Forward Current
a
Body Diode Voltage
I
SM
– 1
I
S
= 0.5 A
0.8
1.2
V
SD
I
S
= – 0.4 A
P-Ch
N-Ch
P-Ch
N-Ch
P-Ch
N-Ch
P-Ch
N-Ch
P-Ch
– 0.8
10
16
3
– 1.2
20
24
6
t
rr
Q
rr
t
a
Body Diode Reverse Recovery Time
Body Diode Reverse Recovery Charge
Reverse Recovery Fall Time
ns
N-Channel
I
F
= 0.5 A, dI/dt = 100 A/µs, T
J
= 25 °C
nC
8
16
6
P-Channel
I
F
= – 0.5 A, dI/dt = – 100 A/µs, T
J
= 25 °C
9
ns
4
t
b
Reverse Recovery Rise Time
7
Notes:
a. Guaranteed by design, not subject to production testing.
b. Pulse test; pulse width
300 µs, duty cycle
2 %.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation
of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect device reliability.
Document Number: 67469
S11-0238-Rev. A, 14-Feb-11
3
Si1539CDL
Vishay Siliconix
N-CHANNEL TYPICAL CHARACTERISTICS
(25 °C, unless otherwise noted)
2
0.5
0.4
0.3
0.2
0.1
0
V
GS
= 10 V thru 5 V
V
GS
= 4 V
1.5
1
T
C
= 25
°
C
0.5
0
V
GS
= 3 V
T
C
= 125
°
C
T
C
= – 55
°
C
0
0.5
1
1.5
2
0
1
2
3
4
V
DS
– Drain-to-Source Voltage (V)
V
GS
– Gate-to-Source Voltage (V)
Output Characteristics
Transfer Characteristics
0.80
0.60
0.40
0.20
0.00
40
30
20
10
0
C
iss
V
GS
= 4.5 V
V
GS
= 10 V
C
oss
C
rss
0
0.5
1
1.5
2
0
6
12
18
24
30
V
DS
– Drain-to-Source Voltage (V)
I
D
– Drain Current (A)
Capacitance
On-Resistance vs. Drain Current and Gate Voltage
1.8
1.5
1.2
0.9
0.6
10
V
GS
= 10 V
I
D
= 0.6 A
I
D
= 0.6 A
8
6
4
2
0
V
DS
= 7.5 V
V
DS
= 15 V
V
DS
= 24 V
V
GS
= 4.5 V
– 50
– 25
0
25
50
75
100 125 150
0
0.3
0.6
0.9
1.2
T
J
– Junction Temperature (
°
C)
Q
g
– Total Gate Charge (nC)
On-Resistance vs. Junction Temperature
Gate Charge
4
Document Number: 67469
S11-0238-Rev. A, 14-Feb-11
Si1539CDL
Vishay Siliconix
N-CHANNEL TYPICAL CHARACTERISTICS
(25 °C, unless otherwise noted)
10
0.8
0.6
0.4
0.2
0
I
D
= 0.6 A
T
J
= 125
°
C
T
J
= 150
°
C
1
T
J
= 25
°
C
T
J
= 25
°
C
0.1
0.0
0.3
0.6
0.9
1.2
1.5
2
4
6
8
10
V
SD
– Source-to-Drain Voltage (V)
V
GS
– Gate-to-Source Voltage (V)
Source-Drain Diode Forward Voltage
On-Resistance vs. Gate-to-Source Voltage
2
1.8
1.6
1.4
1.2
6.4
4.8
3.2
1.6
0
I
D
= 250 μA
– 50
– 25
0
25
50
75
100 125 150
0.001
0.01
0.1
1
10
T
J
– Temperature (
°
C)
Time (s)
Single Pulse Power, Junction-to-Ambient
Threshold Voltage
10
Limited by R
DS(on)
*
BVDSS Limited
100 μs
1
1 ms
0.1
10 ms
100 ms
T
C
= 25
°
C
Single Pulse
1 s
10 s, DC
0.01
0.1
1
10
100
V
DS
– Drain-to-Source Voltage (V)
* V
GS
> minimum V
GS
at which R
DS(on)
is specified
Safe Operating Area, Junction-to-Ambient
Document Number: 67469
S11-0238-Rev. A, 14-Feb-11
5
Si1539CDL
Vishay Siliconix
N-CHANNEL TYPICAL CHARACTERISTICS
(25 °C, unless otherwise noted)
0.8
0.6
0.4
0.2
0
0
25
50
75
100
125
150
T
C
– Case Temperature (
°
C)
Current Derating*
0.45
0.36
0.27
0.18
0.09
0
0.32
0.24
0.16
0.08
0
0
25
50
75
100
125
150
0
25
50
75
100
125
150
T
C
– Case Temperature (
°
C)
T
A
– Ambient Temperature (
°
C)
Power Derating, Junction-to-Foot
Power Derating, Junction-to-Ambient
* The power dissipation P
D
is based on T
J(max)
= 150 °C, using junction-to-case thermal resistance, and is more useful in settling the upper
dissipation limit for cases where additional heatsinking is used. It is used to determine the current rating, when this rating falls below the package
limit.
6
Document Number: 67469
S11-0238-Rev. A, 14-Feb-11
Si1539CDL
Vishay Siliconix
N-CHANNEL TYPICAL CHARACTERISTICS
(25 °C, unless otherwise noted)
1
Duty Cycle = 0.5
0.2
Notes:
0.1
0.05
0.02
P
DM
0.1
t
1
t
2
t
1
1. Duty Cycle, D =
t
2
2. Per Unit Base = R
= 486 °C/W
thJA
(t)
3. T
– T
= P
Z
Single Pulse
0.001
JM
A
DM thJA
4. Surface Mounted
0.01
0.0001
0.01
0.1
1
10
100
Square Wave Pulse Duration (s)
Normalized Thermal Transient Impedance, Junction-to-Ambient
1
Duty Cycle = 0.5
0.2
0.1
0.05
0.1
0.02
Single Pulse
0.01
0.0001
0.001
0.01
0.1
1
10
Square Wave Pulse Duration (s)
Normalized Thermal Transient Impedance, Junction-to-Foot
Document Number: 67469
S11-0238-Rev. A, 14-Feb-11
7
Si1539CDL
Vishay Siliconix
P-CHANNEL TYPICAL CHARACTERISTICS
(25 °C, unless otherwise noted)
1
0.2
0.15
0.1
V
GS
= 10 V thru 6 V
V
GS
= 5 V
0.8
0.6
0.4
0.2
0
V
GS
= 4 V
T
C
= 25
°
C
0.05
0
T
C
= 125
°
C
V
GS
= 3 V
T
C
= – 55
°
C
0
0.5
1
1.5
2
0
1
2
3
4
V
GS
– Gate-to-Source Voltage (V)
V
DS
– Drain-to-Source Voltage (V)
Transfer Characteristics
Output Characteristics
55
44
33
22
11
0
2
1.5
1
V
GS
= 4.5 V
C
iss
V
GS
= 10 V
C
oss
0.5
0
C
rss
0
6
12
18
24
30
0
0.2
0.4
0.6
0.8
1
V
DS
– Drain-to-Source Voltage (V)
I
D
– Drain Current (A)
Capacitance
On-Resistance vs. Drain Current and Gate Voltage
10
1.6
1.4
1.2
1.0
0.8
0.6
V
GS
= 10 V
I
D
= 0.4 A
8
V
DS
= 7.5 V
6
V
DS
= 15 V
4
V
DS
= 24 V
2
0
V
GS
= 4.5 V
– 50
– 25
0
0.3
0.6
0.9
1.2
1.5
0
25
50
75
100 125 150
T
J
– Junction Temperature (
°
C)
Q
g
– Total Gate Charge (nC)
On-Resistance vs. Junction Temperature
Gate Charge
8
Document Number: 67469
S11-0238-Rev. A, 14-Feb-11
Si1539CDL
Vishay Siliconix
P-CHANNEL TYPICAL CHARACTERISTICS
(25 °C, unless otherwise noted)
10
3
2.5
2
I
D
= 0.4 A
T
J
= 150
°
C
T
J
= 125
°
C
1
1.5
1
T
J
= 25
°
C
T
J
= 25
°
C
0.1
0.1
0.5
0.4
0.7
1.0
1.3
2
4
6
8
10
V
SD
– Source-to-Drain Voltage (V)
V
GS
– Gate-to-Source Voltage (V)
Source-Drain Diode Forward Voltage
On-Resistance vs. Gate-to-Source Voltage
2.4
2.2
2
6.4
4.8
3.2
1.6
0
I
D
= 250 μA
1.8
1.6
0.001
0.01
0.1
1
10
– 50
– 25
0
25
50
75
100 125 150
Time (s)
T
J
– Temperature (
°
C)
Single Pulse Power, Junction-to-Ambient
Threshold Voltage
10
Limited by R
DS(on)
*
1
1 ms
0.1
0.01
10 ms
100 ms
1 s
10 s, DC
T
C
= 25
°
C
Single Pulse
BVDSS Limited
0.001
0.1
1
10
100
V
DS
– Drain-to-Source Voltage (V)
* V
GS
> minimum V
GS
at which R
DS(on)
is specified
Safe Operating Area, Junction-to-Ambient
Document Number: 67469
S11-0238-Rev. A, 14-Feb-11
9
Si1539CDL
Vishay Siliconix
P-CHANNEL TYPICAL CHARACTERISTICS
(25 °C, unless otherwise noted)
0.55
0.44
0.33
0.22
0.11
0
0
25
50
75
100
125
150
T
C
– Case Temperature (
°
C)
Current Derating*
0.32
0.24
0.16
0.08
0.45
0.36
0.27
0.18
0.09
0
0.00
0
25
50
75
100
125
150
0
25
50
75
100
125
150
T
A
– Ambient Temperature (
°
C)
T
C
– Case Temperature (
°
C)
Power Derating, Junction-to-Foot
Power Derating, Junction-to-Ambient
* The power dissipation P
D
is based on T
J(max)
= 150 °C, using junction-to-case thermal resistance, and is more useful in settling the upper
dissipation limit for cases where additional heatsinking is used. It is used to determine the current rating, when this rating falls below the package
limit.
10
Document Number: 67469
S11-0238-Rev. A, 14-Feb-11
Si1539CDL
Vishay Siliconix
P-CHANNEL TYPICAL CHARACTERISTICS
(25 °C, unless otherwise noted)
1
Duty Cycle = 0.5
0.2
Notes:
0.1
0.05
0.02
P
DM
0.1
t
1
t
2
t
1
1. Duty Cycle, D =
t
2
2. Per Unit Base = R
= 486 °C/W
thJA
(t)
3. T
– T
= P
Z
Single Pulse
0.001
JM
A
DM thJA
4. Surface Mounted
0.01
0.0001
0.01
0.1
1
10
100
Square Wave Pulse Duration (s)
Normalized Thermal Transient Impedance, Junction-to-Ambient
1
Duty Cycle = 0.5
0.2
0.1
0.05
0.1
0.02
Single Pulse
0.01
0.0001
0.001
0.01
0.1
1
10
Square Wave Pulse Duration (s)
Normalized Thermal Transient Impedance, Junction-to-Foot
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and
Document Number: 67469
S11-0238-Rev. A, 14-Feb-11
11
Package Information
Vishay Siliconix
SCĆ70: 6ĆLEADS
MILLIMETERS
INCHES
Dim Min
Nom Max Min Nom
Max
6
1
5
2
4
3
0.90
–
–
1.10
0.10
1.00
0.30
0.25
2.20
2.40
1.35
0.035
–
–
–
0.043
0.004
0.039
0.012
0.010
0.087
0.094
0.053
A
E
E
1
–
A
1
0.80
–
0.031
0.006
0.004
0.071
0.071
0.045
–
A
2
0.15
–
–
b
-B-
0.10
–
–
c
e
b
1.80
2.00
2.10
1.25
0.65BSC
1.30
0.20
7
_
Nom
0.079
0.083
0.049
0.026BSC
0.051
0.008
7
_
Nom
D
e
1
1.80
E
-A-
D
1.15
E
1
c
e
1.20
1.40
0.30
0.047
0.004
0.055
0.012
A
e
1
A
2
1
0.10
L
L
A
ECN: S-03946—Rev. B, 09-Jul-01
DWG: 5550
Document Number: 71154
06-Jul-01
1
AN814
Vishay Siliconix
Dual-Channel LITTLE FOOT
R
SC-70 6-Pin MOSFET
Recommended Pad Pattern and Thermal Performance
INTRODUCTION
This technical note discusses the pin-outs, package outlines,
applications for which this package is intended. For the 6-pin
device, increasing the pad patterns yields a reduction in
thermal resistance on the order of 20% when using a 1-inch
square with full copper on both sides of the printed circuit board
(PCB).
pad patterns, evaluation board layout, and thermal
performance for dual-channel LITTLE FOOT power
MOSFE
T
s
i
n the SC-70 package. These new Vishay Siliconix
devices are intended for small-signal applications where a
miniaturized package is needed and low levels of current
(around 250 mA) need to be switched, either directly or by
using a level shift configuration. Vishay provides these devices
with a range of on-resistance specifications in 6-pin versions.
The new 6-pin SC-70 package enables improved
on-resistance values and enhanced thermal performance.
EVALUATION BOARDS FOR THE DUAL
SC70-6
The 6-pin SC-70 evaluation board (EVB) measures 0.6 inches
by 0.5 inches. The copper pad traces are the same as
described in the previous section,
Basic Pad Patterns
. The
board allows interrogation from the outer pins to 6-pin DIP
connections permitting test sockets to be used in evaluation
testing.
PIN-OUT
Figure 1 shows the pin-out description and Pin 1 identification
for the dual-channel SC-70 device in the 6-pin configuration.
The thermal performance of the dual SC-70 has been
measured on the EVB with the results shown below. The
minimum recommended footprint on the evaluation board was
compared with the industry standard 1-inch square FR4 PCB
with copper on both sides of the board.
SOT-363
SC-70 (6-LEADS)
S
1
G
1
D
2
1
2
3
6
5
D
1
THERMAL PERFORMANCE
G
2
Junction-to-Foot Thermal Resistance
(the Package Performance)
4
S
2
Thermal performance for the dual SC-70 6-pin package
measured as junction-to-foot thermal resistance is 300
_
C/W
typical, 350
_
C/W maximum. The “foot” is the drain lead of the
device as it connects with the body. Note that these numbers
are somewhat higher than other LITTLE FOOT devices due to
the limited thermal performance of the Alloy 42 lead-frame
compared with a standard copper lead-frame.
T
o
p View
FIGURE 1.
For package dimensions see outline drawing SC-70 (6-Leads)
Junction-to-Ambient Thermal Resistance
(dependent on PCB size)
The typical R
θ
JA
for the dual 6-pin SC-70 is 400
_
C/W steady
state. Maximum ratings are 460
_
C/W for the dual. All figures
based on the 1-inch square FR4 test board. The following
example shows how the thermal resistance impacts power
dissipation for the dual 6-pin SC-70 package at two different
ambient temperatures.
BASIC PAD PATTERNS
See Application Note 826,
Recommended Minimum Pad
Patterns With Outline Drawing Access for Vishay
Siliconix
SC-70. This basic pad pattern is sufficient for the low-power
Document Number:
71237
12-Dec-03
1
AN814
Vishay Siliconix
500
400
300
SC-70 (6-PIN)
Dual EVB
Room Ambient 25
_
C
Elevated Ambient 60
_
C
T
J(max)
*
T
A
T
J(max)
*
T
A
P
D
+
P
D
+
R
q
JA
R
q
JA
150
o
C
*
60
o
C
400
o
C
ń
W
150
o
C
*
25
o
C
400
o
C
ń
W
P
D
+
P
D
+
200
100
P
D
+
312 mW
P
D
+
225 mW
NOTE: Although
they are intended for low-power applications,
devices in the 6-pin SC-70 will handle power dissipation in
excess of 0.2 W.
1” Square FR4 PCB
0
-5
-4
-3
-2
-1
10
10
10
10
10
Time (Secs)
1
10
100
1000
Testing
FIGURE 2.
Comparison of Dual SC70-6 on EVB and 1”
Square FR4 PCB.
To aid comparison further, Figure 2 illustrates the dual-channel
SC-70 thermal performance on two different board sizes and
two different pad patterns. The results display the thermal
performance out to steady state. The measured steady state
values of R
θ
JA
for the dual 6-pin SC-70 are as follows:
The results show that if the board area can be increased and
maximum copper traces are added, the thermal resistance
reduction is limited to 20%.
This fact confirms that the power
dissipation is restricted with the package size and the Alloy 42
leadframe.
LITTLE FOOT SC-70 (6-PIN)
1) Minimum recommended pad pattern (see
Figure 2) on the EVB of 0.5 inches x
0.6 inches.
ASSOCIATED DOCUMENT
518
_
C/W
413
_
C/W
Single-Channel LITTLE FOOT SC-70 6-Pin MOSFET Copper
Leadframe Version, REcommended Pad Pattern and Thermal
2) Industry standard 1” square PCB with
maximum copper both sides.
Document Number:
71237
12-Dec-03
2
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Vishay
Disclaimer
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“Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained in any datasheet or in any other
disclosure relating to any product.
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the continuing production of any product.
To the maximum extent permitted by applicable law, Vishay disclaims (i) any and all
liability arising out of the application or use of any product, (ii) any and all liability, including without limitation special,
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typical requirements that are often placed on Vishay products in generic applications.
Such statements are not binding
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It is the customer’s responsibility to validate that a
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Parameters provided in datasheets and / or specifications may vary in different applications and performance may vary over
time. All
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Product specifications do not expand or otherwise modify Vishay’s terms and conditions of purchase,
including but not limited to the warranty expressed therein.
Except as expressly indicated in writing, Vishay products are not designed for use in medical, life-saving, or life-sustaining
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© 2017 VISHAY INTERTECHNOLOGY, INC. ALL RIGHTS RESERVED
Revision: 08-Feb-17
Document Number: 91000
1
