Vishay-Intertech-SI5458DU-T1-GE3

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Vishay-Intertech-SI5458DU-T1-GE3
Si5458DU  
Vishay Siliconix  
N-Channel 30 V (D-S) MOSFET  
FEATURES  
• TrenchFET

®

power MOSFET  
PowerPAK

®

ChipFET

®

S
in
g
le  
D
D
7
8
D
6
• 100 % R

g

tested  
S
5
• Material categorization:
 
for definitions of compliance please see  
1
D
2
D
S
9
3
D
4
G
1
APPLICATIONS  
D
Top View  
Marking code:
AP  
Bottom View  
(1, 2, 3, 6, 7, 8)  
• Load switch  
• HDD DC/DC  
PRODUCT SUMMARY  
V

DS

(V)  
R

DS(on)

max. (
) at V

GS

= 10 V  
R

DS(on)

max. (
) at V

GS

= 4.5 V  
Q

g

typ. (nC)  
30  
0.041  
0.051  
2.8  
G
(4)  
(5)  
I

D

(A)

d, e  

6
S
N-Channel MO
S
FET  
Configuration  
Single  
ORDERING INFORMATION  
Package  
PowerPAK ChipFET  
Si5458DU-T1-GE3  
Lead (Pb)-free and halogen-free  
ABSOLUTE MAXIMUM RATINGS
(T

A

= 25 °C, unless otherwise noted)  
PARAMETER  
SYMBOL  
LIMIT  
30  
UNIT  
Drain-source voltage  
Gate-source voltage  
V

DS  

V
V

GS  

20  
T

C

= 25 °C  
6

e  

T

C

= 70 °C  
T

A

= 25 °C  
T

A

= 70 °C  
6

e  

Continuous drain current (T

J

= 150 °C)  
I

D  

6

a, b, e  

6

a, b, e  

20  
A
Pulsed drain current  
I

DM  

I

S  

T

C

= 25 °C  
6
Continuous source-drain diode current  
T

A

= 25 °C  
2.9

a, b  

T

C

= 25 °C  

C

= 70 °C  
10.4  
T
6.7  
Maximum power dissipation  
P

D  

W
T

A

= 25 °C  
T

A

= 70 °C  
3.5

a, b  

2.2

a, b  

-55 to +150  
260  
Operating junction and storage temperature range  
Soldering recommendations (peak temperature)

f, g  

T

J

, T

stg  

°C  
THERMAL RESISTANCE RATINGS  
PARAMETER  
Maximum junction-to-ambient

a, c  

SYMBOL  
R

thJA  

TYPICAL  
MAXIMUM  
UNIT  
t
5 s  
Steady state  
30  
10  
36  
12  
°C/W  
Maximum junction-to-case (drain)  
R

thJC  

Notes  
a. Surface
 
mounted on 1″ x 1″ FR4 board  
b. t
 
= 5 s  
c. Maximum
 
under steady state conditions is 72 °C/W  
d. Based
 
on T

C

= 25 °C  
e. Package
 
limited  
f. See
 
solder profile (

). The PowerPAK ChipFET is a leadless package. The end of the lead terminal is exposed  
copper (not plated) as a result of the singulation process in manufacturing. A solder fillet at the exposed copper tip cannot be guaranteed  
and is not required to ensure adequate bottom side solder interconnection  
g. Rework
 
conditions: manual soldering with a soldering iron is not recommended for leadless components  
S09-1392-Rev. A, 20-Jul-09  
Document Number: 65019  
1
For technical questions, contact:

THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT  
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH
A
T

Si5458DU  
Vishay Siliconix  
SPECIFICATIONS
(T

J

= 25 °C, unless otherwise noted)  
PARAMETER  
SYMBOL  
TEST CONDITIONS  
MIN.  
TYP.  
MAX.  
UNIT  
Static  
V

GS

= 0 V, I

D

= 250 ꢀA  
I

D

= 250 ꢀA  
Drain-source breakdown voltage  
V

DS  

V

DS

/T

J  

V

GS(th)

/T

J  

V

GS(th)  

30  
–
–
–
V
V

DS

temperature coefficient  
32  
–
mV/°C  
V

GS(th)

temperature coefficient  
Gate-source threshold voltage  
Gate-source leakage  
–
-5  
–
V

DS

= V

GS

, I

D

= 250 ꢀA  
1.2  
–
–
3
100  
1
V
V

DS

= 0 V, V

GS  

=
20 V  
I

GSS  

–
nA  
V

DS

= 30 V, V

GS

= 0 V  
V

DS

= 30 V, V

GS

= 0 V, T

J

= 70 °C  
V

DS

5 V, V

GS

= 10 V  
–
–
–
Zero gate voltage drain current  
On-state drain current

a  

I

DSS  

I

D(on)  

R

DS(on)  

g

fs  

ꢀA  
A
–
10  
15  
–
–
–
V

GS

= 10 V, I

D

= 7.1 A  
0.034  
0.042  
15  
0.041  
0.051  
–
Drain-source on-state resistance

a  

S
V

GS

= 4.5 V, I

D

= 6.3 A  
–
Forward transconductance

a  

Dynamic

b  

–
V

DS

= 15 V, I

D

= 7.1 A  
Input capacitance  
C

iss  

C

oss  

C

rss  

–
–
325  
60  
30  
6
–
–
V

DS

= 15 V, V

GS

= 0 V, f = 1 MHz  
V

DS

= 15 V, V

GS

= 10 V, I

D

= 7.1 A  
V

DS

= 15 V, V

GS

= 4.5 V, I

D

= 7.1 A  
f = 1 MHz  
Output capacitance  
Reverse transfer capacitance  
pF  
–
–
–
9
Total gate charge  
Q

g  

–
2.8  
1.1  
0.8  
2.8  
12  
13  
16  
11  
4
4.2  
–
nC  
Gate-source charge  
Gate-drain charge  
Q

gs  

Q

gd  

R

g  

–
–
–
Gate resistance  
0.6  
–
5.6  
18  
20  
25  
17  
8
Turn-on delay time  
t

d(on)  

t

r  

t

d(off)  

t

f  

t

d(on)  

t

r  

t

d(off)  

t

f  

Rise time  
–
V

DD

= 15 V, R

L

= 2.7
, I

D

5.6 A,  
V

GEN

= 4.5 V, R

g

= 1
  
Turn-off delay time  
–
Fall time  
–
ns  
Turn-on delay time  
–
Rise time  
–
9
18  
20  
15  
V

DD

= 15 V, R

L

= 2.7
, I

D

5.6 A,  
V

GEN

= 10 V, R

g

= 1
  
Turn-off delay time  
–
11  
8
Fall time  
–
Drain-Source Body Diode Characteristics  
Continuous source-drain diode current  
Pulse diode forward current  
Body diode voltage  
T

C

= 25 °C  
I

S  

I

SM  

V

SD  

t

rr  

–
–
–
–
–
–
–
–
–
12  
20  
1.2  
20  
8
A
I

S

= 5.6 A, V

GS

= 0 V  
0.8  
11  
4
V
Body diode reverse recovery time  
Body diode reverse recovery charge  
Reverse recovery fall time  
Reverse recovery rise time  
ns  
nC  
Q

rr  

t

a  

I

F

= 5.6 A, di/dt = 100 A/ꢀs,  
T

J

= 25 °C  
6
–
ns  
t

b  

5
–
Notes  
a. Pulse
 
test; pulse width
300 μs, duty cycle
2 %  
b. Guaranteed
 
by design, not subject to production testing  
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation  
of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum  
rating conditions for extended periods may affect device reliability.  
S09-1392-Rev. A, 20-Jul-09  
Document Number: 65019  
2
For technical questions, contact:

THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT  
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH
A
T

Si5458DU  
Vishay Siliconix  
TYPICAL CHARACTERISTICS
(25 °C, unless otherwise noted)  
20  
5
4
3
2
1
0
V
GS  
= 10 V thru 4 V  
15  
10  
5
T
C
= 25 °C  
V
GS  
= 3 V  
T
C
= 125 °C  
2
T
= – 55 °C  
C
0
0.0  
0.5  
1.0  
1.5  
2.0  
2.5  
0
1
3
4
V
DS  
– Drain-to-Source Voltage (V)  
V
– Gate-to-Source Voltage (V)  
GS  
Output Characteristics  
Transfer Characteristics  
400  
300  
200  
100  
0
0.06  
0.05  
0.04  
0.03  
0.02  
C
iss  
V
= 4.5 V  
= 10 V  
GS  
V
GS  
C
oss  
C
rss  
0
5
10  
15  
20  
25  
30  
0
5
10  
15  
20  
I
– Drain Current (A)  
V
DS  
– Drain-to-Source Voltage (V)  
D
On-Resistance vs. Drain Current  
Capacitance  
10  
8
1.7  
1.5  
1.3  
1.1  
0.9  
0.7  
I
= 7.1 A  
D
V
GS  
= 10 V; I
 
= 7.1 A  
D
6
V
= 15 V  
DS  
V
DS  
= 24 V  
4
V
GS  
= 4.5 V; I
 
= 6.3 A  
D
2
0
0
1
2
3
4
5
6
– 50
 
– 25  
0
25  
50  
75  
100 125 150  
T
J
– Junction
T
e
mperature (°C)  
Q
–
T
o
tal Gate Charge (nC)  
g
Gate Charge  
On-Resistance vs. Junction Temperature  
S09-1392-Rev. A, 20-Jul-09  
Document Number: 65019  
3
For technical questions, contact:

THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT  
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH
A
T

Si5458DU  
Vishay Siliconix  
TYPICAL CHARACTERISTICS
(25 °C, unless otherwise noted)  
100  
0.10  
0.08  
0.06  
0.04  
0.02  
0.00  
10  
T
J
= 125 °C  
T
J
= 150 °C  
T
J
= 25 °C  
1
T
J
= 25 °C  
0.1  
0
2
4
6
8
10  
0.0  
0.3  
V
0.6  
0.9  
1.2  
1.5  
V
– Gate-to-Source Voltage (V)  
– Source-to-Drain Voltage (V)  
GS  
SD  
Source-Drain Diode Forward Voltage  
On-Resistance vs. Gate-to-Source Voltage  
2.3  
2.1  
1.9  
1.7  
1.5  
1.3  
1.1  
30  
25  
20  
15  
10  
5
I
= 250 µA  
D
0
– 50
 
– 25  
0
25  
50  
75  
100 125 150  
0.001  
0.01  
0.01  
Time (s)  
1
10  
100  
T
J
–
T
e
mperature (°C)  
Threshold Voltage  
Single Pulse Power  
100  
Limited by R  
*
DS(on)  
10  
1
100 µs  
1 ms  
10 ms  
100 ms  
1 s, 10 s  
0.1  
DC  
T
= 25 °C  
BVDSS Limited  
10  
A
Single Pulse  
0.01  
0.1  
1
100  
V
DS  
– Drain-to-Source Voltage (V)  
* V
 
> minimum V
 
at which R
 
is specified  
DS(on)  
GS  
GS  
Safe Operating Area, Junction-to-Ambient  
S09-1392-Rev. A, 20-Jul-09  
Document Number: 65019  
4
For technical questions, contact:

THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT  
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH
A
T

Si5458DU  
Vishay Siliconix  
TYPICAL CHARACTERISTICS
(25 °C, unless otherwise noted)  
15  
12  
9
Package Limited  
6
3
0
0
25  
50  
75  
100  
125  
150  
T
C
– Case
T
e
mperature (°C)  
Current Derating

a  

2.4  
15  
12  
9
1.8  
1.2  
0.6  
0.0  
6
3
0
0
25  
50  
75  
100  
125  
150  
0
25  
50  
75  
100  
125  
150  
T
C
– Case
T
e
mperature (°C)  
T
A
– Ambient
T
e
mperature (°C)  
Power, Junction-to-Case  
Power, Junction-to-Ambient  
Note  
a. The
 
power dissipation P

D

is based on T

J

max. = 150 °C, using junction-to-case thermal resistance, and is more useful in settling the upper  
dissipation limit for cases where additional heatsinking is used. It is used to determine the current rating, when this rating falls below the  
package limit  
S09-1392-Rev. A, 20-Jul-09  
Document Number: 65019  
5
For technical questions, contact:

THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT  
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH
A
T

Si5458DU  
Vishay Siliconix  
TYPICAL CHARACTERISTICS
(25 °C, unless otherwise noted)  
1
Duty Cycle = 0.5  
0.2  
Notes:  
0.1  
0.1  
P
DM  
0.05  
0.02  
t
1
t
2
t
t
1
2
1. Duty Cycle, D =  
2. Per Unit Base = R  
= 72 °C/W  
thJA  
Single Pulse  
(t)  
3. T
 
– T
 
= P  
JM  
Z
DM thJA  
A
4. Surface Mounted  
0.01  
-4  
-3  
-2  
-1  
10  
10  
10  
10  
1
10  
100  
1000  
10 000  
Square Wave Pulse Duration (s)  
Normalized Thermal Transient Impedance, Junction-to-Ambient  
1
Duty Cycle = 0.5  
0.2  
0.1  
0.05  
0.02  
Single Pulse  
0.1  
10  
-4  
-3  
-2  
-1  
10  
10  
10  
1
Square Wave Pulse Duration (s)  
Normalized Thermal Transient Impedance, Junction-to-Case  
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon  
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package / tape drawings, part marking, and  
reliability data, see

.  
S09-1392-Rev. A, 20-Jul-09  
Document Number: 65019  
6
For technical questions, contact:

THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT  
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH
A
T

Package Information  
Vishay Siliconix  
PowerPAK

®

ChipFET

®

Case Outline  
D
(8)  
(7)  
(6)  
(5)  
Pin #1  
indicator  
(1)  
(2)  
(3)  
(4)  
S
ide view of
s
ingle  
S
ide view of dual  
Z
e
b
D2  
D2  
D1  
K
Detail Z  
H
L
D(1) D(2)
 
D(3)  
G
(4)  
S
I(1)  
G
I(2)  
S
2(3)
G
2(4)  
K1  
E1  
E3  
D3  
D(8)  
D(7) D(6)  
S
(5)  
D1(8) D1(7)  
D2(6) D2(5)  
K3  
Back
s
ide view of
s
ingle pad  
Back
s
ide view of dual pad  
MILLIMETERS  
INCHES  
NOM.  
0.030  
–
DIM.  
MIN.  
0.70  
0
NOM.  
0.75  
–
MAX.  
0.85  
0.05  
0.35  
0.25  
3.08  
2.00  
1.32  
0.30  
1.98  
1.63  
1.17  
0.55  
MIN.  
0.028  
0
MAX.  
0.033  
0.002  
0.014  
0.010  
0.121  
0.079  
0.052  
0.012  
0.078  
0.064  
0.046  
0.022  
A
A1  
b
0.25  
0.15  
2.92  
1.75  
1.07  
0.20  
1.82  
1.38  
0.92  
0.45  
0.30  
0.20  
3.00  
1.87  
1.20  
0.25  
1.90  
1.50  
1.05  
0.50  
0.65 BSC  
0.20  
–
0.010  
0.006  
0.115  
0.069  
0.042  
0.008  
0.072  
0.054  
0.036  
0.018  
0.012  
0.008  
0.118  
0.074  
0.047  
0.010  
0.075  
0.059  
0.041  
0.020  
0.026 BSC  
0.008  
–
C
D
D1  
D2  
D3  
E
E1  
E2  
E3  
e
H
0.15  
0.25  
0.30  
0.20  
0.20  
0.30  
0.25  
0.006  
0.010  
0.012  
0.008  
0.008  
0.012  
0.010  
K
–
–
K1  
K2  
K3  
L
–
–
–
–
–
–
–
–
–
–
–
–
0.35  
0.40  
0.014  
0.016  
C14-0630-Rev. E, 21-Jul-14  
DWG: 5940  
Note  
Millimeters will govern  
•
Revision: 21-Jul-14  
Document Number: 73203  
1
For technical questions, contact:

THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT  
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH
A
T

Application Note 826  
Vishay Siliconix  
RECOMMENDED MINIMUM PADS FOR Power
P
A
K

®

ChipFET

®

Single  
0.225  
(0.009)  
0.350  
(0.014)  
0.650  
(0.026)  
0.200  
(0.00
8
)  
0.300  
(0.012)  
0.300  
(0.012)  
0.100  
(0.004)  
0.250  
(0.010)  
0.500  
(0.020)  
0.350  
(0.014)  
0.350  
(0.014)  
1.
8
70  
0.305  
(0.074)  
(0.012)  
2.575  
(0.101)  
Recommended Minim
u
m Pads  
Dimensions in mm/(Inches)  
Return to Index  
Document Number: 69948  
Revision: 21-Jan-08  
9

Legal Disclaimer Notice  
Vishay  
Disclaimer  
ALL PRODUCT, PRODUCT SPECIFICATIONS AND DATA ARE SUBJECT TO CHANGE WITHOUT NOTICE TO IMPROVE  
RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE.  
Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectively,  
“Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained in any datasheet or in any other  
disclosure relating to any product.  
Vishay makes no warranty, representation or guarantee regarding the suitability of the products for any particular purpose or  
the continuing production of any product.
 
To the maximum extent permitted by applicable law, Vishay disclaims (i) any and all  
liability arising out of the application or use of any product, (ii) any and all liability, including without limitation special,  
consequential or incidental damages, and (iii) any and all implied warranties, including warranties of fitness for particular  
purpose, non-infringement and merchantability.  
Statements regarding the suitability of products for certain types of applications are based on Vishay’s knowledge of  
typical requirements that are often placed on Vishay products in generic applications.
 
Such statements are not binding  
statements about the suitability of products for a particular application.
 
It is the customer’s responsibility to validate that a  
particular product with the properties described in the product specification is suitable for use in a particular application.  
Parameters provided in datasheets and / or specifications may vary in different applications and performance may vary over  
time. All
 
operating parameters, including typical parameters, must be validated for each customer application by the customer’s  
technical experts.
 
Product specifications do not expand or otherwise modify Vishay’s terms and conditions of purchase,  
including but not limited to the warranty expressed therein.  
Except as expressly indicated in writing, Vishay products are not designed for use in medical, life-saving, or life-sustaining  
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Customers using or selling Vishay products not expressly indicated for use in such applications do so at their own risk.  
Please contact authorized Vishay personnel to obtain written terms and conditions regarding products designed for  
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© 2021 VISHAY INTERTECHNOLOGY, INC. ALL RIGHTS RESERVED  
Revision: 01-Jan-2021  
Document Number: 91000  
1