Vishay-Intertech-SI7716ADN-T1-GE3
| Part # | Vishay-Intertech-SI7716ADN-T1-GE3 |
| Download | Vishay-Intertech-SI7716ADN-T1-GE3 |
New Product
Si7716ADN
Vishay Siliconix
N-Channel 30-V (D-S) MOSFET
FEATURES
PRODUCT SUMMARY
•
•
•
Halogen-free
V
DS
(V)
R
DS(on)
(
Ω
)
Q
g
(Typ.)
I
D
(A)
a, g
16
TrenchFET
®
Gen III Power MOSFET
100 % R
g
Tested
0.0135 at V
GS
= 10 V
0.0165 at V
GS
= 4.5 V
RoHS
30
7.3 nC
COMPLIANT
•
100 % UIS Tested
16
APPLICATIONS
®
PowerPAK 1212-8
•
DC/DC Conversion
– System Power
S
3.30 mm
3.30 mm
D
1
S
2
S
3
G
4
D
8
D
G
7
D
6
D
5
S
Bottom View
Ordering Information:
Si7716ADN-T1-GE3 (Lead (Pb)-free and Halogen-free)
N
-Channel MOSFET
ABSOLUTE MAXIMUM RATINGS
T =
25 °C, unless otherwise noted
A
Parameter
Drain-Source Voltage
Gate-Source Voltage
Symbol
V
DS
V
GS
Limit
30
Unit
V
20
16
a, g
16
g
T
C
= 25 °C
T
C
= 70 °C
T
A
= 25 °C
T
A
= 70 °C
Continuous Drain Current (T
J
= 150 °C)
I
D
12
b, c
9.5
b, c
32
g
A
I
DM
I
AS
E
AS
Pulsed Drain Current
Avalanche Current
Avalanche Energy
15
L = 0.1 mH
mJ
A
11.25
16
a, g
2.9
b, c
27.7
T
T
C
= 25 °C
A
= 25 °C
Continuous Source-Drain Diode Current
I
S
T
C
= 25 °C
C
= 70 °C
T
17.7
Maximum Power Dissipation
P
D
W
3.5
b, c
2.2
b, c
– 55 to 150
260
T
A
= 25 °C
T
A
= 70 °C
T
J
, T
stg
Operating Junction and Storage
T
e
mperature Range
Soldering Recommendations (Peak
T
e
mperature)
d, e
°C
THERMAL RESISTANCE RATINGS
Parameter
Maximum Junction-to-Ambient
b, f
Maximum Junction-to-Case (Drain)
Symbol
R
thJA
R
thJC
Typical
29
Maximum
Unit
t
≤
10 s
Steady State
36
°C/W
3.6
4.5
Notes:
a. Based
on T
C
= 25 °C.
b. Surface
Mounted on 1″ x 1″ FR4 board.
c. t
= 10 s.
d. See
Solder Profile (
http://www.vishay.com/ppg?73257
). The PowerPAK 1212 is a leadless package. The end of the lead terminal is exposed
copper (not plated) as a result of the singulation process in manufacturing. A solder fillet at the exposed copper tip cannot be guaranteed
and is not required to ensure adequate bottom side solder interconnection.
e. Rework
Conditions: manual soldering with a soldering iron is not recommended for leadless components.
f. Maximum
under Steady State conditions is 81 °C/W.
g. Package
limited.
Document Number: 68704
S-81450-Rev. A, 23-Jun-08
1
New Product
Si7716ADN
Vishay Siliconix
SPECIFICATIONS
T =
25 °C, unless otherwise noted
J
Parameter
Symbol
Test Conditions
Min.
Typ.
Max.
Unit
Static
V
DS
Δ
V
DS
/T
J
Δ
V
GS(th)
/T
J
V
GS(th)
V
GS
= 0
V
,
I
D
= 250 µA
I
D
= 250 µA
Drain-Source Breakdown Voltage
30
V
V
DS
T
e
mperature Coefficient
33
– 5
mV/°C
V
GS(th)
T
e
mperature Coefficient
V
DS
= V
GS
, I
D
= 250 µA
Gate-Source Threshold Voltage
Gate-Source Leakage
1.2
20
2.5
100
1
V
I
GSS
V
DS
= 0
V
,
V
GS
=
20 V
nA
V
DS
= 30
V
,
V
GS
= 0 V
DS
= 30
V
,
V
GS
= 0
V
,
T
J
= 55 °C
V
DS
≥
5
V
,
V
GS
= 10 V
V
GS
=
10
V
,
I
D
= 10 A
I
DSS
I
D(on)
R
DS(on)
g
fs
Zero Gate Voltage Drain Current
On-State Drain Current
a
µA
A
V
5
0.0105
0.0135
24
0.0135
0.0165
Drain-Source On-State Resistance
a
Ω
S
V
GS
=
4.5
V
,
I
D
= 7 A
Forward
T
r
ansconductance
a
V
DS
= 15
V
,
I
D
= 10 A
Dynamic
b
C
iss
C
oss
C
rss
Input Capacitance
Output Capacitance
Reverse
T
r
ansfer Capacitance
846
187
72
15.4
7.3
2.3
2.2
0.8
15
12
13
10
9
V
DS
= 15
V
,
V
GS
= 0
V
, f = 1
M
Hz
pF
V
DS
= 15
V
,
V
GS
= 10
V
,
I
D
= 10 A
23
11
Q
g
T
o
tal Gate Charge
nC
Q
gs
Q
gd
R
g
Gate-Source Charge
V
DS
= 15
V
,
V
GS
= 4.5
V
,
I
D
= 10 A
Gate-Drain Charge
Gate Resistance
f = 1 MHz
0.2
1.6
30
24
26
20
18
18
28
16
Ω
t
d(on)
t
r
t
d(off)
t
f
t
d(on)
t
r
t
d(off)
t
f
T
u
rn-On Delay Time
Rise Time
V
DD
= 15
V
,
R
L
= 1.5
Ω
I
D
≅
10 A, V
GEN
= 4.5
V
,
R
g
= 1
Ω
T
u
rn-Off Delay Time
Fall Time
ns
T
u
rn-On Delay Time
Rise Time
9
V
DD
= 15
V
,
R
L
= 1.5
Ω
I
D
≅
10 A, V
GEN
= 10
V
,
R
g
= 1
Ω
T
u
rn-Off Delay Time
14
8
Fall Time
Drain-Source Body Diode Characteristics
Continuous Source-Drain Diode Current
Pulse Diode Forward Current
Body Diode Voltage
I
S
I
SM
V
SD
t
rr
T
C
= 25 °C
16
32
1.2
34
19
A
I
S
= 3 A, V
GS
=
0 V
0.78
17
9.5
10
7
V
Body Diode Reverse Recovery Time
Body Diode Reverse Recovery Charge
Reverse Recovery Fall Time
Reverse Recovery Rise Time
ns
nC
Q
rr
t
a
I
F
= 10 A, dI/dt = 100 A/µs, T
J
= 25 °C
ns
t
b
Notes:
a. Pulse test; pulse width
≤
300 µs, duty cycle
≤
2 %.
b. Guaranteed by design, not subject to production testing.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation
of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect device reliability.
2
Document Number: 68704
S-81450-Rev. A, 23-Jun-08
New Product
Si7716ADN
Vishay Siliconix
TYPICAL CHARACTERISTICS
25 °C, unless otherwise noted
50
8
6
4
2
0
V
GS
= 10 thr
u
5
V
V
= 4
V
GS
40
30
20
10
0
T
C
= 25 °C
V
= 3
V
GS
T
C
= 125 °C
T
C
= – 55 °C
0.0
0.5
1.0
1.5
2.0
2.5
0
1
2
3
4
5
V
DS
– Drain-to-So
u
rce
V
oltage (
V
)
V
GS
– Gate-to-So
u
rce
V
oltage (
V
)
Output Characteristics
Transfer Characteristics
0.025
0.020
0.015
0.010
0.005
1100
88
0
660
440
220
0
C
iss
V
GS
= 4.5
V
V
GS
= 10
V
C
oss
C
rss
0
10
20
30
40
50
0
5
10
15
20
25
30
I
– Drain C
u
rrent (A)
V
DS
– Drain-to-So
u
rce
V
oltage (
V
)
D
On-Resistance vs. Drain Current and Gate Voltage
Capacitance
1.
8
1.6
1.4
1.2
1.0
0.
8
0.6
10
I
= 10 A
D
I
= 10 A
D
8
V
GS
= 10
V
V
DS
= 10
V
V
= 15
V
DS
6
V
DS
= 20
V
V
GS
= 4.5
V
4
2
0
– 50
– 25
0
25
50
75
100 125 150
0.0
3.2
6.4
9.6
12.
8
16.0
T
J
– J
u
nction
T
e
mperat
u
re (°C)
Q
g
–
T
o
tal Gate Charge (nC)
On-Resistance vs. Junction Temperature
Gate Charge
Document Number: 68704
S-81450-Rev. A, 23-Jun-08
3
New Product
Si7716ADN
Vishay Siliconix
TYPICAL CHARACTERISTICS
25 °C, unless otherwise noted
100
0.06
0.05
0.04
0.03
0.02
0.01
0.00
I
= 10 A
D
T
J
= 150 °C
10
1
T
J
= 25 °C
0.1
0.01
T
= 125 °C
= 25 °C
J
T
J
0.001
0.0
0.2
0.4
0.6
0.
8
1.0
1.2
0
1
2
3
4
5
6
7
8
9
10
V
SD
– So
u
rce-to-Drain
V
oltage (
V
)
V
GS
– Gate-to-So
u
rce
V
oltage (
V
)
Source-Drain Diode Forward Voltage
On-Resistance vs. Gate-to-Source Voltage
120
96
72
4
8
24
0
0.4
0.2
0.0
– 0.2
– 0.4
– 0.6
– 0.
8
I
= 5 mA
D
I
= 250
µ
A
D
– 50
– 25
0
25
50
75
100 125 150
0.001
0.01
0.1
1
10
Time (s)
T
J
–
T
e
mperat
u
re (°C)
Single Pulse Power (Junction-to-Ambient)
Threshold Voltage
100
Limited
b
y R
*
DS(on)
10
1
1 ms
10 ms
100 ms
1 s
10 s
0.1
DC
B
V
DSS
Limited
T
= 25 °C
A
Single P
u
lse
0.01
0.01
0.1
1
10
100
V
DS
– Drain-to-So
u
rce
V
oltage (
V
)
*
V
> minim
u
m
V
at
w
hich R
is specified
DS(on)
GS
GS
Safe Operating Area, Junction-to-Ambient
4
Document Number: 68704
S-81450-Rev. A, 23-Jun-08
New Product
Si7716ADN
Vishay Siliconix
TYPICAL CHARACTERISTICS
25 °C, unless otherwise noted
40
32
24
Package Limited
16
8
0
0
25
50
75
100
125
150
T
C
– Case
T
e
mperat
u
re (°C)
Current Derating*
2.0
35
2
8
21
14
7
1.6
1.2
0.
8
0.4
0.0
0
0
25
50
75
100
125
150
0
25
50
75
100
125
150
T
A
– Case
T
e
mperat
u
re (°C)
T
C
– Case
T
e
mperat
u
re (°C)
Power, Junction-to-Ambient
Power, Junction-to-Case
* The power dissipation P
D
is based on T
J(max)
= 150 °C, using junction-to-case thermal resistance, and is more useful in settling the upper
dissipation limit for cases where additional heatsinking is used. It is used to determine the current rating, when this rating falls below the package
limit.
Document Number: 68704
S-81450-Rev. A, 23-Jun-08
5
New Product
Si7716ADN
Vishay Siliconix
TYPICAL CHARACTERISTICS
25 °C, unless otherwise noted
1
D
u
ty Cycle = 0.5
0.2
0.1
0.1
N
otes:
P
DM
0.05
t
1
t
2
t
t
1
2
0.02
1. D
u
ty Cycle, D =
2. Per Unit Base = R
=
8
1 °C/
W
thJA
(t)
3. T
– T
= P
Z
JM
A
DM thJA
Single P
u
lse
4. S
u
rface Mo
u
nted
0.01
-4
-3
-2
-1
10
10
10
10
S
qu
are
W
a
v
e P
u
lse D
u
ration (s)
Normalized Thermal Transient Impedance, Junction-to-Ambient
1
100
1000
10
1
D
u
ty Cycle = 0.5
0.2
0.1
0.05
0.1
0.02
Single P
u
lse
0.01
-4
-3
-2
-1
10
10
10
10
1
10
S
qu
are
W
a
v
e P
u
lse D
u
ration (s)
Normalized Thermal Transient Impedance, Junction-to-Case
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and
6
Document Number: 68704
S-81450-Rev. A, 23-Jun-08
Legal Disclaimer Notice
Vishay
Disclaimer
All product specifications and data are subject to change without notice.
Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf
(collectively, “Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained herein
or in any other disclosure relating to any product.
Vishay disclaims any and all liability arising out of the use or application of any product described herein or of any
information provided herein to the maximum extent permitted by law. The product specifications do not expand or
otherwise modify Vishay’s terms and conditions of purchase, including but not limited to the warranty expressed
therein, which apply to these products.
No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this
document or by any conduct of Vishay.
The products shown herein are not designed for use in medical, life-saving, or life-sustaining applications unless
otherwise expressly indicated. Customers using or selling Vishay products not expressly indicated for use in such
applications do so entirely at their own risk and agree to fully indemnify Vishay for any damages arising or resulting
from such use or sale. Please contact authorized Vishay personnel to obtain written terms and conditions regarding
products designed for such applications.
Product names and markings noted herein may be trademarks of their respective owners.
Document Number: 91000
Revision: 18-Jul-08
1
