Vishay-Intertech-SIHD7N60E-GE3
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SiHD7N60E
Vishay Siliconix
E Series Power MOSFET
FEATURES
• Low figure-of-merit (FOM) R
on
x Q
g
• Low input capacitance (C
iss
• Reduced switching and conduction losses
• Ultra low gate charge (Q
g
)
• Avalanche energy rated (UIS)
• Material
categorization: for definitions of
PRODUCT SUMMARY
V
DS
(V) at T
J
max.
DS(on)
max. at 25 °C (
Ω
)
Q
g
max. (nC)
650
)
R
V
GS
= 10 V
0.6
40
5
Q
gs
(nC)
gd
(nC)
Q
9
Configuration
Single
APPLICATIONS
D
• Server and telecom power supplies
• Switch mode power supplies (SMPS)
• Power factor correction power supplies (PFC)
• Lighting
DPAK
(TO-252)
D
– High-intensity discharge (HID)
– Fluorescent ballast lighting
• Industrial
G
S
G
– Welding
– Induction heating
S
N-Channel MOSFET
– Motor drives
– Battery chargers
– Renewable energy
– Solar (PV inverters)
ORDERING INFORMATION
Package
DPAK (TO-252)
SiHD7N60E-GE3
SiHD7N60ET1-GE3
SiHD7N60ET5-GE3
SiHD7N60ET4-GE3
Lead (Pb)-free and Halogen-free
ABSOLUTE MAXIMUM RATINGS
(T
C
= 25 °C, unless otherwise noted)
PARAMETER
SYMBOL
LIMIT
UNIT
600
Drain-Source Voltage
V
DS
T
C
= -25 °C, I
D
= 250 μA
575
V
Gate-Source Voltage
V
GS
30
T
C
= 25 °C
7
Continuous Drain Current (T
J
= 150 °C)
V
GS
at 10 V
I
D
T
C
= 100 °C
5
A
Pulsed Drain Current
a
I
DM
18
0.63
Linear Derating Factor
W/°C
mJ
W
Single Pulse Avalanche Energy
b
E
AS
P
D
43
Maximum Power Dissipation
78
Operating Junction and Storage Temperature Range
Drain-Source Voltage Slope
Reverse Diode dV/dt
d
T
J
, T
stg
-55 to +150
°C
T
J
= 125 °C
for 10 s
dV/dt
V/ns
°C
3
Soldering Recommendations (Peak Temperature)
c
300
Notes
a. Repetitive
rating; pulse width limited by maximum junction temperature.
b. V
DD
= 50 V, starting T
J
= 25 °C, L = 13.8 mH, R
g
= 25
Ω
, I
AS
= 2.5 A.
c. 1.6
mm from case.
d. I
SD
≤
I
D
, dI/dt = 100 A/μs, starting T
J
= 25 °C.
S15-0291-Rev. D, 23-Feb-15
Document Number: 91510
1
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
SiHD7N60E
Vishay Siliconix
THERMAL RESISTANCE RATINGS
PARAMETER
SYMBOL
TYP.
MAX.
UNIT
Maximum Junction-to-Ambient
R
thJA
R
thJC
–
–
62
°C/W
Maximum Junction-to-Case (Drain)
1.6
SPECIFICATIONS
(T
J
= 25 °C, unless otherwise noted)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN.
TYP.
MAX. UNIT
Static
Drain-Source Breakdown Voltage
V
DS
Temperature Coefficient
Gate-Source Threshold Voltage (N)
V
DS
V
GS
= 0 V, I
D
= 250 μA
Reference to 25 °C, I
D
= 1 mA
V
DS
= V
GS
, I
D
= 250 μA
609
–
–
–
V
V/°C
V
Δ
V
DS
/T
J
V
GS(th)
–
2
–
–
–
–
–
–
0.68
–
–
4
V
GS
V
GS
=
=
20 V
30 V
100
1
nA
μA
Gate-Source Leakage
I
GSS
–
V
DS
= 600 V, V
GS
= 0 V
DS
= 480 V, V
GS
= 0 V, T
J
= 125 °C
V
GS
= 10 V
I
D
= 3.5 A
–
1
Zero Gate Voltage Drain Current
I
DSS
μA
V
–
10
0.6
–
Drain-Source On-State Resistance
Forward Transconductance
R
DS(on)
g
fs
0.5
1.9
Ω
V
DS
= 50 V, I
D
= 3.5 A
S
Dynamic
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
C
iss
C
oss
C
rss
–
–
–
680
39
5
–
–
–
V
GS
= 0 V,
V
DS
= 100 V,
f = 1 MHz
pF
nC
Effective Output Capacitance, Energy
Related
a
C
o(er)
C
o(tr)
–
–
34
–
–
V
DS
= 0 V to 480 V, V
GS
= 0 V
Effective Output Capacitance, Time
Related
b
100
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
Turn-On Delay Time
Rise Time
Q
g
Q
gs
Q
gd
t
d(on)
t
r
–
–
–
–
–
–
–
–
20
5
40
–
V
GS
= 10 V
I
D
= 3.5 A, V
DS
= 480 V
9
–
13
13
24
14
1.1
26
26
48
28
–
V
DD
= 480 V, I
D
= 3.5 A,
GS
= 10 V, R
g
= 9.1
Ω
ns
V
Turn-Off Delay Time
Fall Time
t
d(off)
t
f
Gate Input Resistance
R
g
f = 1 MHz, open drain
Ω
Drain-Source Body Diode Characteristics
MOSFET symbol
showing the
integral reverse
p – n junction diode
D
Continuous Source-Drain Diode Current
I
S
–
–
–
–
7
A
G
Pulsed Diode Forward Current
I
SM
18
S
Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
Reverse Recovery Current
V
SD
t
rr
T
J
= 25 °C, I
S
= 3.5 A, V
GS
= 0 V
–
–
–
–
–
1.2
V
ns
μC
A
230
1.9
14
–
–
–
T
J
= 25 °C, I
F
= I
S = 3.5 A
,
Q
rr
dI/dt = 100 A/μs
, V
R
= 20 V
I
RRM
Notes
a. C
oss(er)
is a fixed capacitance that gives the same energy as C
oss
while V
DS
is rising from 0 % to 80 % V
DSS
b. C
oss(tr)
is a fixed capacitance that gives the same charging time as C
oss
while V
DS
is rising from 0 % to 80 % V
DSS
.
.
S15-0291-Rev. D, 23-Feb-15
Document Number: 91510
2
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
SiHD7N60E
Vishay Siliconix
TYPICAL CHARACTERISTICS
(25 °C, unless otherwise noted)
3
2.5
2
20
TOP
15 V
14 V
13 V
12 V
11 V
10 V
9 V
T
J
= 25 °C
I
D
= 3.5 A
16
12
8
8 V
7 V
6 V
BOTTOM 5
V
1.5
1
V
GS
= 10 V
4
0.5
0
0
– 60 – 40 – 20
0
20 40 60 80
100 120 140 160
0
5
10
15
20
25
30
T
J
, Junction
T
e
mperature (°C)
V
DS
, Drain-to-Source Voltage (V)
Fig. 1 – Typical Output Characteristics
Fig. 4 – Normalized On-Resistance vs. Temperature
12
10 000
TOP
15 V
14 V
13 V
12 V
11 V
10 V
9 V
T
J
= 150 °C
C
i
ss
9
6
3
1000
100
10
8 V
7 V
V
GS
= 0
V
, f = 1
M
Hz
C
i
ss
= C
g
s
+ C
gd
, C
d
s
S
horted
C
r
ss
= C
gd
6 V
BOTTOM 5
V
C
o
ss
C
o
ss
= C
d
s
+ C
gd
C
r
ss
1
0
0
5
10
15
20
25
30
0
100
200
300
400
500
600
V
DS
, Drain-to-Source Voltage (V)
V
D
S
, Drain-to-
S
ource Voltage (V)
Fig. 2 – Typical Output Characteristics
Fig. 5 – Typical Capacitance vs. Drain-to-Source Voltage
6
5
20
16
12
8
T
J
= 25 °C
500
4
C
o
ss
3
E
o
ss
T
J
= 150 °C
50
2
4
1
0
5
0
0
5
10
15
20
25
0
100
200
300
V
D
S
400
500
600
V
GS
, Gate-to-Source Voltage (V)
Fig. 3 – Typical Transfer Characteristics
S15-0291-Rev. D, 23-Feb-15
Fig. 6 – C
oss
and E
oss
vs. V
DS
Document Number: 91510
3
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
SiHD7N60E
Vishay Siliconix
8
6
4
2
0
24
20
16
12
8
V
D
S
= 480 V
V
D
S
= 300 V
V
D
S
= 120 V
4
0
25
50
75
100
125
150
0
10
20
30
40
Q
g
,
T
o
tal
G
ate Charge (nC)
T
C
, Case
T
e
mperature (°C)
Fig. 10 – Maximum Drain Current vs. Case Temperature
Fig. 7 – Typical Gate Charge vs. Gate-to-Source Voltage
750
725
700
675
650
625
600
575
550
525
100
T
J
= 150 °C
T
J
= 25 °C
10
1
V
GS
= 0 V
0.1
– 60 – 40 – 20
0
20 40 60 80
100 120 140 160
0.2
0.4
0.6
0.8
1
1.2
1.4
1.6
T
J
, Junction
T
e
mperature (°C)
V
S
D
,
S
ource-Drain Voltage (V)
Fig. 11 – Temperature vs. Drain-to-Source Voltage
Fig. 8 – Typical Source-Drain Diode Forward Voltage
100
Operation in thi
s
Area
I
DM
= Limited
Limited by R
D
S
(on)
10
100 μ
s
Limited by R
*
D (on)
1
0.1
1 m
s
10 m
s
T
T
= 25 °C
= 150 °C
C
J
S
ingle Pul
s
e
BVD
SS
Limited
0.01
1
10
100
1000
V
D
S
, Drain-to-
S
ource Voltage (V)
* V
GS
> minimum V
GS
at which R
D
S
(on)
i
s s
pecified
Fig. 9 – Maximum Safe Operating Area
S15-0291-Rev. D, 23-Feb-15
Document Number: 91510
4
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
SiHD7N60E
Vishay Siliconix
1
Duty Cycle = 0.5
0.2
0.1
0.1
0.05
0.02
S
ingle Pul
s
e
0.01
0.0001
0.001
0.01
0.1
1
Pul
s
e Time (
s
)
Fig. 12 – Normalized Thermal Transient Impedance, Junction-to-Case
R
D
V
D
S
V
D
S
t
p
V
GS
V
DD
D.U.T.
R
G
+
V
–
DD
V
D
S
10 V
Pul
s
e width ≤ 1 μ
s
Duty factor ≤ 0.1 %
I
A
S
Fig. 13 – Switching Time Test Circuit
Fig. 16 – Unclamped Inductive Waveforms
V
D
S
Q
G
10 V
90 %
Q
GS
Q
G
D
10 %
V
GS
V
G
t
d(on)
t
r
t
d(off)
t
f
Charge
Fig. 14 – Switching Time Waveforms
Fig. 17 –
Basic Gate Charge Waveform
Current regulator
S
ame type a
s
D.U.T.
L
V
D
S
Vary t
p
to obtain
re
q
uired I
A
S
50 k
Ω
12 V
0.2 μF
D.U.T.
I
A
S
R
G
0.3 μF
+
–
V
DD
+
–
V
D
S
D.U.T.
10 V
V
GS
0.01
Ω
t
p
3 mA
Fig. 15 – Unclamped Inductive Test Circuit
I
G
I
D
Current
s
ampling re
s
i
s
tor
s
Fig. 18 – Gate Charge Test Circuit
Document Number: 91510
S15-0291-Rev. D, 23-Feb-15
5
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
SiHD7N60E
Vishay Siliconix
Peak Dio
d
e Recovery
d
V/
d
t Test Circuit
+
Circuit layout con
s
ideration
s
•
Low
s
tray inductance
•
G
round plane
D.U.T.
•
Low leakage inductance
current tran
s
former
–
+
–
–
+
R
g
•
dV/dt controlled by R
g
•
Driver
s
ame type a
s
D.U.T.
•
I
S
D
controlled by duty factor “D”
•
D.U.T. – device under te
s
t
+
–
V
DD
Driver gate drive
P.W.
P.W.
D =
Period
Period
V
GS
= 10 V
a
D.U.T. l
S
D
waveform
D.U.T. V
D
S
waveform
Rever
s
e
recovery
current
Body diode forward
current
dI/dt
Diode recovery
dV/dt
V
DD
Re-applied
voltage
Body diode forward drop
Inductor current
I
S
D
Ripple
≤
5 %
Note
a.
V
GS
= 5 V for logic level device
s
Fig. 19 – For N-Channel
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and
S15-0291-Rev. D, 23-Feb-15
Document Number: 91510
6
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
Package Information
Vishay Siliconix
TO-252AA Case Outline
VERSION 1: FACILITY CODE = Y
E
A
C2
b3
E1
b
C
b2
e
A1
e1
MILLIMETERS
DIM.
A
MIN.
2.18
–
MAX.
2.38
0.127
0.88
1.14
5.46
0.61
0.89
6.22
–
A1
b
0.64
0.76
4.95
0.46
0.46
5.97
4.10
6.35
4.32
9.40
b2
b3
C
C2
D
D1
E
6.73
–
E1
H
10.41
e
2.28 BSC
4.56 BSC
e1
L
1.40
0.89
–
1.78
1.27
1.02
1.52
L3
L4
L5
1.01
Note
Dimension L3 is for reference only
•
Revision: 16-Dec-2019
Document Number: 71197
1
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
Package Information
Vishay Siliconix
VERSION 2: FACILITY CODE = N
e
E
A
b3
E1
c2
E1/2
e
2x b2
2x e
3x b
DETAIL “B”
(b)
0.25
C A B
C
H
b1
SEATING
PLANE
GAUGE
PLANE
DETAIL “B”
C
L
C
(L1)
MILLIMETERS
MILLIMETERS
DIM.
L
MIN.
MAX.
DIM.
A
MIN.
2.18
–
MAX.
2.39
0.13
0.89
0.79
1.13
5.46
0.61
0.56
0.60
6.22
–
1.50
1.78
L1
L2
L3
L4
L5
L6
2.74 ref.
A1
b
0.51 BSC
0.65
0.64
0.76
4.95
0.46
0.41
0.46
5.97
5.21
6.35
4.32
0.89
–
1.27
1.02
1.49
0.85
10°
b1
b2
b3
c
1.14
0.65
0°
c1
c2
D
1
2
0°
15°
25°
35°
Notes
D1
E
•
•
•
•
Dimensioning and tolerance confirm to ASME Y14.5M-1994
All dimensions are in millimeters. Angles are in degrees
Heat sink side flash is max. 0.8 mm
6.73
–
E1
e
2.29 BSC
Radius on terminal is optional
H
9.94
10.34
ECN: E19-0649-Rev. Q, 16-Dec-2019
DWG: 5347
Revision: 16-Dec-2019
Document Number: 71197
2
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
Package Information
Vishay Siliconix
TO-252AA (HIGH VOLTAGE)
E
b
3
E1
L3
D1
D
H
L4
b
2
b
A
c2
e
A1
L
L1
c
θ
L2
MILLIMETERS
INCHES
DIM.
E
MIN.
MAX.
6.73
1.77
MIN.
0.252
0.055
MAX.
0.265
0.070
6.40
1.40
L
L1
L2
L3
L4
D
2.743 REF
0.508 BSC
0.108 REF
0.020 BSC
0.89
0.64
6.00
9.40
0.64
0.77
5.21
1.27
1.01
6.22
10.40
0.88
1.14
5.46
0.035
0.025
0.236
0.370
0.025
0.030
0.205
0.050
0.040
0.245
0.409
0.035
0.045
0.215
H
b
b2
b3
e
2.286 BSC
0.090 BSC
A
2.20
0.00
0.45
0.45
5.30
4.40
0′
2.38
0.13
0.60
0.58
–
0.087
0.000
0.018
0.018
0.209
0.173
0′
0.094
0.005
0.024
0.023
–
A1
c
c2
D1
E1
θ
–
–
10′
10′
ECN: S-81965-Rev. A, 15-Sep-08
DWG: 5973
Notes
1. Package body sizes exclude mold flash, protrusion or gate burrs. Mold flash, protrusion or gate burrs shall not exceed 0.10 mm per side.
2. Package body sizes determined at the outermost extremes of the plastic body exclusive of mold flash, gate burrs and interlead flash, but
including any mismatch between the top and bottom of the plastic body.
3. The package top may be smaller than the package bottom.
4. Dimension “b” does not include dambar protrusion. Allowable dambar protrusion shall be 0.10 mm total in excess of “b” dimension at maximum
material condition. The dambar cannot be located on the lower radius of the foot.
Document Number: 91344
Revision: 15-Sep-08
1
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Vishay
Disclaimer
ALL PRODUCT, PRODUCT SPECIFICATIONS AND DATA ARE SUBJECT TO CHANGE WITHOUT NOTICE TO IMPROVE
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“Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained in any datasheet or in any other
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with the properties described in the product specification is suitable for use in a particular application. Parameters provided in
datasheets and / or specifications may vary in different applications and performance may vary over time. All operating
parameters, including typical parameters, must be validated for each customer application by the customer’s technical experts.
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Revision: 09-Jul-2021
Document Number: 91000
1
