Vishay-Intertech-SIHFPS38N60L-GE3
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SiHFPS38N60L
Vishay Siliconix
Power MOSFET
FEATURES
D
• Superfast
body diode eliminates the need for
external diodes in ZVS applications
Super-247
• Lower gate charge results in simple drive
requirements
G
• Enhanced dV/dt capabilities offer improved
ruggedness
S
D
• Higher
gate voltage threshold offers improved noise
immunity
G
S
N-Channel MOSFET
• Material
categorization: for definitions of compliance
PRODUCT SUMMARY
APPLICATIONS
V
DS
(V)
600
• Zero voltage switching SMPS
• Telecom and server power supplies
• Uniterruptible power supplies
• Motor control applications
R
DS(on)
(
Ω
)
V
GS
= 10 V
0.12
Q
g
(Max.) (nC)
320
85
Q
gs
(nC)
gd
(nC)
Q
160
Configuration
Single
ORDERING INFORMATION
Package
Super-247
Lead (Pb)-free and halogen-free
SiHFPS38N60L-GE3
ABSOLUTE MAXIMUM RATINGS
(T
C
= 25 °C, unless otherwise noted)
PARAMETER
SYMBOL
LIMIT
UNIT
Drain-source voltage
Gate-source voltage
600
V
DS
V
30
V
GS
38
T
C
= 25 °C
Continuous drain current
V
GS
at 10 V
I
D
24
A
T
C
= 100 °C
Pulsed drain current
a
I
DM
150
Linear derating factor
4.3
W/°C
mJ
A
Single pulse avalanche energy
b
Repetitive avalanche current
a
Repetitive avalanche energy
a
E
AS
I
AR
680
38
54
mJ
W
E
AR
Maximum power dissipation
540
T
C
= 25 °C
P
D
Peak diode recovery dV/dt
c
dV/dt
T
J
, T
stg
19
– 55 to + 150
300
d
V/ns
Operating junction and storage temperature range
Soldering recommendations (peak temperature)
°C
for 10 s
10
lbf · in
N · m
Mounting torque
6-32 or M3 screw
1.1
Notes
a. Repetitive
rating; pulse width limited by maximum junction temperature (see fig. 12)
b. Starting
T
J
= 25 °C, L = 0.91 mH, R
g
= 25
Ω
, I
AS
= 38 A, dV/dt = 13 V/ns (see fig. 14a)
c. I
SD
≤
38 A, dI/dt
≤
630 A/μs, V
DD
≤
V
DS
, T
J
≤
150 °C
d. 1.6
mm from case
S21-0019-Rev. C, 18-Jan-2021
Document Number: 91259
1
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
SiHFPS38N60L
Vishay Siliconix
THERMAL RESISTANCE RATINGS
PARAMETER
SYMBOL
TYP.
MAX.
40
UNIT
Maximum junction-to-ambient
Case-to-sink, flat, greased surface
Maximum junction-to-case (drain)
–
0.24
–
R
thJA
R
thCS
R
thJC
–
°C/W
0.22
SPECIFICATIONS
(T
J
= 25 °C, unless otherwise noted)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN.
TYP.
MAX. UNIT
Static
Drain-source breakdown voltage
V
DS
Δ
V
DS
/T
J
V
GS(th)
I
GSS
V
GS
= 0 V, I
D
= 250 μA
Reference to 25 °C, I
D
= 1 mA
V
DS
= V
GS
, I
D
= 250 μA
600
–
–
V
mV/°C
V
V
DS
temperature coefficient
–
3.0
–
410
–
Gate-source threshold voltage
Gate-source leakage
–
–
–
5.0
100
50
V
GS
V
DS
= 600 V, V
GS
= 0 V
V
DS
= 480 V, V
GS
= 0 V, T
J
= 125 °C
V
GS
= 10 V
I
D
= 23 A
b
V
DS
= 50 V, I
D
= 23 A
b
=
30 V
nA
–
μA
Zero gate voltage drain current
I
DSS
–
–
–
0.12
–
2.0
0.15
–
mA
Ω
Drain-source on-state resistance
Forward transconductance
Dynamic
R
DS(on)
g
fs
20
S
Input capacitance
C
iss
C
oss
C
rss
–
–
–
–
7990
740
72
–
–
–
–
V
GS
= 0 V,
DS
= 25 V,
f = 1.0 MHz, see fig. 5
Output capacitance
V
Reverse transfer capacitance
Effective output capacitance
pF
C
oss
eff.
350
V
GS
= 0 V
Effective output capacitance
(energy related)
V
DS
= 0 V to 480 V
c
C
oss
eff. (ER)
–
260
–
Total gate charge
Gate-source charge
Gate-drain charge
Q
g
Q
gs
Q
gd
–
–
–
–
–
–
320
85
I
D
= 38 A, V
DS
= 480 V
see fig. 7 and 15
b
V
GS
= 10 V
nC
Ω
160
Gate resistance
R
G
t
d(on)
t
r
f = 1 MHz, open drain
–
–
–
–
–
1.2
44
–
–
–
–
–
Turn-on delay time
Rise time
V
R
DD
= 300 V, I
D
= 38 A,
G
= 4.3
Ω
, V
GS
= 10 V,
see fig. 11a and 11b
b
130
92
ns
Turn-off delay time
Fall time
t
d(off)
t
f
69
Drain-source body diode characteristics
MOSFET symbol
showing the
integral reverse
D
Continuous source-drain diode current
I
S
–
–
–
–
38
A
G
Pulsed diode forward current
a
Body diode voltage
I
SM
V
SD
t
rr
150
p – n junction diode
S
T
J
= 25 °C, I
S
= 38 A, V
GS
= 0 V
b
T
J
= 25 °C, I
F
= 38 A
T
J
= 125 °C, dI/dt = 100 A/μs
b
T
J
= 25 °C, I
F
= 38 A, V
GS
= 0 V
b
T
J
= 125 °C, dI/dt = 100 A/μs
b
T
J
= 25 °C
–
–
–
–
–
–
–
1.5
250
630
1240
3900
14
V
170
420
830
2600
9.1
Body diode reverse recovery time
ns
Body diode reverse recovery charge
Q
rr
nC
A
Reverse recovery time
Forward turn-On time
I
RRM
t
on
Intrinsic turn-on time is negligible (turn-on is dominated by L
S
and L
D
)
Notes
a. Repetitive
rating; pulse width limited by maximum junction temperature (see fig. 12)
b. Pulse
width
≤
300 μs; duty cycle
≤
2 %
c. C
oss
eff. is a fixed capacitance that gives the same charging time as C
oss
while V
DS
is rising form 0 % to 80 % V
DS
C
oss
eff. (ER) is a fixed capacitance that stores the same energy as C
oss
while V
DS
is rising from 0 % to 80 % V
DS
S21-0019-Rev. C, 18-Jan-2021
Document Number: 91259
2
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
SiHFPS38N60L
Vishay Siliconix
TYPICAL CHARACTERISTICS
(25 °C, unless otherwise noted)
1000
3.0
2.5
2.0
1.5
1.0
0.5
0.0
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
4.5V
I
= 38A
D
TOP
V
= 10V
GS
100
10
BOTTOM
1
0.1
4.5V
0.01
0.001
20µs PULSE WIDTH
Tj = 25°C
0.1
1
10
100
-60 -40 -20
0
20 40 60 80
100 120 140 160
V
, Drain-to-Source Voltage (V)
T
J
, Junction Temperature (°C)
DS
Fig. 1 – Typical Output Characteristics
Fig. 4 – Normalized On-Resistance vs. Temperature
100000
10000
1000
100
1000
100
10
V
= 0V,
f = 1 MHZ
GS
iss
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
4.5V
C
C
C
= C
+ C
,
C
SHORTED
TOP
gs
gd
ds
= C
rss
gd
= C
+ C
ds gd
oss
Ciss
BOTTOM
Coss
Crss
4.5V
1
20µs PULSE WIDTH
Tj = 150°C
0.1
10
0.1
1
10
100
1
10
100
1000
V
, Drain-to-Source Voltage (V)
V
, Drain-to-Source Voltage (V)
DS
DS
Fig. 2 – Typical Output Characteristics
Fig. 5 – Typical Capacitance vs. Drain-to-Source Voltage
50
45
40
35
30
25
20
15
10
5
1000
100
10
T
= 150°C
J
1
T
= 25°C
J
0.1
0.01
0
0
100 200 300 400 500 600 700
Drain-to-Source Voltage (V)
4
6
8
10
12
14
16
V
, Gate-to-Source Voltage (V)
V
GS
DS,
Fig. 3 – Typical Transfer Characteristics
Fig. 1 – Typical Output Capacitance Stored Energy vs. V
DS
S21-0019-Rev. C, 18-Jan-2021
Document Number: 91259
3
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
SiHFPS38N60L
Vishay Siliconix
40
35
30
25
20
15
10
5
12.0
10.0
8.0
I
= 38A
D
V
V
V
= 480V
= 300V
= 120V
DS
DS
DS
6.0
4.0
2.0
0
0.0
25
50
T
75
100
125
150
0
50
Q
100
150
200
250
, Case Temperature (°C)
C
Total Gate Charge (nC)
G
Fig. 2 – Typical Gate Charge vs. Gate-to-Source Voltage
Fig. 10 – Maximum Drain Current vs. Case Temperature
R
D
1000.00
V
DS
V
GS
D.U.T.
100.00
R
G
+
V
–
DD
T
= 150°C
J
10 V
10.00
1.00
0.10
Pulse width
≤
1 µs
Duty factor
≤
0.1 %
T
= 25°C
J
Fig. 11a – Switching Time Test Circuit
V
= 0V
GS
V
DS
90 %
0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0
, Source-to-Drain Voltage (V)
V
SD
Fig. 8 – Typical Source-Drain Diode Forward Voltage
10 %
V
GS
t
d(on)
t
r
t
d(off)
t
f
1000
OPERATION IN THIS AREA
Fig. 11b – Switching Time Waveforms
LIMITED BY R
(on)
DS
100
10
1
100µsec
1msec
Tc = 25°C
Tj = 150°C
10msec
Single Pulse
0.1
1
10
100
1000
10000
V
, Drain-to-Source Voltage (V)
DS
Fig. 9 – Maximum Safe Operating Area
S21-0019-Rev. C, 18-Jan-2021
Document Number: 91259
4
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
SiHFPS38N60L
Vishay Siliconix
1
D = 0.50
0.1
0.20
0.10
0.05
0.01
0.02
0.01
P
DM
t
1
0.001
t
2
SINGLE PULSE
( THERMAL RESPONSE )
Notes:
1. Duty factor D =
t
/ t
1
2
2. Peak T
= P
x
Z
+ T
J
DM
thJC
C
0.0001
1E-006
1E-005
0.0001
0.001
0.01
0.1
1
t
, Rectangular Pulse Duration (sec)
1
Fig. 10 –
Maximum Effective Transient Thermal Impedance, Junction-to-Case
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
15 V
Driver
L
I
= 250µA
V
D
DS
D.U.T
AS
R
G
+
–
V
DD
I
A
20 V
0.01
Ω
t
p
Fig. 14b – Unclamped Inductive Test Circuit
-75 -50 -25
0
25 50 75
100 125 150 175
, Temperature ( °C )
T
J
V
DS
Fig. 13 – Threshold Voltage vs. Temperature
t
p
1400
1200
1000
800
600
400
200
0
I
D
TOP
17A
24A
BOTTOM 38A
I
AS
Fig. 14c – Unclamped Inductive Waveforms
25
50
75
100
125
150
Starting T
, Junction Temperature (°C)
J
Fig. 14a – Maximum Avalanche Energy vs. Drain Current
S21-0019-Rev. C, 18-Jan-2021
Document Number: 91259
5
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
SiHFPS38N60L
Vishay Siliconix
Current regulator
Same type as D.U.T.
50 k
Ω
Q
G
12 V
V
GS
0.2 µF
0.3 µF
Q
GS
Q
GD
+
–
V
DS
D.U.T.
V
G
V
GS
3 mA
Charge
I
G
I
D
Current sampling resistors
Fig. 15a – Basic Gate Charge Waveform
Fig. 15b – Gate Charge Test Circuit
S21-0019-Rev. C, 18-Jan-2021
Document Number: 91259
6
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
SiHFPS38N60L
Vishay Siliconix
Peak Dio
d
e Recovery
d
V/
d
t Test Circuit
+
Circuit layout con
s
ideration
s
•
Low
s
tray inductance
•
G
round plane
D.U.T.
•
Low leakage inductance
current tran
s
former
–
+
–
–
+
R
g
•
dV/dt controlled by R
g
•
Driver
s
ame type a
s
D.U.T.
•
I
S
D
controlled by duty factor “D”
•
D.U.T. – device under te
s
t
+
–
V
DD
Driver gate drive
P.W.
P.W.
D =
Period
Period
V
GS
= 10 V
a
D.U.T. l
S
D
waveform
D.U.T. V
D
S
waveform
Rever
s
e
recovery
current
Body diode forward
current
dI/dt
Diode recovery
dV/dt
V
DD
Re-applied
voltage
Body diode forward drop
Inductor current
I
S
D
Ripple
≤
5 %
Note
a. V
GS
= 5 V for logic level device
s
Fig. 16 – For N-Channel
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and
S21-0019-Rev. C, 18-Jan-2021
Document Number: 91259
7
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
Package Information
Vishay Siliconix
TO-274AA (High Voltage)
VERSION 1: FACILITY CODE = Y
A
A
B
E
D2
E1
E4
A1
R
D1
D
L1
L
Detail “A”
C
b
e
A2
0.10 (0.25)
M
M
B A
b4
b2
Lead Tip
Detail “A”
Scale: 2:1
MILLIMETERS
INCHES
MILLIMETERS
INCHES
MIN.
DIM.
A
MIN.
4.70
1.50
2.25
1.30
1.80
3.00
0.38
19.80
MAX.
MIN.
MAX.
0.209
0.098
0.104
0.063
0.087
0.128
0.035
0.819
DIM.
D1
D2
E
MIN.
15.50
0.70
MAX.
MAX.
0.634
0.051
0.634
0.547
5.30
2.50
2.65
1.60
2.20
3.25
0.89
20.80
0.185
0.059
0.089
0.051
0.071
0.118
0.015
0.780
16.10
1.30
0.610
0.028
0.594
0.524
A1
A2
b
15.10
13.30
16.10
13.90
E1
e
b2
b4
c
(1)
D
5.45 BSC
0.215 BSC
L
13.70
1.00
2.00
14.70
1.60
3.00
0.539
0.039
0.079
0.579
0.063
0.118
L1
R
Notes
•
•
Dimensioning and tolerancing per ASME Y14.5M-1994
Dimension D and E do not include mold flash. Mold flash shall not exceed 0.127 mm (0.005″) per side. These dimensions are measured at
the outer extremes of the plastic body
Outline conforms to JEDEC
®
outline to TO-274AA
Dimension measured at tip of lead
•
(1)
Revision: 19-Oct-2020
Document Number: 91365
1
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
Package Information
Vishay Siliconix
VERSION 2: FACILITY CODE = N
B
A
A
E
E3
A2
F
F
H
H
C
G
G
A1
e
b3
b1
b
3 x
0.25 M
B A M
C
E4
E1
b’, b2, b4
Base metal
Plating
b, b1, b3
SECTION “F-F”, “G-G” AND “H-H”
SCALE: NONE
MILLIMETERS
MILLIMETERS
DIM.
A
MIN.
4.83
2.29
1.91
1.07
1.07
1.91
1.91
2.87
2.87
0.55
0.55
20.80
MAX.
5.21
2.54
2.16
1.28
1.33
2.41
2.16
3.38
3.13
0.65
0.68
21.10
DIM.
D1
D2
E
MIN.
16.25
0.50
MAX.
17.65
0.80
A1
A2
b’
15.75
13.10
3.68
16.13
14.15
5.10
E1
E2
E3
E4
e
b
b1
b2
b3
b4
c’
1.00
1.90
12.38
13.43
5.44 BSC
3
N
L
19.81
3.70
5.49
20.32
4.00
6.00
c
L1
Q
D
ECN: E20-0538-Rev. C, 19-Oct-2020
DWG: 5975
Notes
•
•
•
•
Dimensioning and tolerancing per ASME Y14.5M-1994
Outline conforms to JEDEC
®
outline to TO-274AD
Dimensions are measured in mm, angles are in degree
Metal surfaces are tin plated, except area of cut
Revision: 19-Oct-2020
Document Number: 91365
2
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
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Vishay
Disclaimer
ALL PRODUCT, PRODUCT SPECIFICATIONS AND DATA ARE SUBJECT TO CHANGE WITHOUT NOTICE TO IMPROVE
RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE.
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parameters, including typical parameters, must be validated for each customer application by the customer’s technical experts.
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Revision: 01-Jan-2023
Document Number: 91000
1
