Vishay-Intertech-SQ1470AEH-T1-GE3

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Vishay-Intertech-SQ1470AEH-T1-GE3
SQ1470AEH  
Vishay Siliconix  
Automotive N-Channel 30 V (D-S) 175 °C MOSFET  
FEATURES  
• TrenchFET

®

power MOSFET  
PRODUCT SUMMARY  
V

DS

(V)  
30  
• AEC-Q101 qualified  
R

DS(on)

(
) at V

GS

= 4.5 V  

DS(on)

(
) at V

GS

= 2.5 V  
0.065  
0.095  
1.7  
• 100 % R

g

and UIS tested  
R
• Material categorization:
 
for definitions of compliance please see  
I

D

(A)  
Configuration  
Single  
S
OT-
3
6
3  
S
C-70
S
in
g
le (6 lea
d
s)  
D
S
4
D
5
D
6
G
3
G
S
2
D
1
D
N-Channel MOSFET  
Top View  
Marking Code
: 9O  
ORDERING INFORMATION  
Package  
SC-70  
Lead (Pb)-free and Halogen-free  
SQ1470AEH-T1-GE3  
ABSOLUTE MAXIMUM RATINGS
(T

C

= 25 °C, unless otherwise noted)  
PARAMETER  
SYMBOL  
LIMIT  
UNIT  
Drain-Source Voltage  
Gate-Source Voltage  
V

DS  

30  
V
V

GS  

12  
T

C

= 25 °C  
1.7  
Continuous Drain Current

a  

I

D  

T

C

= 125 °C  
1.7  
Continuous Source Current (Diode Conduction)

a  

Pulsed Drain Current

b  

I

S  

1.7  
A
I

DM  

I

AS  

6.7  
Single Pulse Avalanche Current  
Single Pulse Avalanche Energy  
10  
L = 0.1 mH  
E

AS  

5
3.3  
mJ  
W
T

C

= 25 °C  
Maximum Power Dissipation

b  

P

D  

T

C

= 125 °C  
1.1  
Operating Junction and Storage Temperature Range  
T

J

, T

stg  

-55 to +175  
°C  
THERMAL RESISTANCE RATINGS  
PARAMETER  
SYMBOL  
R

thJA  

LIMIT  
125  
45  
UNIT  
Junction-to-Ambient  
PCB Mount

c  

°C/W  
Junction-to-Foot (Drain)  
R

thJF  

Notes  
a. Package
 
limited.  
b. Pulse
 
test; pulse width
300 μs, duty cycle
2 %.  
c. When
 
mounted on 1″ square PCB (FR4 material).  
S15-1473-Rev. A, 17-Jun-15  
Document Number: 67108  
1
For technical questions, contact:

THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT  
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH
A
T

SQ1470AEH  
Vishay Siliconix  
SPECIFICATIONS
(T

C

= 25 °C, unless otherwise noted)  
PARAMETER  
SYMBOL  
TEST CONDITIONS  
MIN.  
TYP.  
MAX. UNIT  
Static  
Drain-Source Breakdown Voltage  
Gate-Source Threshold Voltage  
Gate-Source Leakage  
V

DS  

V

GS(th)  

I

GSS  

V

GS

= 0 V, I

D

= 250 μA  
V

DS

= V

GS

, I

D

= 250 μA  
30  
0.6  
–
–
–
V
1
1.6  
V

DS

= 0 V, V

GS  

V

GS

= 0 V  

GS

= 0 V  
=
12 V  
–
100  
1
nA  
μA  
A
V

DS

= 30 V  
–
–
Zero Gate Voltage Drain Current  
On-State Drain Current

a  

I

DSS  

V
V

DS

= 30 V, T

J

= 125 °C  
V

DS

= 30 V, T

J

= 175 °C  
V

DS

5 V  
–
–
50  
V

GS

= 0 V  
V

GS

= 4.5 V  
V

GS

= 4.5 V  
–
–
150  
–
I

D(on)  

5
–
–
0.045  
–
I

D

= 4.2 A  
0.065  
0.097  
0.115  
0.095  
–
V
V
V

GS

= 4.5 V  

GS

= 4.5 V  

GS

= 2.5 V  
I

D

= 3.8 A, T

J

= 125 °C  
I

D

= 3.8 A, T

J

= 175 °C  
I

D

= 4.2 A  
–
Drain-Source On-State Resistance

a  

R

DS(on)  

–
–
–
0.060  
14  
Forward Transconductance

b  

Dynamic

b  

g

fs  

V

DS

= 15 V, I

D

= 1.7 A  
–
S
Input Capacitance  
Output Capacitance  
Reverse Transfer Capacitance  
Total Gate Charge

c  

Gate-Source Charge  
Gate-Drain Charge

c  

Gate Resistance  
C

iss  

C

oss  

C

rss  

Q

g  

–
–
350  
65  
30  
4.2  
1.1  
0.7  
3.8  
10  
13  
14  
8
450  
80  
40  
5.2  
–
V

GS

= 0 V  
V

DS

= 15 V, f = 1 MHz  
pF  
–
–
Q

gs  

Q

gd  

R

g  

V

GS

= 4.5 V  
V

DS

= 15 V, I

D

= 4.2 A  
f = 1 MHz  
–
nC  
–
–
1.9  
–
5.7  
–
Turn-On Delay Time

c  

Rise Time

c  

t

d(on)  

t

r  

t

d(off)  

t

f  

–
–
V

DD

= 15 V, R

L

= 3.9
  
ns  
I

D

4.2 A, V

GEN

= 4.5 V, R

g

= 1
  
Turn-Off Delay Time

c  

Fall Time

c  

–
–
–
–
Source-Drain Diode Ratings and Characteristics

b  

Pulsed Current

a  

Forward Voltage  
I

SM  

–
–
–
11  
A
V
V

SD  

I

F

= 1.7 A, V

GS

= 0 V  
0.7  
1.1  
Notes  
a. Pulse
 
test; pulse width
300 μs, duty cycle
2 %.  
b. Guaranteed
 
by design, not subject to production testing.  
c. Independent
 
of operating temperature.
  
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation  
of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum  
rating conditions for extended periods may affect device reliability.  
S15-1473-Rev. A, 17-Jun-15  
Document Number: 67108  
2
For technical questions, contact:

THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT  
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH
A
T

SQ1470AEH  
Vishay Siliconix  
TYPICAL CHARACTERISTICS
(25 °C, unless otherwise noted)  
20  
15  
12  
9
V

GS

= 10 V thru 3 V  
16  
12  
8
V

GS

= 2 V  
6
T

C

= 25 °C  
4
3
T

C

= 125 °C  
T

C

= -55 °C  
0
0
0
1
2
3
4
5
0.0  
0.0  
0
0.5  
1.0  
1.5  
2.0  
2.5  
2.5  
15  
V

GS

–
G
ate-to-
S
ource Voltage (V)  
V

D
S

– Drain-to-
S
ource Voltage (V)  
Output Characteristics  
Transfer Characteristics  
5
4
3
2
1
0
30  
24  
18  
12  
6
T

C

= -55 °C  
T

C

= 25 °C  
T

C

= 125 °C  
T

C

= 25 °C  
T

C

= 125 °C  
T

C

= -55 °C  
2.0  
0
0
1
2
3
4
5
0.5  
1.0  
1.5  
I

D

– Drain Current (A)  
V

GS

–
G
ate-to-
S
ource Voltage (V)  
Transconductance  
Transfer Characteristics  
0.15  
0.12  
0.09  
0.06  
0.03  
0.00  
500  
400  
300  
200  
100  
0
C

i
ss  

V

GS

= 2.5 V  
C

o
ss  

V

GS

= 4.5 V  
C

r
ss  

3
6
9
12  
0
10  
20  
30  
I

D

– Drain Current (A)  
V

D
S

– Drain-to-
S
ource Voltage (V)  
Capacitance  
On-Resistance vs. Drain Current  
Document Number: 67108  
S15-1473-Rev. A, 17-Jun-15  
3
For technical questions, contact:

THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT  
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH
A
T

SQ1470AEH  
Vishay Siliconix  
TYPICAL CHARACTERISTICS
(25 °C, unless otherwise noted)  
42  
40  
38  
36  
34  
32  
30  
5
4
3
2
1
0
I

D

= 4.2
 
A  
V

D
S

= 15
 
V  
I

D

= 1 mA  
0
1
2
3
4
-50 -25  
0
25  
50  
75 100
 
125 150 175  
Q

g

– Total
G
ate Charge (nC)  
T

J

– Junction Temperature (°C)  
Gate Charge  
Drain Source Breakdown vs. Junction Temperature  
100  
0.4  
0.2  
10  
1
T

J

= 150 °C  
0.0  
I

D

= 5 mA  
T

J

= 25 °C  
0.1  
– 0.2  
– 0.4  
– 0.6  
I

D

= 250 μA  
0.01  
0.001  
-50 -25  
0
25  
50  
75 100
 
125 150 175  
0.0  
0.2  
0.4  
0.6  
0.8  
1.0  
1.2  
T

J

– Temperature (°C)  
V

S
D

–
S
ource-to-Drain Voltage (V)  
Threshold Voltage  
Source Drain Diode Forward Voltage  
0.25  
0.20  
0.15  
0.10  
0.05  
0.00  
2.0  
1.7  
1.4  
1.1  
0.8  
0.5  
I

D

= 4.2 A  
V

GS

= 10 V  
V

GS

= 4.5 V  
V

GS

= 2.5 V  
T

J

= 150 °C  
T

J

= 25°C  
3
-50 -25  
0
25  
50  
75 100
 
125 150 175  
0
1
2
4
5
T

J

– Junction Temperature (°C)  
V

D
S

–
G
ate-to-
S
ource Voltage (V)  
On-Resistance vs. Gate-to-Source Voltage  
S15-1473-Rev. A, 17-Jun-15  
On-Resistance vs. Junction Temperature  
Document Number: 67108  
4
For technical questions, contact:

THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT  
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH
A
T

SQ1470AEH  
Vishay Siliconix  
THERMAL RATINGS
(T

A

= 25 °C, unless otherwise noted)  
100  
I

DM

Limited  
10  
1
Limited by R

D
S
(on)  

*
1 m
s  
I

D

Limited  
10 m
s  
100m
s
, 1
s
, 10
s
, DC  
0.1  
0.01  
T

C

= 25
°
C  
S
ingle Pul
s
e  
BVD
SS
Limited  
0.01  
0.1  
1
10  
100  
V

D
S

– Drain-to-
S
ource Voltage (V)  
* V

GS

> minimum V

GS

at which R

D
S
(on)

i
s s
pecified  
Safe Operating Area  
2
1
Duty Cycle = 0.5  
0.2  
0.1  
N
otes:  
P
DM  
0.1  
0.05  
0.02  
t
1
t
2
t
t
1
2
1. Duty Cycle, D =  
2. Per Unit Base = R  
= 125 °C/W  
thJA  
(t)  
3. T  
– T
 
= P  
Z
JM  
A
DM thJA  
Single Pulse  
4. Surface Mounted  
0.01  
-4  
-3  
-2  
-1  
10  
10  
10  
10  
1
10  
100  
600  
Square Wave Pulse Duration (s)  
Normalized Thermal Transient Impedance, Junction-to-Ambient  
S15-1473-Rev. A, 17-Jun-15  
Document Number: 67108  
5
For technical questions, contact:

THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT  
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH
A
T

SQ1470AEH  
Vishay Siliconix  
THERMAL RATINGS
(T

A

= 25 °C, unless otherwise noted)  
2
1
Duty Cycle = 0.5  
0.2  
0.1  
0.1  
0.05  
0.02  
Single Pulse  
0.01  
-4  
-3  
-2  
-1  
10  
10  
10  
10  
1
10  
Square Wave Pulse Duration (s)  
Normalized Thermal Transient Impedance, Junction-to-Foot  
Note  
•
The characteristics shown in the two graphs
  
– Normalized Transient Thermal Impedance Junction-to-Ambient (25 °C)
  
– Normalized Transient Thermal Impedance Junction-to-Foot (25 °C)
  
are given for general guidelines only to enable the user to get a “ball park” indication of part capabilities. The data are extracted from single  
pulse transient thermal impedance characteristics which are developed from empirical measurements. The latter is valid for the part  
mounted on printed circuit board – FR4, size 1″ x 1″ x 0.062″, double sided with 2 oz. copper, 100 % on both sides. The part capabilities  
can widely vary depending on actual application parameters and operating conditions.  
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon  
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and  
reliability data, see

.  
S15-1473-Rev. A, 17-Jun-15  
Document Number: 67108  
6
For technical questions, contact:

THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT  
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH
A
T

Package Information  
Vishay Siliconix  
SCĆ70: 6ĆLEADS  
MILLIMETERS  
INCHES  
Dim Min  
Nom Max Min Nom
 
Max  
6
1
5
2
4
3
0.90  
–
–
1.10  
0.10  
1.00  
0.30  
0.25  
2.20  
2.40  
1.35  
0.035  
–
–
–
0.043  
0.004  
0.039  
0.012  
0.010  
0.087  
0.094  
0.053  
A
E
E
1
–
A

1  

0.80  
–
0.031  
0.006  
0.004  
0.071  
0.071  
0.045  
–
A

2  

0.15  
–
–
b
-B-  
0.10  
–
–
c
e
b
1.80  
2.00  
2.10  
1.25  
0.65BSC  
1.30  
0.20  
7
_
Nom  
0.079  
0.083  
0.049  
0.026BSC  
0.051  
0.008  
7
_
Nom  
D
e
1
1.80  
E
-A-  
D
1.15  
E

1  

c
e
1.20  
1.40  
0.30  
0.047  
0.004  
0.055  
0.012  
A
e

1  

A
2
1
0.10  
L
L
A
ECN: S-03946—Rev. B, 09-Jul-01  
DWG: 5550  
Document Number: 71154  
06-Jul-01  
1

AN815  
Vishay Siliconix  
Single-Channel LITTLE FOOT
R
SC-70 6-Pin MOSFET  
Copper Leadframe Version  
Recommended Pad Pattern and Thermal Performance  
INTRODUCTION  
EVALUATION BOARDS ꢀ SINGLE SC70-6  
The new single 6-pin SC-70 package with a copper leadframe  
enables improved on-resistance values and enhanced  
thermal performance
 
as compared to the existing 3-pin and  
6-pin packages with Alloy 42 leadframes. These devices are  
intended for small
 
to medium load applications where a  
miniaturized package is required. Devices in this package  
come in a range
 
of on-resistance values, in n-channel and  
p-channel versions. This technical note discusses pin-outs,  
package outlines, pad patterns, evaluation board layout, and  
thermal performance for the single-channel version.  
The evaluation board (EVB) measures 0.6 inches by  
0.5 inches. The copper pad traces are the same as in Figure 2.  
The board allows examination from the outer pins to 6-pin DIP  
connections, permitting test sockets to be used in evaluation  
testing. See
 
Figure 3.  
52 (mil)  
BASIC PAD PATTERNS  
6
5
2
4
3
See Application Note 826,
Recommended Minimum Pad  
Patterns With Outline Drawing Access for Vishay Siliconix  
MOSFE
T
s, (

) for the basic  
pad layout and dimensions. These pad patterns are sufficient  
for the low to medium power applications for which this  
package is intended. Increasing the drain pad pattern yields a  
reduction in
 
thermal resistance and is a preferred footprint.  
The availability of four drain leads rather than the traditional  
single drain lead allows a better thermal path from the package  
to the PCB and external environment.  
96 (mil)  
71 (mil)  
26 (mil)  
1
13 (mil)  
0, 0 (mil)  
18 (mil)  
26 (mil)  
PIN-OUT  
16 (mil)  
Figure  
1 shows the pin-out description and Pin 1  
FIGURE 2.  
SC-70 (6 leads) Single  
identification.The pin-out of this device allows the use of four  
pins as drain leads, which helps to reduce on-resistance and  
junction-to-ambient thermal resistance.  
SOT-363  
SC-70 (6-LEADS)  
The thermal performance of the single 6-pin SC-70 has been  
measured on the EVB, comparing both the copper and  
Alloy 42
 
leadframes. This test was first conducted on the  
traditional Alloy 42 leadframe and was then repeated using the  
1-inch

2

PCB with dual-side copper coating.  
D
D
G
1
2
3
6
5
D
D
S
4
T
o
p View  
FIGURE 1.  
For package dimensions see outline drawing SC-70 (6-Leads)  
Document Number:
 
71334  
12-Dec-03  
1

AN815  
Vishay Siliconix  
Front of Board SC70-6  
Back of Board SC70-6  
vishay.com  
FIGURE 3.  
THERMAL PERFORMANCE  
Junction-to-Foot Thermal Resistance  
(Package Performance)  
COOPER LEADFRAME  
Room Ambient 25
_
C  
Elevated Ambient 60
_
C  
The junction to foot thermal resistance is a useful method of  
comparing different packages thermal performance.  
T

J(max)

*
T

A  

T

J(max)

*
T

A  

P

D  

+
P

D  

+
R
q

JA  

R
q

JA  

150

o

C
*
60

o

C  
124

o

C
ń
W  
150

o

C
*
25

o

C  
124

o

C
ń
W  
P

D  

+
P

D  

+
A helpful way of presenting the thermal performance of the  
6-Pin SC-70 copper leadframe device is to compare it to the  
traditional Alloy 42 version.  
P

D

+
726 mW  
P

D

+
1.01 W  
As can be seen from the calculations above, the compact 6-pin  
SC-70 copper leadframe LITTLE FOOT power MOSFET can  
handle up to 1 W under the stated conditions.  
Thermal performance for the 6-pin SC-70 measured as  
junction-to-foot thermal resistance, where the “foot” is the  
drain lead of the device at the bottom where it meets the PCB.  
The junction-to-foot thermal resistance is typically 40
_
C/W in  
the copper leadframe and 163
_
C/W in the Alloy 42 leadframe  
— a four-fold improvement. This improved performance is  
obtained by the enhanced thermal conductivity of copper over  
Alloy 42.  
Testing  
To
f
urther aid comparison of copper and Alloy 42 leadframes,  
Figure 5 illustrates single-channel 6-pin SC-70 thermal  
performance on two different board sizes and two different pad  
patterns. The measured steady-state values of R
q

JA

for the  
two leadframes are as follows:  
LITTLE FOOT 6-PIN SC-70  
Power Dissipation  
Alloy 42  
Copper  
The typical R
q

JA

for the single 6-pin SC-70 with copper  
leadframe is 103
_
C/W steady-state, compared with 212
_
C/W  
for the Alloy 42 version. The figures are based on the 1-inch

2  

FR4 test board. The following example shows how the thermal  
resistance impacts power dissipation for the two different  
leadframes at varying ambient temperatures.  
1) Minimum recommended pad pattern on  
the EVB board V (see Figure 3.  
329.7
_
C/W  
208.5
_
C/W  
2
2) Industry standard 1-inch
 
PCB with  
211.8
_
C/W  
103.5
_
C/W  
maximum copper both sides.  
The results indicate that designers can reduce thermal  
resistance (R
q

JA

) by 36% simply by using the copper  
leadframe device rather than the Alloy 42 version. In this  
example, a 121
_
C/W reduction was achieved without an  
increase in board area. If increasing in board size is feasible,  
a further 105
_
C/W reduction could be obtained by utilizing a  
1-inch

2

square PCB area.  
ALLOY 42 LEADFRAME  
Room Ambient 25
_
C  
Elevated Ambient 60
_
C  
T

J(max)

*
T

A  

R
q

JA  

T

J(max)

*
T

A  

R
q

JA  

P

D  

+
P

D  

+
The copper leadframe versions have the following suffix:  
150

o

C
*
25

o

C  
212

o

C
ń
W  
150

o

C
*
25

o

C  
212

o

C
ń
W  
P

D  

+
P

D  

+
Single:  
Dual:  
Si14xxEDH  
Si19xxEDH  
P

D

+
590 mW  
P

D

+
425 mW  
Complementary: Si15xxEDH  
Document Number:
 
71334  
12-Dec-03  
2

AN815  
Vishay Siliconix  
250  
200  
150  
400  
320  
240  
Alloy  
42  
Alloy  
42  
160  
80  
100  
50  
Copper  
100  
Copper  
0
0
-5  
-4  
-3  
-2  
-1  
-5  
-4  
-3  
-2  
-1  
10  
10  
10  
10  
10  
1
10  
1000  
10  
10  
10  
10  
10  
1
10  
100  
1000  
Time (Secs)  
Time (Secs)  
2
FIGURE 4.  
Leadframe Comparison on EVB  
FIGURE 5.  
Leadframe Comparison on Alloy 42 1-inch
 
PCB  
Document Number:
 
71334  
12-Dec-03  
3

Application Note 826  
Vishay Siliconix  
RECOMMENDED MINIMUM
P
A
DS FOR SC-70: 6-Lead  
0.067  
(1.702)  
0.016  
0.026  
0.010  
(0.406)  
(0.648)  
(0.241)  
Recommended Minimum Pads  
Dimensions in Inches/(mm)  
Return to Index  
18  
Document Number: 72602  
Revision: 21-Jan-08  

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Revision: 01-Jan-2021  
Document Number: 91000  
1