Vishay-Intertech-VS-ST180S12P1V
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VS-ST180SPbF Series
Vishay Semiconductors
Phase Control Thyristors
(Stud Version), 200 A
FEATURES
• Center amplifying gate
• International standard case TO-93 (TO-209AB))
• Hermetic metal case with ceramic insulator
• Compression
bonded encapsulation for heavy
duty operations such as severe thermal cycling
TO-93 (TO-209AB)
• Designed and qualified for industrial level
• Material
categorization: for definitions of compliance
PRIMARY CHARACTERISTICS
TYPICAL APPLICATIONS
• DC motor controls
I
T(AV)
200 A
V
DRM
/V
RRM
V
TM
1600 V, 2000 V
1.75 V
• Controlled DC power supplies
I
GT
150 mA
• AC controllers
T
J
-40 °C to +125 °C
TO-93 (TO-209AB)
Single SCR
Package
Circuit configuration
MAJOR RATINGS AND CHARACTERISTICS
PARAMETER
TEST CONDITIONS
VALUES
200
UNITS
A
°C
A
I
T(AV)
T
C
85
I
T(RMS)
314
50 Hz
60 Hz
50 Hz
60 Hz
5000
I
TSM
A
5230
125
I
2
t
kA
2
s
114
V
DRM
/V
RRM
1600 to 2000
100
V
t
q
Typical
μs
°C
T
J
-40 to +125
ELECTRICAL SPECIFICATIONS
VOLTAGE RATINGS
V
DRM
/V
RRM
, MAXIMUM REPETITIVE PEAK
V
RSM
, MAXIMUM
NON-REPETITIVE PEAK VOLTAGE
AT T
J
= T
J
MAXIMUM
I
DRM
/I
RRM
MAXIMUM
TYPE
NUMBER
VOLTAGE
CODE
AND OFF-STATE VOLTAGE
V
V
mA
16
20
1600
2000
1700
2100
VS-ST180S
30
Revision: 27-Sep-17
Document Number: 94397
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VS-ST180SPbF Series
Vishay Semiconductors
ABSOLUTE MAXIMUM RATINGS
PARAMETER
SYMBOL
I
T(AV)
TEST CONDITIONS
180° conduction, half sine wave
DC at 76 °C case temperature
VALUES
200
UNITS
A
Maximum average on-state current
at case temperature
85
°C
Maximum RMS on-state current
I
T(RMS)
314
t = 10 ms
t = 8.3 ms
t = 10 ms
t = 8.3 ms
t = 10 ms
t = 8.3 ms
t = 10 ms
t = 8.3 ms
5000
5230
4200
4400
125
No voltage
reapplied
A
Maximum peak, one-cycle
non-repetitive surge current
I
TSM
100 % V
RRM
reapplied
Sinusoidal half wave,
initial T
J
= T
J
maximum
No voltage
reapplied
114
Maximum I
2
t for fusing
I
2
t
kA
2
s
88
100 % V
RRM
reapplied
81
Maximum I
2
t for fusing
I
2
t
V
T(TO)1
V
T(TO)2
r
t1
t = 0.1 to 10 ms, no voltage reapplied
1250
1.08
1.14
1.18
1.14
1.75
600
kA
2
s
Low level value of threshold voltage
High level value of threshold voltage
Low level value of on-state slope resistance
High level value of on-state slope resistance
Maximum on-state voltage
(16.7 % x
x I
T(AV)
< I <
x I
T(AV)
), T
J
= T
J
maximum
(I >
x I
T(AV)
), T
J
= T
J
maximum
V
(16.7 % x
x I
T(AV)
< I <
x I
T(AV)
), T
J
= T
J
maximum
(I >
x I
T(AV)
), T
J
= T
J
maximum
m
V
r
t2
V
TM
I
H
I
pk
= 570 A, T
J
= 125 °C, t
p
= 10 ms sine pulse
Maximum holding current
T
J
= T
J
maximum, anode supply 12 V resistive load
mA
Maximum (typical) latching current
I
L
1000 (300)
SWITCHING
PARAMETER
SYMBOL
TEST CONDITIONS
VALUES
UNITS
Maximum non-repetitive rate of rise of
turned-on current
Gate drive 20 V, 20
, t
r
1 μs
T
J
= T
J
maximum, anode voltage
80 % V
DRM
dI/dt
1000
A/μs
Gate current 1 A, dI
g
/dt = 1 A/μs
V
d
= 0.67 % V
DRM
, T
J
= 25 °C
Typical delay time
t
d
t
q
1.0
μs
I
TM
= 300 A, T
J
= T
J
maximum, dI/dt = 20 A/μs,
Typical turn-off time
100
V
R
= 50 V, dV/dt = 20 V/μs, gate 0 V 100
, t
p
= 500 μs
BLOCKING
PARAMETER
SYMBOL
TEST CONDITIONS
VALUES
UNITS
Maximum critical rate of rise of
off-state voltage
dV/dt
T
J
= T
J
maximum linear to 80 % rated V
DRM
T
J
= T
J
maximum, rated V
DRM
/V
RRM
applied
500
V/μs
Maximum peak reverse and
off-state leakage current
I
RRM
,
30
mA
I
DRM
Revision: 27-Sep-17
Document Number: 94397
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VS-ST180SPbF Series
Vishay Semiconductors
TRIGGERING
VALUES
UNITS
PARAMETER
SYMBOL
TEST CONDITIONS
T
J
= T
J
maximum, t
p
5 ms
TYP.
MAX.
Maximum peak gate power
P
GM
P
G(AV)
I
GM
10
2.0
3.0
20
W
A
Maximum average gate power
T
J
= T
J
maximum, f = 50 Hz, d% = 50
Maximum peak positive gate current
Maximum peak positive gate voltage
Maximum peak negative gate voltage
T
J
= T
J
maximum, t
p
5 ms
+ V
GM
– V
GM
T
J
= T
J
maximum, t
p
5 ms
V
5.0
T
J
= – 40 °C
T
J
= 25 °C
180
90
–
150
–
DC gate current required to trigger
I
GT
mA
Maximum required gate trigger/
T
J
= 125 °C
T
J
= – 40 °C
T
J
= 25 °C
T
J
= 125 °C
40
current/voltage are the lowest
value which will trigger all units
12 V anode to cathode applied
2.9
1.8
1.2
–
DC gate voltage required to trigger
DC gate current not to trigger
DC gate voltage not to trigger
V
GT
I
GD
3.0
–
V
mA
V
Maximum gate current/voltage
not to trigger is the maximum
10
T
J
= T
J
maximum value
which will not trigger any
unit with rated V
DRM
anode to
cathode applied
V
GD
0.25
THERMAL AND MECHANICAL SPECIFICATIONS
PARAMETER
SYMBOL
TEST CONDITIONS
VALUES
-40 to +125
-40 to +150
0.105
UNITS
Maximum operating junction
temperature range
T
J
°C
Maximum storage temperature range
T
Stg
Maximum thermal resistance,
junction to case
R
thJC
DC operation
K/W
Maximum thermal resistance,
case to heatsink
R
thC-hs
Mounting surface, smooth, flat and greased
Non-lubricated threads
0.04
31
(275)
N · m
(lbf
in)
Mounting torque,
10 %
24.5
(210)
Lubricated threads
Approximate weight
Case style
280
g
See dimensions – link at the end of datasheeet
TO-93 (TO-209AB)
R
thJC
CONDUCTION
SINUSOIDAL
CONDUCTION
RECTANGULAR
CONDUCTION
CONDUCTION ANGLE
TEST CONDITIONS
UNITS
180°
120°
90°
0.015
0.019
0.025
0.036
0.060
0.012
0.020
0.027
0.037
0.060
T
J
= T
J
maximum
K/W
60°
30°
Note
•
The table above shows the increment of thermal resistance R
thJC
when devices operate at different conduction angles than DC
Revision: 27-Sep-17
Document Number: 94397
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,
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VS-ST180SPbF Series
Vishay Semiconductors
130
120
110
100
90
130
120
110
100
90
ST
1
8 0S
S
e r i e s
ST1
8
0 S
S
e
r
ie s
thJC
R
(DC) = 0.105 K
/
W
Conduct
i
o
n
P
e
r
i
o
d
R
(DC) = 0.105
K
/ W
thJC
Conduction Angle
30°
60°
90°
30°
120°
60°
90°
80
180°
120°
DC
180°
70
80
0
50 100
150 200 250 300 350
Average On-
s
t
ate Current (A)
0
40
80
120 160 200 240
Average On-
s
t
ate Cu
r
r
e
nt (A)
Fig. 1 – Current Ratings Characteristics
Fig. 2 – Current Ratings Characteristics
350
R
t
180°
h
S
120°
A
0
300
.
=
1
6
90°
60°
0
K
.
0
/
8
W
K
/
0
.
2
W
250
30°
K
/
–
W
D
e
0
.
3
K
l
t
/
a
W
R
M
S
L
im it
R
200
150
100
50
Conduction Angle
ST
1
8 0 S
S
e
r
ie s
0
.
8
K
/
W
T =
1 25° C
J
0
0
40
80
120 160 200
2
2
4
5
0
50
75
100
125
Average On-
s
t
ate Cu
r
rent (A)
Ma
x
i
m
um Allowable Ambient
T
e
mpe
r
a
tu
r
e (°C)
Fig. 3 – On-State Power Loss Characteristics
500
450
400
350
300
250
200
150
100
50
DC
180°
120°
90°
60°
30°
R
M
S
L
i
m it
Conduction
P
e
r
iod
0
.
5
K
/
W
ST
1
80S
S
e
r
i
e
s
T =
125° C
J
0
0
40 80
120 160 200 240 280 3
Average On-
s
t
ate Cu
r
rent (A)
Fig. 4 – On-State Power Loss Characteristics
2
0
50
75
100
125
Maximum Allowable Ambient
T
e
mpe
r
a
ture (°C)
Revision: 27-Sep-17
Document Number: 94397
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,
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,
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VS-ST180SPbF Series
Vishay Semiconductors
5500
5000
4500
4000
3500
3000
2500
2000
4800
4400
4000
3600
3200
2800
2400
2000
Maximum Non
R
e
petitive
S
u
r
g
e Current
Ver
s
u
s
P
u
l
s
e T
r
a
i
n Dura
t
i
o
n. Control
Of Conduction May
N
o
t
B
e
M
aintained.
At Any
R
a
ted
L
o
ad Condition And
W
i
t
h
R
a
ted V
Applied
F
o
llowing
S
u
r
g
e.
RRM
I
n
itial T = 125°C
J
Initial T = 125°C
@
6
0 Hz 0.0083 s
@
5
0 Hz 0.0100 s
J
No Volt
a
ge
R
e
applied
Ra t e d
V
Re a p p
l
ie d
RRM
ST1 8 0 S Se r
i
e s
ST
1
80S
S
e
ries
1
10
100
0.01
0.1
Pul
s
e T
r
a
in Durat
ion (
s
)
Fig. 6 – Maximum Non-Repetitive Surge Current
1
Number Of
E
q
ual Amp
l
itude
H
a
l
f Cycle Current
P
u
l
s
e
s(
N
)
Fig. 5 – Maximum Non-Repetitive Surge Current
10000
1000
100
T = 2
5° C
J
T = 125°C
J
ST1 8 0 S Se r
i
e s
0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5 6
I
n
s
t
antaneousOn
–
s
t
ate Voltage (V)
Fig. 7 – On-State Voltage Drop Characteristics
1
0.1
S
t
eady
S
t
ate Value
= 0.105 K/ W
R
thJC
(DC O
p
e
r
a
t
i
o
n)
0.01
ST1 8 0 S Se r
i
e s
0.001
0.001
0.01
0.1
S
q
uare
W
a
v
e
P
u
l
s
e
D
ura
t
i
o
n (
s
)
1
10
Fig. 8 – Thermal Impedance Z
thJC
Characteristics
Revision: 27-Sep-17
Document Number: 94397
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VS-ST180SPbF Series
Vishay Semiconductors
100
(1)
P
G
M = 10W,
tp = 4ms
R
e
c
tang
u
lar gate pu
l
se
(2)
P
G
M = 20W,
tp = 2ms
(3)
P
G
M = 40W,
tp = 1ms
(4)
P
G
M = 60W,
tp = 0.66ms
a)
R
e
commended
l
o
ad line for
r
a
ted d
i
/
dt :
2
0V, 10
o
hm
s
;
t
r<=1 µs
b)
R
e
commended load
l
ine for
<=30
%
r
a
ted di/dt : 10V, 10ohms
t
r
<=1 µs
(a)
10
1
(b)
(3)
(1) (2)
(4)
VGD
IGD
De v i c e :
S
T
1
80S
S
e r i e s
0.1
F
r
equency
L
i
m
ited by
P
G
(AV)
10 100
0.1
0.001
0.01
1
In st a n t a n e o
u
s G a t e
C urre n t
( A)
Fig. 9 – Gate Characteristics
ORDERING INFORMATION TABLE
Device code
VS- ST
18
0
S
20
P
0
PbF
1
2
3
4
5
6
7
8
9
1
2
3
–
–
–
–
Vishay Semiconductors product
Thyristor
Essential part number
0 = converter grade
4
5
6
7
8
–
–
–
–
S = compression bonding stud
Voltage code x 100 = V
RRM
(see Voltage Ratings table)
P = stud base 3/4″-16UNF2A threads
0 = eyelet terminals (gate and auxiliary cathode leads)
1 = fast-on terminals (gate and auxiliary cathode leads)
9
–
–
None = standard production
PbF = lead (Pb)-free
Note: For metric device M16 x 1.5 contact factory
LINKS TO RELATED DOCUMENTS
Dimensions
Revision: 27-Sep-17
Document Number: 94397
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Outline Dimensions
Vishay Semiconductors
TO-209AB (TO-93)
DIMENSIONS
in millimeters (inches)
Glass metal seal
13 (0.75) MAX.
4 (0.16) MAX.
8.5 (0.ꢀꢀ) DIA.
4.ꢀ (0.17) DIA.
Flexible leads
C.S. 25 mm
2
(0.0ꢀ3 s.i.)
Red silicon rubber
Red cathode
C.S. 0.4 mm
2
(0.0006 s.i.)
White gate
Fast-on terminals
AMP. 280000-1
REF-250
Red shrink
White shrink
28.5 (1.12) MAX. DIA.
27.5 (1.08) MAX.
SW ꢀ2
ꢀ/4″-16UNF-2A
(1)
ꢀ5 (1.ꢀ8) MAX.
Ceramic housing
13 (0.75) MAX.
4 (0.16) MAX.
8.5 (0.ꢀꢀ) DIA.
4.ꢀ (0.17) DIA.
Flexible leads
C.S. 25 mm
2
(0.0ꢀ3 s.i.)
Red silicon rubber
Red cathode
C.S. 0.4 mm
2
(0.006 s.i.)
White gate
Red shrink
White shrink
27.5 (1.08) MAX. DIA.
27.5 (1.08) MAX.
SW ꢀ2
ꢀ/4″-16UNF-2A
(1)
ꢀ5 (1.ꢀ8) MAX.
Note
(1)
For metric device: M16 x 1.5 – length 21 (0.83) maximum
Revision: 05-Mar-12
Document Number: 95082
1
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,
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,
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Disclaimer
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Revision: 01-Jan-2023
Document Number: 91000
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