Vishay-Intertech-VS-ST650C24L0
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VS-ST650C..L Series
Vishay Semiconductors
Phase Control Thyristors
(Hockey PUK Version), 790 A
FEATURES
• Center amplifying gate
• Metal case with ceramic insulator
• International standard case B-PUK (TO-200AC)
• Material
categorization: for definitions of compliance
TYPICAL APPLICATIONS
• DC motor control
• Controlled DC power supplies
• AC controllers
B-PUK (TO-200AC)
PRIMARY CHARACTERISTICS
I
T(AV)
790 A
V
DRM
/V
RRM
2000 V, 2200 V, 2400 V
2.07 V
V
TM
I
GT
100 mA
T
J
-40 °C to +125 °C
B-PUK (TO-200AC)
Single SCR
Package
Circuit configuration
MAJOR RATINGS AND CHARACTERISTICS
PARAMETER
TEST CONDITIONS
VALUES
790
UNITS
A
°C
A
I
T(AV)
T
hs
55
1557
I
T(RMS)
I
TSM
I
2
t
T
hs
25
°C
50 Hz
60 Hz
50 Hz
60 Hz
10 100
10 700
510
A
kA
2
s
475
V
DRM
/V
RRM
2000 to 2400
200
V
t
q
Typical
μs
°C
T
J
-40 to +125
ELECTRICAL SPECIFICATIONS
VOLTAGE RATINGS
V
DRM
/V
RRM
, MAXIMU
M
R
EPETITIVE
PEAK AND OFF-STATE VOLTAGE
V
V
RSM
, MAXIMUM
NON-REPETITIVE PEAK VOLTAGE
V
I
DRM
/I
RRM
MAXIMUM
AT T
J
= T
J
MAXIMUM
mA
VOLTAGE
CODE
TYPE NUMBER
20
22
24
2000
2200
2400
2100
2300
2500
VS-ST650C..L
80
Revision: 21-Sep-17
Document Number: 93738
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VS-ST650C..L Series
Vishay Semiconductors
ABSOLUTE MAXIMUM RATINGS
PARAMETER
SYMBOL
TEST CONDITIONS
VALUES
790 (324)
55 (85)
1857
UNITS
A
Maximum average on-state current
at heatsink temperature
180° conduction, half sine wave
Double side (single side) cooled
I
T(AV)
°C
Maximum RMS on-state current
I
T(RMS)
DC at 25 °C heatsink temperature double side cooled
t = 10 ms
t = 8.3 ms
t = 10 ms
t = 8.3 ms
t = 10 ms
t = 8.3 ms
t = 10 ms
t = 8.3 ms
10 100
10 700
8600
No voltage
reapplied
A
Maximum peak, one-cycle
I
TSM
non-repetitive surge current
100 % V
RRM
reapplied
9150
Sinusoidal half wave,
initial T
J
= T
J
maximum
510
No voltage
reapplied
475
Maximum I
2
t for fusing
I
2
t
kA
2
s
370
100 % V
RRM
reapplied
347
Maximum I
2
t for fusing
I
2
t
t = 0.1 to 10 ms, no voltage reapplied
(16.7 % x
x I
T(AV)
< I <
x I
T(AV)
), T
J
= T
J
maximum
(I >
x I
T(AV)
), T
J
= T
J
maximum
5100
kA
2
s
Low level value of threshold voltage
High level value of threshold voltage
V
T(TO)1
V
T(TO)2
1.04
V
1.13
Low level value of on-state slope
resistance
r
t1
r
t2
(16.7 % x
x I
T(AV)
< I <
x I
T(AV)
), T
J
= T
J
maximum
0.61
0.35
m
High level value of on-state
slope resistance
(I >
x I
T(AV)
), T
J
= T
J
maximum
Maximum on-state voltage
Maximum holding current
Typical latching current
V
TM
I
H
I
pk
= 1700 A, T
J
= T
J
maximum, t
p
= 10 ms sine pulse
2.07
600
V
T
J
= 25 °C, anode supply 12 V resistive load
mA
I
L
1000
SWITCHING
PARAMETER
SYMBOL
TEST CONDITIONS
VALUES
UNITS
Maximum non-repetitive rate of
rise of turned-on current
Gate drive 20 V, 20
, t
r
1 μs
T
J
= T
J
maximum, anode voltage
80 % V
DRM
dI/dt
1000
A/μs
Gate current 1 A, dI
g
/dt = 1 A/μs
Typical delay time
t
d
t
q
1.0
V
d
= 0.67 % V
DRM
, T
J
= 25 °C
μs
I
TM
= 750 A, T
J
= T
J
maximum, dI/dt = 60 A/μs
Maximum turn-off time
200
V
R
= 50, dV/dt = 20 V/μs, Gate 0 V 100
, t
p
= 500 μs
BLOCKING
PARAMETER
SYMBOL
TEST CONDITIONS
VALUES
UNITS
Maximum critical rate of rise of off-state voltage
dV/dt
T
J
= T
J
maximum linear to 80 % rated V
DRM
500
V/μs
Maximum peak reverse and off-state leakage
current
I
RRM
I
DRM
,
T
J
= T
J
maximum, rated V
DRM
/V
RRM
applied
80
mA
Revision: 21-Sep-17
Document Number: 93738
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Vishay Semiconductors
TRIGGERING
VALUES
PARAMETER
SYMBOL
TEST CONDITIONS
UNITS
TYP. MAX.
Maximum peak gate power
P
GM
P
G(AV)
I
GM
T
J
= T
J
maximum, t
p
5 ms
10.0
2.0
3.0
20
W
A
Maximum average gate power
T
J
= T
J
maximum, f = 50 Hz, d% = 50
Maximum peak positive gate current
Maximum peak positive gate voltage
Maximum peak negative gate voltage
+ V
GM
– V
GM
T
J
= T
J
maximum, t
p
5 ms
V
5.0
T
J
= -40 °C
T
J
= 25 °C
200
100
50
–
200
–
DC gate current required to trigger
I
GT
mA
Maximum required gate trigger/
T
J
= 125 °C
T
J
= -40 °C
T
J
= 25 °C
T
J
= 125 °C
current/voltage are the lowest
value which will trigger all units
12 V anode to cathode applied
2.5
1.8
1.1
–
DC gate voltage required to trigger
DC gate current not to trigger
DC gate voltage not to trigger
V
GT
I
GD
3.0
–
V
mA
V
Maximum gate current/voltage
not to trigger is the maximum
10
T
J
= T
J
maximum value
which will not trigger any
unit with rated V
DRM
anode to
cathode applied
V
GD
0.25
THERMAL AND MECHANICAL SPECIFICATIONS
PARAMETER
SYMBOL
TEST CONDITIONS
VALUES
-40 to 125
-40 to 150
0.073
UNITS
Maximum operating temperature range
Maximum storage temperature range
T
J
°C
T
Stg
DC operation single side cooled
DC operation double side cooled
DC operation single side cooled
DC operation double side cooled
Maximum thermal resistance, junction to heatsink
R
thJ-hs
R
thC-hs
0.031
K/W
0.011
Maximum thermal resistance, case to heatsink
Mounting force,
10 %
0.006
14 700
(1500)
N
(kg)
Approximate weight
Case style
255
g
See dimensions – link at the end of datasheet
B-PUK (TO-200AC)
R
thJ-hs
CONDUCTION
SINUSOIDAL CONDUCTION
RECTANGULAR CONDUCTION
CONDUCTION ANGLE
TEST CONDITIONS
UNITS
SINGLE SIDE
DOUBLE SIDE
SINGLE SIDE
DOUBLE SIDE
180°
120°
90°
0.009
0.011
0.014
0.020
0.036
0.009
0.011
0.014
0.020
0.036
0.006
0.011
0.015
0.021
0.036
0.006
0.011
0.015
0.021
0.036
T
J
= T
J
maximum
K/W
60°
30°
Note
•
The table above shows the increment of thermal resistance R
thJ-hs
when devices operate at different conduction angles than DC
Revision: 21-Sep-17
Document Number: 93738
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VS-ST650C..L Series
Vishay Semiconductors
1
3
0
1
2
0
1
1
0
1
0
0
90
1
3
0
1
2
0
1
1
0
1
0
0
90
S T
6
50 C ..L
S erie s
ST 650C
.
.
L
Se r
i
e s
(Sin g le
Sid e
C oo
l
e d )
(D C
) 0
.
0
7 3
K /W
(D ou b
l
e
S id e
C
o
ole d )
R
(D C ) =
0.031 K
/W
R
=
th J-hs
th J-hs
C
o
nduction
An g
l
e
Cond uct
i
o
n
Pe
r
i
od
80
70
60
30°
80
50
60 °
9
0
°
120°
9
0
°
40
70
6
0
°
120°
D C
30
30°
180 °
180°
60
20
0
5 0
1
0
0
1 50
20 0
2 5 0
3 0 0
35 0
4 00
0
2
0
0
4
0
0
60 0
80 0
10 0 0
1 2 00
1 40 0
Av era g e
O n -s ta te
C u rren t
(A )
A
v
e ra g e
O n -sta te
C u rre n t
(A )
Fig. 1 – Current Ratings Characteristics
Fig. 4 – Current Ratings Characteristics
13 0
20 0 0
1
8
0°
ST 650C .
.
L
Se ries
12 0
(D o u ble
S
i
d e
C
o
o led )
1
2
0°
90°
17 5 0
15 0 0
12 5 0
10 0 0
7 5 0
5 0 0
2 5 0
0
R
(D C ) =
0
.
0
3
1
K /W
11 0
10 0
9 0
thJ-h s
60°
30°
R M S
L
i
m
i
t
C
o
nduction
Ang
l
e
1
8
0°
8 0
7 0
6 0
C
o
nd uct
i
o
n
Angle
S T
6
50 C ..L
S erie s
5 0
120°
90°
4 0
60 °
T
=
1
2
5
°
C
J
3 0
30°
2 0
0
10 0
2 00
3 0 0
4 0 0
5 00
6 00
7 0 0
80 0
Av era g e
O n – sta te
C u rre n t
(A)
0
1 0 0
2
0
0
3 0 0
4 0 0
50 0
6 0 0
70 0
8 00
Ave ra g e
O n -sta te
C u rren t
(A )
Fig. 2 – Current Ratings Characteristics
Fig. 5 – On-State Power Loss Characteristics
13 0
2
4
0 0
ST 650C .
.
L
Se ries
D C
2
2
0 0
12 0
(D o u ble
S
i
d e
C
o
o led )
1
8
0°
2
0
0 0
R
(D C ) =
0
.
0
3
1
K /W
11 0
10 0
9 0
1
2
0°
thJ-h s
90°
60°
30°
1
8
0 0
1
6
0 0
1
4
0 0
1
2
0 0
1
0
0 0
8
0
0
C
o
nduction
Ang
l
e
1
8
0°
8 0
R M S
L
im
i
t
7 0
6 0
C
o
ndu ct
i
o
n
P
e
riod
S T
6
50C ..L
S eries
5 0
120°
90°
6
0
0
4 0
4
0
0
T
=
1
2
5
°
C
60 °
J
3 0
30°
2
0
0
2 0
0
0
20 0
4
0
0
6 0 0
80 0
10 0 0
1 20 0
1 4 00
0
10 0
2 00
3 0 0
4 0 0
5 00
6 00
7 0 0
80 0
Av era g e
O n – sta te
C u rre n t
(A)
A
v
e ra g e
O n -sta te
C urre n t
(A)
Fig. 3 – Current Ratings Characteristics
Fig. 6 – On-State Power Loss Characteristics
Revision: 21-Sep-17
Document Number: 93738
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VS-ST650C..L Series
Vishay Semiconductors
1 2
0
0 0
1 1
0
0 0
1 0
0
0 0
90 0 0
80 0 0
70 0 0
60 0 0
50 0 0
40 0 0
10 0 00
9
0
0 0
8
0
0 0
7
0
0 0
6
0
0 0
5
0
0 0
4
0
0 0
M a x im u m
N o n
R e p
e
tit
i
v
e
S u rg e
C u rre n t
V e
r
su s
P u lse
T ra
i
n
D u
r
a tion .
C o n trol
O f C
o
n
d u c t
i
o n
M a y
N
o
t
B e
M a
i
n
t
a in ed .
A t
A
ny R
ated Loa
d C
ond it
i
o n
A
n d
W
i
th
R
a
ted
V
Ap pl
i
e
d
Fol
l
o
w
i
n g
S
u rge .
RR M
In itia l
T
=
1
2
5°C
J
@
60 H
z 0
.
0
0 83
s
s
In it
i
a l
No V
olta g e
R ea p p l
i
e d
R a te d
Re a p p lied
T
=
1
25
°C
J
@
50 H
z 0
.
0
1 00
V
R
R
M
S T6 50C .
.
L
S
e
ries
ST 650 C ..L
S er
i
e s
1
1 0
10 0
0
.
0 1
0. 1
P u
l
se
T ra
i
n
D u
r
a tion
(s)
1
Nu
m
ber O f Equ al Amp
l
i
tud e H a
l
f C y
c
le C urren t Pulses (N)
Fig. 7 – Maximum Non-Repetitive Surge Current
Single and Double Side Cooled
Fig. 8 – Maximum Non-Repetitive Surge Current
Single and Double Side Cooled
10000
T
= 2
5
°
C
J
1000
T
= 12
5
°
C
J
ST650C..L Series
100
0
.
5
1
1.5
2
2.5
3
Instantaneous On-sta
t
e Vo
l
t
age
(
V
)
Fig. 9 – On-State Voltage Drop Characteristics
0. 1
Stea d y
Sta te
V a
l
u e
0.073 K/W
(S
i
n
g
le
S
i
d e
C
o
o
l
e
d
)
0.031 K/W
R
=
thJ-hs
R
=
thJ-hs
(Do u ble
Sid e
C oo
l
e
d )
(DC O
p era t
i
o n )
0
.
0 1
ST 650C .
.
L
Se ries
0
.
00 1
0
.
00 1
0.0 1
0 .1
S q
u
a re
W a ve
P u lse
Du ra t
i
o
n
(s)
1
10
Fig. 10 – Thermal Impedance Z
thJ-hs
Characteristics
Revision: 21-Sep-17
Document Number: 93738
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VS-ST650C..L Series
Vishay Semiconductors
1 0 0
Re cta n g u
l
a r
g a
t
e
p ulse
(1) PG
M
(2) PG
M
(3) PG
M
(4) PG
M
=
=
=
=
10W ,
tp
20W ,
tp
40W ,
tp
60W ,
tp
=
=
=
=
4m s
2m s
1m s
a )
R e
c
om m e n d ed
loa d
l
in e
f
o
r
ra ted
d i/dt
: 20V
, 10oh
m s; tr<=
1 µ
s
b )
R
e co m m e n d ed
l
o
a d
l
i
n e
for
< =
3
0%
ra te d
d i/d t
: 1
0V ,
10o h m s
tr< = 1
µ s
0.66m s
1 0
1
(a )
(b )
(1)
(2)
(3) (4)
V G D
IG D
F
r
eq u en c y
Lim ite d
b y
P G (AV )
10
ST 6 50C .
.
L
Se rie s
0
.
1
0
.
1
0 .0
0
1
0
.
01
1
1
0
0
In sta n tan eo us
G a te
C u rren t
(A)
Fig. 11 – Gate Characteristics
ORDERING INFORMATION TABLE
Device code
VS- ST
65
0
C
24
L
1
–
1
2
3
4
5
6
7
8
9
1
2
3
4
5
6
7
8
–
–
–
–
Vishay Semiconductors product
Thyristor
Essential part number
0 = converter grade
–
–
–
–
C = ceramic PUK
Voltage code x 100 = V
RRM
(see Voltage Ratings table)
L = PUK case B-PUK (TO-200AC)
0 = eyelet terminals (gate and auxiliary cathode unsoldered leads)
1 = fast-on terminals (gate and auxiliary cathode unsoldered leads)
2 = eyelet terminals (gate and auxiliary cathode soldered leads)
3 = fast-on terminals (gate and auxiliary cathode soldered leads)
9
–
Critical dV/dt:
none = 500 V/µs (standard selection)
L = 1000 V/µs (special selection)
LINKS TO RELATED DOCUMENTS
Dimensions
Revision: 21-Sep-17
Document Number: 93738
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Outline Dimensions
Vishay Semiconductors
B-PUK (TO-200AC)
DIMENSIONS
in millimeters (inches)
Creepage distance: 36.33 (1.430) minimum
Strike distance: 17.43 (0.686) minimum
34 (1.34) DIA. MAX.
2 places
0.7 (0.03) MIN.
C
27 (1.06) MAX.
Pin receptacle
AMP. 60598-1
A
Note:
0.7 (0.03) MIN.
53 (2.09) DIA. MAX.
A = Anode
C = Cathode
6.2 (0.24) MIN.
20° 5°
4.7 (0.18)
36.5 (1.44)
2 holes DIA. 3.5 (0.14) x 2.5 (0.1) deep
Quote between upper and lower pole pieces has to be considered after
application of mounting force (see thermal and mechanical specification)
Revision: 12-Jul-17
Document Number: 95076
1
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Revision: 01-Jan-2023
Document Number: 91000
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