Vishay-Intertech-VS-ST780C06L0L
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VS-ST780CL Series
Vishay Semiconductors
Phase Control Thyristors
(Hockey PUK Version), 1350 A
FEATURES
• Center amplifying gate
• Metal case with ceramic insulator
• International standard case B-PUK (TO-200AC)
• Designed and qualified for industrial level
• Material
categorization: for definitions of compliance
TYPICAL APPLICATIONS
• DC motor controls
B-PUK (TO-200AC)
• Controlled DC power supplies
• AC controllers
PRIMARY CHARACTERISTICS
I
T(AV)
1350 A
V
DRM
/V
RRM
400 V, 600 V
1.31 V
V
TM
I
GT
100 mA
T
J
-40 °C to +125 °C
B-PUK (TO-200AC)
Single SCR
Package
Circuit configuration
MAJOR RATINGS AND CHARACTERISTICS
PARAMETER
TEST CONDITIONS
VALUES
1350
UNITS
A
°C
A
I
T(AV)
T
hs
55
2700
I
T(RMS)
I
TSM
I
2
t
T
hs
25
°C
50 Hz
60 Hz
50 Hz
60 Hz
24 400
25 600
2986
A
kA
2
s
2726
V
DRM
/V
RRM
400 to 600
150
V
t
q
Typical
μs
°C
T
J
-40 to 125
ELECTRICAL SPECIFICATIONS
VOLTAGE RATINGS
V
DRM
/V
RRM
, MAXIMUM REPETITIVE
PEAK AND OFF-STATE VOLTAGE
V
V
RSM
, MAXIMUM
I
DRM
/I
RRM
MAXIMUM
VOLTAGE
CODE
TYPE NUMBER
NON-REPETITIVE PEAK VOLTAGE
AT T
J
= T
J
MAXIMUM
V
mA
04
06
400
600
500
700
VS-ST780C..L
80
Revision: 19-Dec-2019
Document Number: 94415
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VS-ST780CL Series
Vishay Semiconductors
ABSOLUTE MAXIMUM RATINGS
PARAMETER
SYMBOL
I
T(AV)
TEST CONDITIONS
180° conduction, half sine wave
VALUES UNITS
1350 (500)
55 (85)
2700
A
Maximum average on-state current
at heatsink temperature
double side (single side) cooled
°C
Maximum RMS on-state current
I
T(RMS)
DC at 25 °C heatsink temperature double side cooled
t = 10 ms
t = 8.3 ms
t = 10 ms
t = 8.3 ms
t = 10 ms
t = 8.3 ms
t = 10 ms
t = 8.3 ms
24 400
25 600
20 550
21 500
2986
No voltage
reapplied
A
Maximum peak, one-cycle
non-repetitive surge current
I
TSM
100 % V
RRM
reapplied
Sinusoidal half wave,
initial T
J
= T
J
maximum
No voltage
reapplied
2726
Maximum I
2
t for fusing
I
2
t
kA
2
s
2112
100 % V
RRM
reapplied
1928
Maximum I
2
√
t for fusing
I
2
√
t
V
T(TO)1
V
T(TO)2
r
t1
t = 0.1 to 10 ms, no voltage reapplied
29 860
0.80
kA
2
√
s
Low level value of threshold voltage
High level value of threshold voltage
Low level value of on-state slope resistance
High level value of on-state slope resistance
Maximum on-state voltage
(16.7 % x
π
x I
T(AV)
< I <
π
x I
T(AV)
), T
J
= T
J
maximum
(I >
π
x I
T(AV)
), T
J
= T
J
maximum
V
0.90
(16.7 % x
π
x I
T(AV)
< I <
π
x I
T(AV)
), T
J
= T
J
maximum
(I >
π
x I
T(AV)
), T
J
= T
J
maximum
0.14
m
Ω
V
r
t2
0.13
V
TM
I
H
I
pk
= 3600 A, T
J
= T
J
maximum, t
p
= 10 ms sine pulse
1.31
Maximum holding current
600
T
J
= 25 °C, anode supply 12 V resistive load
mA
Typical latching current
I
L
1000
SWITCHING
PARAMETER
SYMBOL
TEST CONDITIONS
VALUES
UNITS
Maximum non-repetitive rate of rise
of turned-on current
Gate drive 20 V, 20
Ω
, t
r
≤
1 μs
T
J
= T
J
maximum, anode voltage
≤
80 % V
DRM
dI/dt
1000
A/µs
Gate current 1 A, dI
g
/dt = 1 A/μs
V
d
= 0.67 % V
DRM
, T
J
= 25 °C
Typical delay time
t
d
t
q
1.0
µs
I
TM
= 750 A, T
J
= T
J
maximum, dI/dt = 60 A/μs,
Typical turn-off time
150
V
R
= 50 V, dV/dt = 20 V/μs, gate 0 V 100
Ω
, t
p
= 500 μs
BLOCKING
PARAMETER
SYMBOL
TEST CONDITIONS
VALUES UNITS
Maximum critical rate of rise of
off-state voltage
dV/dt
T
J
= T
J
maximum linear to 80 % rated V
DRM
T
J
= T
J
maximum, rated V
DRM
/V
RRM
applied
500
80
V/µs
mA
Maximum peak reverse and
off-state leakage current
I
RRM
,
I
DRM
Revision: 19-Dec-2019
Document Number: 94415
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VS-ST780CL Series
Vishay Semiconductors
TRIGGERING
VALUES
PARAMETER
SYMBOL
TEST CONDITIONS
UNITS
TYP.
MAX.
P
GM
P
G(AV)
I
GM
T
J
= T
J
maximum, t
p
≤
5 ms
Maximum peak gate power
10.0
2.0
3.0
20
W
A
T
J
= T
J
maximum, f = 50 Hz, d% = 50
T
J
= T
J
maximum, t
p
≤
5 ms
Maximum average gate power
Maximum peak positive gate current
Maximum peak positive gate voltage
Maximum peak negative gate voltage
+ V
GM
– V
GM
T
J
= T
J
maximum, t
p
≤
5 ms
V
5.0
T
J
= -40 °C
200
100
50
–
200
–
DC gate current required to trigger
DC gate voltage required to trigger
I
GT
T
J
= 25 °C
T
J
= 125 °C
T
J
= -40 °C
T
J
= 25 °C
T
J
= 125 °C
mA
Maximum required gate
trigger/current/voltage are the
lowest value which will trigger
all units 12 V anode to cathode
applied
–
2.5
1.8
1.1
V
GT
V
3.0
–
Maximum gate
DC gate current not to trigger
DC gate voltage not to trigger
I
GD
10
0.25
mA
V
current/voltage not to trigger
is the maximum value which
will not trigger any unit with
rated V
DRM
anode to cathode
T
J
= T
J
maximum
V
GD
THERMAL AND MECHANICAL SPECIFICATIONS
PARAMETER
SYMBOL
TEST CONDITIONS
VALUES
-40 to 125
-40 to 150
0.073
UNITS
Maximum operating junction temperature range
Maximum storage temperature range
T
J
°C
T
Stg
DC operation single side cooled
DC operation double side cooled
DC operation single side cooled
DC operation double side cooled
Maximum thermal resistance, junction to heatsink
R
thJ-hs
0.031
K/W
0.011
Maximum thermal resistance, case to heatsink
Mounting force,
10 %
R
thC-hs
0.006
14 700
(1500)
N
(kg)
Approximate weight
Case style
255
g
See dimensions – link at the end of datasheet
B-PUK (TO-200AC)
Δ
R
thJ-hs
CONDUCTION
SINUSOIDAL CONDUCTION
RECTANGULAR CONDUCTION
SINGLE SIDE
DOUBLE SIDE
SINGLE SIDE
DOUBLE SIDE
CONDUCTION ANGLE
TEST CONDITIONS
UNITS
180°
120°
90°
0.009
0.011
0.014
0.020
0.036
0.009
0.011
0.014
0.020
0.036
0.006
0.011
0.015
0.021
0.036
0.006
0.011
0.015
0.021
0.036
T
J
= T
J
maximum
K/W
60°
30°
Note
•
The table above shows the increment of thermal resistance R
thJ-hs
when devices operate at different conduction angles than DC
Revision: 19-Dec-2019
Document Number: 94415
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VS-ST780CL Series
Vishay Semiconductors
130
120
110
100
90
130
120
110
100
90
ST
7
80C . . L
S
e r
i
e s
ST7
8
0C . . L
S
e r
i
e s
(
S
i
ngle
S
i
d
e Coo
l
e
d)
(DC) = 0.073
K
/
W
(Double
S
i
d
e Coo
l
e
d)
R
(DC) = 0.031 K
/
W
R
thJ-hs
thJ-hs
Conduction
P
e
r
i
o
d
80
Conduction Angle
70
80
30°
60
30°
70
60°
60°
90°
50
90°
60
120°
120°
40
180°
800
180°
DC
50
30
20
40
0
500 1000
1500 2000 2500 3000
0
200
400
600
1000
Average On-
s
t
ate Cu
r
rent (A)
Fig. 1 – Current Ratings Characteristics
Average On-
s
t
ate Cu
r
rent (A)
Fig. 4 – Current Ratings Characteristics
130
2500
ST
7
80C . . L
S
e
r
ie s
180°
120°
90°
120
110
100
90
(
S
i
n
g
l
e
S
i
d
e Cooled)
R
(DC) = 0.073
K
/
W
thJ-hs
2000
1500
1000
500
0
60°
30°
R
M
S
L
im it
Conduction
P
e
riod
80
70
60
Conduction Angle
ST
7
80C..L
S
e
r
i
e
s
30°
50
60°
40
90°
120°
T =
125°C
J
30
180°
DC
20
0
200 400 600 800
1000 1200 1400
Average On-
s
t
ate Cu
r
rent (A)
0
400
800
1200 1600 2000
Average On-
s
t
ate Cu
r
rent (A)
Fig. 5 – On-State Power Loss Characteristics
Fig. 2 – Current Ratings Characteristics
130
3500
ST
7
80C..L
S
e
r
i
e
s
DC
180°
120°
90°
120
110
100
90
(Double
S
i
d
e Cooled)
3000
2500
2000
1500
1000
500
R
(DC) = 0.031 K
/
W
thJ-hs
60°
30°
Conduction Angle
80
RM S L
i
m it
70
60
Conduction
P
e
r
iod
ST
7
80C..L
S
e
ries
30°
60°
50
90°
120°
40
180°
T =
125°C
J
30
20
0
0
400
Average On-
s
t
ate Current (A)
Fig. 3 – Current Ratings Characteristics
800
1200 1600 2000
0
500 1000
1500 2000 2500 3000
Average On-
s
t
ate Cu
r
rent (A)
Fig. 6 – On-State Power Loss Characteristics
Revision: 19-Dec-2019
Document Number: 94415
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,
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VS-ST780CL Series
Vishay Semiconductors
26000
22000
20000
18000
16000
14000
12000
10000
Maximum Non
R
e
pet
i
t
i
ve
S
u
r
g
e Current
Ver
s
u
s
P
u
l
s
e T
r
a
i
n Dur
a
tion. Control
Of Conduction May
N
o
t
B
e
M
a
i
ntained.
At Any
R
a
ted
L
o
ad Cond
i
t
i
o
n And With
R
a
ted V
App
l
i
e
d
F
o
llo
w
i
n
g
S
u
r
g
e.
RRM
24000
Ini
t
i
a
l T =
1
25°C
J
Ini
t
i
a
l T =
1
25°C
@60 Hz 0.0083 s
@50 Hz 0.0100 s
J
22000
No Voltage
R
e
appl
i
e
d
Ra t e d
V
Re a p p
l
ie d
20000
RRM
18000
16000
14000
12000
S
T
7
80C . . L
S
e
r
ie s
ST
7
80C . . L
S
e r
i
e s
10000
0.01
0.1
P
u
lse
T
r
ain Duration (
s
)
1
1
10
100
Num
b
e
r
O
f
E
q
ual Amplitude
H
a
l
f Cy
c
l
e Current Pulse
s
(
N)
Fig. 7 – Maximum Non-Repetitive Surge Current
Single and Double Side Cooled
Fig. 8 – Maximum Non-Repetitive Surge Current
Single and Double Side Cooled
10000
T = 25°
C
J
1000
T = 125°C
J
ST
7
80C . . L
S
e r
i
e s
100
0.5
1
1.5
2
2.5
I
n
s
t
antaneo
u
s
On-
s
t
ate Voltage (V)
Fig. 9 – On-State Voltage Drop Characteristics
0.1
0.01
S
t
eady
S
t
ate Va
l
ue
= 0.073 K/ W
R
th
J
–
hs
(
S
i
ngle
S
i
d
e Cooled)
= 0.031 K/ W
R
thJ-hs
(Double
S
i
d
e Cooled)
(DC Operat
i
o
n)
ST
7
80C . . L
S
e r
i
e s
1
0.001
0.001
0
.
0
1
0
.
1
10
Sq u a
r
e
Wa v e
Pu l
s
e D
u r a t
i
o n
(
s
)
Fig. 10 – Thermal Impedance Z
thJ-hs
Characteristics
Revision: 19-Dec-2019
Document Number: 94415
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VS-ST780CL Series
Vishay Semiconductors
100
R
e
c
tangu
l
a
r gate pu
l
s
e
(1) PGM = 10W,
t
p =
4
ms
a)
R
e
commended
l
o
ad line for
r
a
ted di
/
dt :
2
0V, 10ohm
s
;
t
r<=1 µs
b)
R
e
commended
l
o
a
d
l
ine for
<=30
%
r
ated di/
dt : 10V, 10ohms
t
r
<=1 µs
(2) PGM = 20W,
t
p =
2
ms
(3) PGM = 40W,
t
p =
1
ms
(4) PGM = 60W,
t
p =
0
.66
m
s
10
1
(a)
(b)
(2)
(1)
(3) (4)
VGD
IGD
F
r
e
quency
L
i
m
i
t
ed by
P
G
(AV)
10 100
Device:
S
T
7
80C..
L
S
e
r
ies
0.1
0.1
0.001
0.01
1
In
s
t
antaneousGate Cur
r
e
nt (A)
Fig. 11 – Gate Characteristics
ORDERING INFORMATION TABLE
Device code
VS- ST
78
0
C
06
L
1
–
1
2
3
4
5
6
7
8
9
1
2
3
–
–
Vi
s
hay
S
emiconductor
s
product
Thyristor
–
–
E
ss
ential part number
0 = converter grade
4
5
6
7
8
–
–
–
–
C = ceramic PUK
Voltage code x 100 = V
RRM
(
s
ee Voltage Rating
s
table)
L = PUK ca
s
e B-PUK (TO-200AC)
0 = eyelet terminal
s
(gate and auxiliary cathode un
s
oldered lead
s
)
1 = fa
s
t-on terminal
s
(gate and auxiliary cathode un
s
oldered lead
s
)
None = 500 V/μ
s
(
s
tandard
s
election)
L = 1000 V/μ
s
(
s
pecial
s
election)
9
–
Critical dV/dt:
LINKS TO RELATED DOCUMENTS
Dimensions
Revision: 19-Dec-2019
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Outline Dimensions
Vishay Semiconductors
B-PUK (TO-200AC)
DIMENSIONS
in millimeters (inches)
Creepage distance: 36.33 (1.430) minimum
Strike distance: 17.43 (0.686) minimum
34 (1.34) DIA. MAX.
2 places
0.7 (0.03) MIN.
C
27 (1.06) MAX.
Pin receptacle
AMP. 60598-1
A
Note:
0.7 (0.03) MIN.
53 (2.09) DIA. MAX.
A = Anode
C = Cathode
6.2 (0.24) MIN.
20° 5°
4.7 (0.18)
36.5 (1.44)
2 holes DIA. 3.5 (0.14) x 2.5 (0.1) deep
Quote between upper and lower pole pieces has to be considered after
application of mounting force (see thermal and mechanical specification)
Revision: 12-Jul-17
Document Number: 95076
1
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Disclaimer
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Revision: 01-Jan-2023
Document Number: 91000
1
