Vishay-Intertech-VS-VSKT500-08PBF
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VS-VSKT500-..Pb
F
,
V
S-VSKH500-..Pb
F
,
V
S-VSKL500-..PbF Series
Vishay Semiconductors
Thyristor/Diode and Thyristor/Thyristor
(Super MAGN-A-PAK Power Modules), 500 A
FEATURES
• High current capability
• High surge capability
• Industrial standard package
• 3000
V
RMS
isolating voltage with non-toxic
substrate
• UL approved file E78996
• Designed and qualified for industrial level
• Material
categorization: for definitions of compliance
Super MAGN-A-
P
A
K
TYPICAL APPLICATIONS
• Motor starters
• DC motor controls – AC motor controls
PRIMARY CHARACTERISTICS
• Uninterruptible power supplies
I
T(AV)
, I
F(AV)
500 A
Type
Modules – thyristor, standard
Super MAGN-A-PAK
Package
MAJOR RATINGS AND CHARACTERISTICS
SYMBOL
T(AV)
, I
F(AV)
I
T(RMS)
CHARACTERISTICS
VALUES
500
UNITS
I
T
C
= 82 °C
A
A
T
C
= 82 °C
50 Hz
785
17.8
I
TSM
kA
60 Hz
18.7
50 Hz
1591
I
2
t
kA
2
s
60 Hz
1452
I
2
t
V
RRM
T
Stg
T
J
15 910
800 to 1600
-40 to +150
-40 to +130
kA
2
s
Range
Range
Range
V
°C
ELECTRICAL SPECIFICATIONS
VOLTAGE RATINGS
V
RRM
/V
DRM
, MAXIMUM REPETITIVE
V
RSM
, MAXIMUM NON-REPETITIVE
I
RRM
/I
DRM
MAXIMUM
AT T
J
= T
J
MAXIMUM
mA
VOLTAGE
CODE
TYPE NUMBER
PEAK REVERSE VOLTAGE
V
PEAK REVERSE VOLTAGE
V
08
12
14
16
800
900
1200
1400
1600
1300
1500
1700
VS-VSK.500
100
Revision: 26-Jul-2018
Document Number: 94420
1
For technical questions within your region:
DiodesAmericas@vishay.com
,
DiodesAsia@vishay.com
,
DiodesEurope@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
VS-VSKT500-..Pb
F
,
V
S-VSKH500-..Pb
F
,
V
S-VSKL500-..PbF Series
Vishay Semiconductors
ON-STATE CONDUCTION
PARAMETER
SYMBOL
TEST CONDITIONS
180° conduction, half sine wave
180° conduction, half sine wave at T
C
= 82 °C
VALUES
500
UNITS
A
°C
A
Maximum average on-state current
at case temperature
I
T(AV),
I
F(AV)
82
Maximum RMS on-state current
I
T(RMS)
785
t = 10 ms
t = 8.3 ms
t = 10 ms
t = 8.3 ms
t = 10 ms
t = 8.3 ms
t = 10 ms
t = 8.3 ms
17.8
18.7
15.0
15.7
1591
1452
1125
1027
15 910
0.85
0.93
0.36
0.32
1.50
1.50
500
No voltage
reapplied
Maximum peak, one-cycle,
non-repetitive on-state surge current
I
TSM,
I
FSM
kA
100 % V
RRM
reapplied
Sinusoidal
half wave,
initial T
J
= T
J
maximum
No voltage
reapplied
Maximum I
2
t for fusing
I
2
t
kA
2
s
100 % V
RRM
reapplied
Maximum I
2
t for fusing
I
2
t
V
T(TO)1
V
T(TO)2
r
t1
t = 0.1 ms to 10 ms, no voltage reapplied
(16.7 % x
x I
T(AV)
< I <
x I
T(AV)
), T
J
= T
J
maximum
(I >
x I
T(AV)
), T
J
= T
J
maximum
kA
2
s
Low level value or threshold voltage
High level value of threshold voltage
Low level value on-state slope resistance
High level value on-state slope resistance
Maximum on-state voltage drop
Maximum forward voltage drop
Maximum holding current
V
(16.7 % x
x I
T(AV)
< I <
x I
T(AV)
), T
J
= T
J
maximum
(I >
x I
T(AV)
), T
J
= T
J
maximum
m
r
t2
V
TM
V
FM
I
H
I
pk
= 1500 A, T
J
= 25 °C, t
p
= 10 ms sine pulse
I
pk
= 1500 A, T
J
= 25 °C, t
p
= 10 ms sine pulse
V
V
T
J
= 25 °C, anode supply 12 V resistive load
mA
Maximum latching current
I
L
1000
SWITCHING
PARAMETER
SYMBOL
TEST CONDITIONS
VALUES
UNITS
Maximum rate of rise of turned-on current
dI/dt
T
J
= T
J
maximum, I
TM
= 400 A, V
DRM
applied
1000
A/μs
Gate current 1 A, dI
g
/dt = 1 A/μs
V
d
= 0.67 % V
DRM
, T
J
= 25 °C
Typical delay time
t
d
t
q
2.0
μs
I
TM
= 750 A; T
J
= T
J
maximum, dI/dt = – 60 A/μs,
Typical turn-off time
200
V
R
= 50 V, dV/dt = 20 V/μs, gate 0 V 100
BLOCKING
PARAMETER
SYMBOL
dV/dt
TEST CONDITIONS
VALUES
1000
UNITS
V/μs
V
Maximum critical rate of rise
of off-state voltage
T
J
= 130 °C, linear to V
D
= 80 % V
DRM
t = 1 s
RMS insulation voltage
V
INS
3000
Maximum peak reverse and
off-state leakage current
I
RRM
I
DRM
,
T
J
= T
J
maximum, rated V
DRM
/V
RRM
applied
100
mA
Revision: 26-Jul-2018
Document Number: 94420
2
For technical questions within your region:
DiodesAmericas@vishay.com
,
DiodesAsia@vishay.com
,
DiodesEurope@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
VS-VSKT500-..Pb
F
,
V
S-VSKH500-..Pb
F
,
V
S-VSKL500-..PbF Series
Vishay Semiconductors
TRIGGERING
PARAMETER
SYMBOL
P
GM
TEST CONDITIONS
T
J
= T
J
maximum, t
p
5 ms
VALUES
10
UNITS
Maximum peak gate power
W
A
Maximum peak average gate power
Maximum peak positive gate current
Maximum peak positive gate voltage
Maximum peak negative gate voltage
Maximum DC gate current required to trigger
DC gate voltage required to trigger
DC gate current not to trigger
P
G(AV)
+I
GM
+V
GM
-V
GM
I
GT
T
J
= T
J
maximum, f = 50 Hz, d% = 50
2.0
3.0
T
J
= T
J
maximum, t
p
5 ms
20
V
5.0
200
3.0
mA
V
T
J
= 25 °C, V
ak
12 V
T
J
= T
J
maximum
V
GT
I
GD
10
mA
V
DC gate voltage not to trigger
V
GD
0.25
THERMAL AND MECHANICAL SPECIFICATIONS
PARAMETER
SYMBOL
TEST CONDITIONS
VALUES
-40 to +130
-40 to +150
0.065
UNITS
Maximum junction operating
temperature range
T
J
°C
Maximum storage temperature range
T
Stg
Maximum thermal resistance,
junction to case per junction
R
thJC
DC operation
K/W
Maximum thermal resistance,
case to heatsink per module
R
thC-hs
Mounting surface smooth, flat and greased
0.02
A mounting compound is recommended and
the torque should be rechecked after a period
of 3 hours to allow for the spread of the
compound
Super MAGN-A-PAK to heatsink
busbar to super MAGN-A-PAK
6 to 8
Mounting
torque
10 %
Nm
g
12 to 15
1500
Approximate weight
Case style
See dimensions – link at the end of datasheet
Super MAGN-A-PAK
R
thJC
CONDUCTION
CONDUCTION ANGLE
SINUSOIDAL CONDUCTION
RECTANGULAR CONDUCTION
TEST CONDITIONS
UNITS
180°
120°
90°
0.009
0.011
0.014
0.021
0.037
0.006
0.011
0.015
0.022
0.038
T
J
= T
J
maximum
K/W
60°
30°
Note
•
Table shows the increment of thermal resistance R
thJC
when devices operate at different conduction angles than DC
Revision: 26-Jul-2018
Document Number: 94420
3
For technical questions within your region:
DiodesAmericas@vishay.com
,
DiodesAsia@vishay.com
,
DiodesEurope@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
VS-VSKT500-..Pb
F
,
V
S-VSKH500-..Pb
F
,
V
S-VSKL500-..PbF Series
Vishay Semiconductors
130
120
110
100
90
1000
VSK.500..
S
e
ries
DC
180°
120°
90°
900
800
700
600
500
400
300
200
100
0
R
(DC) = 0.065 K
/
W
Conduction Angle
thJC
60°
30°
R
M
S
L
i
m it
Conduction
P
e
riod
30°
80
60°
VSK.500..
S
e
ries
Pe r J
u
nc tio n
90°
120°
180°
70
T =
13 0 ° C
J
60
0
100 200 300 400 500 600
Average On-
s
t
ate Current (A)
0
100 200 300 400 500 600 700 800
Average On-
s
t
ate Cu
r
rent (A)
Fig. 1 – Current Ratings Characteristics
Fig. 4 – On-State Power Loss Characteristics
130
16000
At Any
R
a
ted
L
o
ad Condition And
W
i
t
h
VSK.500..
S
e
ries
(DC) = 0.065 K/ W
R
a
ted V
RRM
A
p
p
l
ied
F
o
l
lowing
S
u
rge.
R
15000
14000
13000
12000
11000
10000
9000
thJC
120
110
100
90
Initi
a
l T =
1
30°C
J
@
6
0 Hz 0.0083 s
@
5
0 Hz 0.0100 s
Conduction
P
e
riod
60°
80
30°
90°
120°
180°
70
VSK
.
500..
S
e
ries
Pe r
J
u
nc t io n
8000
DC
60
7000
0
100 200 300 400 500 600 700 800 900
Average On-
s
t
ate Current (A)
1
10
100
Number Of
E
q
ual Amp
l
i
t
ude
H
a
lf Cycle Cur
r
e
nt
P
u
l
s
e
s(N)
Fig. 2 – Current Ratings Characteristics
Fig. 5 – Maximum Non-Repetitive Surge Current
700
18000
M
a
x
i
m
um Non
R
e
pet
i
t
i
ve
S
u
r
g
e Current
180°
120°
90°
Ver
s
us Pulse
T
r
a
in Dur
a
t
i
o
n. Control
600
500
400
300
200
100
0
Of Conduction May Not
B
e
M
aintained.
16000
14000
12000
10000
8000
I
n
i
t
ial T =
1
30°C
J
60°
No V
o
l
tage
R
e
appl
i
e
d
30°
Ra t e d
V
Re a p p
l
ie d
RRM
RM S L
i
m it
Conduction Angle
VSK.500..
S
e
ries
P
e
r Junc tio n
VSK.500..
S
e
ries
P
e
r Junc
t io n
T = 1
30° C
J
6000
0
100
Average On-
s
t
ate Current (A)
Fig. 3 – On-State Power Loss Characteristics
200
300
400
500
0.01
0.1
P
u
l
s
e
T
r
a
i
n Dur
a
tion (
s
)
1
Fig. 6 – Maximum Non-Repetitive Surge Current
Revision: 26-Jul-2018
Document Number: 94420
4
For technical questions within your region:
DiodesAmericas@vishay.com
,
DiodesAsia@vishay.com
,
DiodesEurope@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
VS-VSKT500-..Pb
F
,
V
S-VSKH500-..Pb
F
,
V
S-VSKL500-..PbF Series
Vishay Semiconductors
750
0
700
650
600
550
500
450
400
350
300
250
200
150
100
50
180°
120°
90°
0
R
.
0
.
1
9
2
K
K
/
/
W
W
=
0
60°
.
0
0
.
2
7
30°
K
Conduction Angle
K
/
W
/
W
–
D
e
l
t
a
R
VSK.500..
S
e
ries
P
e
r Module
J
T =
130°C
0
0
0
0
100 200 300 400 500 600 700 800
To t a l RM S O u t p u t
C u r
r
e n t ( A )
20
40
60
80
100 120
Maximum Allowable Ambient
T
e
mperature (°C)
Fig. 7 – On-State Power Loss Characteristics
3000
2500
2000
1500
1000
500
R
180°
(
S
i
ne)
180°
0
.
0
2
K
/
W
=
0
0
.
0
.
3
0
(
R
e
ct)
1
K
/
K
W
/
W
–
D
e
l
t
a
R
2 x
V
SK.500.. Series
Si n g
l
e
Ph a se
Bri d g e
Connected
T
= 130°C
J
0
200
400
600
800
10
0
00
20
40
60
80
100 120
T
o
tal Output Current (A)
Maximum Allowable Ambient
T
e
mperature (°C)
Fig. 8 – On-State Power Loss Characteristics
4500
4000
3500
3000
2500
2000
1500
1000
500
120°
(
R
e
ct)
0
.
0
2
K
/
W
3 x
V
SK.500..
S
e
ries
Th r e e
P
h a se
Br
i
d g e
Connected
T =
1 30° C
J
0
250 500 750
1000 1250 15
00
20
40
60
80
100 120
T
o
tal Output Current (A)
Maximum Allowable Ambient
T
e
mpe
r
a
ture (°C)
Fig. 9 – On-State Power Loss Characteristics
Revision: 26-Jul-2018
Document Number: 94420
5
For technical questions within your region:
DiodesAmericas@vishay.com
,
DiodesAsia@vishay.com
,
DiodesEurope@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
VS-VSKT500-..Pb
F
,
V
S-VSKH500-..Pb
F
,
V
S-VSKL500-..PbF Series
Vishay Semiconductors
10000
1000
100
0.1
VSK.500..
S
e
ries
Pe r J
u
nc tio n
T = 25
° C
0.01
J
T = 13
0° C
J
St e a d y
St a t e
V a
l
u e :
= 0.065 K/ W
VSK.500..
S
e
ries
P
e
r Junc tio n
R
thJC
(DC Operation)
0.001
0.5
1
1.5
2
2.5
3
3.5
4
4.5
0.001
0.01
0.1
1
10
100
In
s
t
antaneousOn-
s
t
ate Voltage (V)
Sq u a
r
e
Wa v e
Pu lse
D u ra t i o n
( s)
Fig. 10 – On-State Voltage Drop Characteristics
Fig. 11 – Thermal Impedance Z
thJC
Characteristics
100
R
e
ctangular gate pul
s
e
(1)
P
G
M = 10W,
tp = 4ms
(2)
P
G
M = 20W,
tp = 2ms
(3)
P
G
M = 40W,
tp = 1ms
(4)
P
G
M
=
6
0W,
t
p =
0
.66ms
a)
R
e
commended load line for
r
a
ted di/dt :
2
0V, 10
o
hm
s
;
t
r<=1 µs
b)
R
e
commended load line for
<=30
%
r
a
ted di/dt :
1
0V, 10
o
hms
10
1
t
r
<=1 µs
(
a
)
(
b
)
(1) (2) (3)
(4)
VGD
IGD
VSK.500..
S
e
ries
F
r
e
quency
L
i
mited by
P
G(AV)
0.1 10
100
0.1
0.001
0.01
1
In
s
t a
n
t a ne o us G a t e
Curre nt
(A)
Fig. 12 – Gate Characteristics
ORDERING INFORMATION TABLE
Device code
VS-VS KT
500
–
16 PbF
1
2
3
4
5
1
2
3
4
5
–
–
–
–
–
Vishay Semiconductors product
Circuit configuration (see end of datasheet)
Current rating
Voltage code x 100 = V
RRM
(see voltage ratings table)
Lead (Pb)-free
Note
•
Revision: 26-Jul-2018
Document Number: 94420
6
For technical questions within your region:
DiodesAmericas@vishay.com
,
DiodesAsia@vishay.com
,
DiodesEurope@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
VS-VSKT500-..Pb
F
,
V
S-VSKH500-..Pb
F
,
V
S-VSKL500-..PbF Series
Vishay Semiconductors
CIRCUIT CONFIGURATION
CIRCUIT DESCRIPTION
CIRCUIT CONFIGURATION CODE
CIRCUIT DRAWING
VSKT…
1
~
+
Two SCRs doubler circuit
KT
2
–
3
4
7
(K1)
(K2)
5 (G1)
6 (G2)
VSKH…
1
~
SCR/diode doubler circuit, positive control
KH
+
2
–
3
4 (K1)
5 (G1)
VSKL…
1
~
+
SCR/diode doubler circuit, negative control
KL
2
–
3
7 (K2)
6 (G2)
LINKS TO RELATED DOCUMENTS
Dimensions
Revision: 26-Jul-2018
Document Number: 94420
7
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DiodesAmericas@vishay.com
,
DiodesAsia@vishay.com
,
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Outline Dimensions
Vishay Semiconductors
Super MAGN-A-PAK Thyristor/Diode
DIMENSIONS
in millimeters (inches)
18 (0.71) maꢀ.
17 (0.67) max.
19 (0.75)
9.9 0.5
(0.39 0.02)
Ø 6.5 mm
0.3 mm ꢀ 4 hole
s
(
T
y
p.)
Fast-on tabs
2.8 x 0.8 (0.11 x 0.03)
31.0
50.0
44.0
(1.22)
(1.97)
(1.73)
M10
5
6
4
7
1
3
2
26.0
(0.98)
26.0
(0.98)
4.5 (0.20)
36.4 (1.14)
112.0 (4.41)
124.0 (4.88)
149.0 (5.67)
5, 6 = Gate
4, 7 = Cathode
1.0 (0.039)
Revision: 14-Dec-16
Document Number: 95283
1
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DiodesAmericas@vishay.com
,
DiodesAsia@vishay.com
,
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THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
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Disclaimer
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Revision: 01-Jan-2023
Document Number: 91000
1
